[1/2][GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 support in GAS.

This patch adds the following relocation support into binutils gas. BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC. Those relocations includes both ip64 and ilp32 variant.
8 years ago · 84f1b9fb08
33 changed files with 555 additions and 6 deletions
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@ -1,3 +1,28 @@
+2018-03-28  Renlin Li  <renlin.li@arm.com>
+
+	PR ld/22970
+	* reloc.c: Add BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12
+	BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC,
+	BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
+	BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
+	BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
+	BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
+	BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
+	BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
+	BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
+	BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.
+	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Add table entry for
+	TLSLE_LDST16_TPREL_LO12,
+	TLSLE_LDST16_TPREL_LO12_NC,
+	TLSLE_LDST32_TPREL_LO12,
+	TLSLE_LDST32_TPREL_LO12_NC,
+	TLSLE_LDST64_TPREL_LO12,
+	TLSLE_LDST64_TPREL_LO12_NC,
+	TLSLE_LDST8_TPREL_LO12,
+	TLSLE_LDST8_TPREL_LO12_NC.
+	* bfd-in2.h: Regenerated.
+	* libbfd.h: Regenerated.
+
 2018-03-28  Eric Botcazou  <ebotcazou@adacore.com>

 	PR ld/22972
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@ -6229,6 +6229,34 @@ instructions.  */
 /* AArch64 TLS LOCAL EXEC relocation.  */
  BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC,

+/* bit[11:1] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
+
+/* bit[11:2] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
+
+/* bit[11:3] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
+
+/* bit[11:0] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC,
+
 /* AArch64 TLS DESC relocation.  */
  BFD_RELOC_AARCH64_TLSDESC_LD_PREL19,

@ -6312,6 +6340,14 @@ any object files.  */
 /* Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.  */
  BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC,

+/* AArch64 pseudo relocation code for TLS local exec mode.  It's to be
+used internally by the AArch64 assembler and not (currently) written to
+any object files.  */
+  BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC,
+
 /* AArch64 pseudo relocation code to be used internally by the AArch64
 assembler and not (currently) written to any object files.  */
  BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@ -1635,6 +1635,126 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
 	 0xfff,			/* dst_mask */
 	 FALSE),		/* pcrel_offset */

+  /* LD/ST16: bit[11:1] of byte offset to module TLS base address.  */
+  HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12),	/* type */
+	 1,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 11,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x1ffc00,		/* src_mask */
+	 0x1ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check.  */
+  HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12_NC),	/* type */
+	 1,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 11,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x1ffc00,		/* src_mask */
+	 0x1ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* LD/ST32: bit[11:2] of byte offset to module TLS base address.  */
+  HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12),	/* type */
+	 2,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 10,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffc00,		/* src_mask */
+	 0xffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check.  */
+  HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12_NC),	/* type */
+	 2,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 10,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffc00,		/* src_mask */
+	 0xffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* LD/ST64: bit[11:3] of byte offset to module TLS base address.  */
+  HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12),	/* type */
+	 3,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 9,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x7fc00,		/* src_mask */
+	 0x7fc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check.  */
+  HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12_NC),	/* type */
+	 3,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 9,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x7fc00,		/* src_mask */
+	 0x7fc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* LD/ST8: bit[11:0] of byte offset to module TLS base address.  */
+  HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12),	/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 12,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x3ffc00,		/* src_mask */
+	 0x3ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check.  */
+  HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12_NC),	/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 12,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x3ffc00,		/* src_mask */
+	 0x3ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
  HOWTO (AARCH64_R (TLSDESC_LD_PREL19),	/* type */
 	 2,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@ -2944,6 +2944,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
  "BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12",
  "BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12",
  "BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC",
+  "BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC",
+  "BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC",
+  "BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC",
+  "BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC",
  "BFD_RELOC_AARCH64_TLSDESC_LD_PREL19",
  "BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21",
  "BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21",
@ -2969,6 +2977,8 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
  "BFD_RELOC_AARCH64_LDST_LO12",
  "BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12",
  "BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC",
+  "BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC",
  "BFD_RELOC_AARCH64_LD_GOT_LO12_NC",
  "BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC",
  "BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC",
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@ -7395,6 +7395,42 @@ ENUM
  BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
 ENUMDOC
  AArch64 TLS LOCAL EXEC relocation.
+ENUM
+  BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12
+ENUMDOC
+  bit[11:1] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check.
+ENUM
+  BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12
+ENUMDOC
+  bit[11:2] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check.
+ENUM
+  BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12
+ENUMDOC
+  bit[11:3] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check.
+ENUM
+  BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12
+ENUMDOC
+  bit[11:0] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check.
 ENUM
  BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
 ENUMDOC
@ -7503,6 +7539,16 @@ ENUM
  BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC
 ENUMDOC
  Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.
+ENUM
+  BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12
+ENUMDOC
+  AArch64 pseudo relocation code for TLS local exec mode.  It's to be
+  used internally by the AArch64 assembler and not (currently) written to
+  any object files.
+ENUM
+  BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12, but no overflow check.
 ENUM
  BFD_RELOC_AARCH64_LD_GOT_LO12_NC
 ENUMDOC
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@ -1,3 +1,38 @@
+2018-03-28  Renlin Li  <renlin.li@arm.com>
+
+	PR ld/22970
+	* config/tc-aarch64.c (reloc_table): Update entry for tprel_lo12 and
+	tprel_lo12_nc with pseudo relocations.
+	(ldst_lo12_determine_real_reloc_type): Add new relocations support.
+	(parse_operands): Handle BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12 and
+	BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC pseudo relocations.
+	(md_apply_fix): Add handling for new relocation.
+	(aarch64_force_relocation): Likewise.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.s: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d: New.
+	* testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d: New.
+
 2018-03-28  Jan Beulich  <jbeulich@suse.com>

 	* config/tc-i386.c (check_VecOperands): Replace uses of
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@ -2902,7 +2902,7 @@ static struct reloc_table_entry reloc_table[] = {
   0,
   0,
   BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12,
-   0,
+   BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12,
   0},

  /* Get tp offset for a symbol.  */
@ -2920,7 +2920,7 @@ static struct reloc_table_entry reloc_table[] = {
   0,
   0,
   BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC,
-   0,
+   BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC,
   0},

  /* Most significant bits 32-47 of address/value: MOVZ.  */
@ -5254,7 +5254,7 @@ ldst_lo12_determine_real_reloc_type (void)
  enum aarch64_opnd_qualifier opd0_qlf = inst.base.operands[0].qualifier;
  enum aarch64_opnd_qualifier opd1_qlf = inst.base.operands[1].qualifier;

-  const bfd_reloc_code_real_type reloc_ldst_lo12[3][5] = {
+  const bfd_reloc_code_real_type reloc_ldst_lo12[5][5] = {
    {
      BFD_RELOC_AARCH64_LDST8_LO12,
      BFD_RELOC_AARCH64_LDST16_LO12,
@ -5275,13 +5275,31 @@ ldst_lo12_determine_real_reloc_type (void)
      BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
      BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
      BFD_RELOC_AARCH64_NONE
+    },
+    {
+      BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
+      BFD_RELOC_AARCH64_NONE
+    },
+    {
+      BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
+      BFD_RELOC_AARCH64_NONE
    }
  };

  gas_assert (inst.reloc.type == BFD_RELOC_AARCH64_LDST_LO12
 	      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
 	      || (inst.reloc.type
-		  == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC));
+		  == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC)
+	      || (inst.reloc.type
+		  == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12)
+	      || (inst.reloc.type
+		  == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC));
  gas_assert (inst.base.opcode->operands[1] == AARCH64_OPND_ADDR_UIMM12);

  if (opd1_qlf == AARCH64_OPND_QLF_NIL)
@ -5292,7 +5310,9 @@ ldst_lo12_determine_real_reloc_type (void)

  logsz = get_logsz (aarch64_get_qualifier_esize (opd1_qlf));
  if (inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
-      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC)
+      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC
+      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12
+      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC)
    gas_assert (logsz <= 3);
  else
    gas_assert (logsz <= 4);
@ -6168,7 +6188,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 		   || (inst.reloc.type
 		       == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12)
 		   || (inst.reloc.type
-		       == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC))
+		       == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC)
+		   || (inst.reloc.type
+		       == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12)
+		   || (inst.reloc.type
+		       == BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC))
 	    inst.reloc.type = ldst_lo12_determine_real_reloc_type ();
 	  /* Leave qualifier to be determined by libopcodes.  */
 	  break;
@ -7861,6 +7885,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
+    case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
    case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
    case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
    case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
@ -8095,6 +8127,14 @@ aarch64_force_relocation (struct fix *fixp)
    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
+    case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
    case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
    case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
    case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d
@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12-ldst16.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	7980009b 	ldrsh	x27, \[x4\]
+			0: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d
@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	7980009b 	ldrsh	x27, \[x4\]
+			0: R_AARCH64_TLSLE_LDST16_TPREL_LO12	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.s
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.s
@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12 for LDST16
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12
+	ldrsh  x27, [x4, #:tprel_lo12:sym]
+
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d
@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12-ldst32.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	b980009b 	ldrsw	x27, \[x4\]
+			0: R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d
@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	b980009b 	ldrsw	x27, \[x4\]
+			0: R_AARCH64_TLSLE_LDST32_TPREL_LO12	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.s
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.s
@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12 for LDST32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12
+	ldrsw  x27, [x4, #:tprel_lo12:sym]
+
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d
@ -0,0 +1,12 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12-ldst64.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12	sym
+
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d
@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_TLSLE_LDST64_TPREL_LO12	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.s
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.s
@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12 for LDST64
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12
+	ldr  x27, [x4, #:tprel_lo12:sym]
+
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d
@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12-ldst8.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	39800115 	ldrsb	x21, \[x8\]
+			0: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d
@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	39800115 	ldrsb	x21, \[x8\]
+			0: R_AARCH64_TLSLE_LDST8_TPREL_LO12	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.s
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.s
@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12 for LDST8
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12
+	ldrsb  x21, [x8, #:tprel_lo12:sym]
+
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d
@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12_nc-ldst16.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	7940009b 	ldrh	w27, \[x4\]
+			0: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d
@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	7940009b 	ldrh	w27, \[x4\]
+			0: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.s
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.s
@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- tprel_lo12_nc for LDST16
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC
+	ldrh  w27, [x4, #:tprel_lo12_nc:sym]
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d
@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12_nc-ldst32.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	b98000f4 	ldrsw	x20, \[x7\]
+			0: R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d
@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	b98000f4 	ldrsw	x20, \[x7\]
+			0: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.s
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.s
@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12_nc for LDST32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC
+	ldrsw  x20, [x7, #:tprel_lo12_nc:sym]
+
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d
@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12_nc-ldst64.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d
@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.s
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.s
@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12_nc for LDST64
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC
+	ldr  x27, [x4, #:tprel_lo12_nc:sym]
+
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d
@ -0,0 +1,11 @@
+#as: -mabi=ilp32
+#source: reloc-tprel_lo12_nc-ldst8.s
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	3940005d 	ldrb	w29, \[x2\]
+			0: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d
@ -0,0 +1,10 @@
+#as: -mabi=lp64
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	3940005d 	ldrb	w29, \[x2\]
+			0: R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC	sym
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.s
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.s
@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- tprel_lo12_nc for LDST8
+
+func:
+	// BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC
+	ldrb  w29, [x2, #:tprel_lo12_nc:sym]
+
--- a/include/ChangeLog
+++ b/include/ChangeLog
@ -1,3 +1,16 @@
+2018-03-28  Renlin Li  <renlin.li@arm.com>
+
+	PR ld/22970
+	* elf/aarch64.h: Add relocation number for
+	R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
+	R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
+	R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
+	R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
+	R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
+	R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
+	R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
+	R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
+
 2018-03-28  Nick Clifton  <nickc@redhat.com>

 	PR 22988
--- a/include/elf/aarch64.h
+++ b/include/elf/aarch64.h
@ -147,6 +147,14 @@ RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 108)
 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 109)
 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 110)
 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 111)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12, 112)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC, 113)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12, 114)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC, 115)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12, 116)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC, 117)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12, 118)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC, 119)

 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD_PREL19, 122)
 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PREL21, 123)