RISC-V: Gate opcode tables by enum rather than string.

Generalize opcode arch dependencies so that we can support the
overlapping B extension Zb* subsets.

	2019-09-17  Maxim Blinov  <maxim.blinov@embecosm.com>
	gas/
	* config/tc-riscv.c (riscv_multi_subset_supports): Handle
	insn_class enum rather than subset char string.
	(riscv_ip): Update call to riscv_multi_subset_supports.
	include/
	* opcode/riscv.h (riscv_insn_class): New enum.
	* opcode/riscv.h (struct riscv_opcode): Change
	subset field to insn_class field.
	opcodes/
	* riscv-opc.c (riscv_opcodes): Change subset field
	to insn_class field for all instructions.
	(riscv_insn_types): Likewise.

gas/ChangeLog

@@ -1,3 +1,9 @@
+2019-09-17  Maxim Blinov  <maxim.blinov@embecosm.com>
+
+	* config/tc-riscv.c (riscv_multi_subset_supports): Handle
+	insn_class enum rather than subset char string.
+	(riscv_ip): Update call to riscv_multi_subset_supports.
+
 2019-09-16  Phil Blundell  <pb@pbcl.net>
 
 	* Makefile.in, configure, doc/Makefile.in: Regenerated.

gas/config/tc-riscv.c

@@ -121,15 +121,28 @@ riscv_subset_supports (const char *feature)
 }
 
 static bfd_boolean
-riscv_multi_subset_supports (const char *features[])
+riscv_multi_subset_supports (enum riscv_insn_class insn_class)
 {
-  unsigned i = 0;
-  bfd_boolean supported = TRUE;
+  switch (insn_class)
+    {
+    case INSN_CLASS_I: return riscv_subset_supports ("i");
+    case INSN_CLASS_C: return riscv_subset_supports ("c");
+    case INSN_CLASS_A: return riscv_subset_supports ("a");
+    case INSN_CLASS_M: return riscv_subset_supports ("m");
+    case INSN_CLASS_F: return riscv_subset_supports ("f");
+    case INSN_CLASS_D: return riscv_subset_supports ("d");
+    case INSN_CLASS_D_AND_C:
+      return riscv_subset_supports ("d") && riscv_subset_supports ("c");
+
+    case INSN_CLASS_F_AND_C:
+      return riscv_subset_supports ("f") && riscv_subset_supports ("c");
 
-  for (;features[i]; ++i)
-    supported = supported && riscv_subset_supports (features[i]);
+    case INSN_CLASS_Q: return riscv_subset_supports ("q");
 
-  return supported;
+    default:
+      as_fatal ("Unreachable");
+      return FALSE;
+    }
 }
 
 /* Set which ISA and extensions are available.  */
@@ -1427,7 +1440,7 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr,
       if ((insn->xlen_requirement != 0) && (xlen != insn->xlen_requirement))
 	continue;
 
-      if (!riscv_multi_subset_supports (insn->subset))
+      if (!riscv_multi_subset_supports (insn->insn_class))
 	continue;
 
       create_insn (ip, insn);

include/ChangeLog

@@ -1,3 +1,9 @@
+2019-09-17  Maxim Blinov  <maxim.blinov@embecosm.com>
+
+	* opcode/riscv.h (riscv_insn_class): New enum.
+	* opcode/riscv.h (struct riscv_opcode): Change
+	subset field to insn_class field.
+
 2019-09-09  Phil Blundell  <pb@pbcl.net>
 
 	binutils 2.33 branch created.

include/opcode/riscv.h

@@ -294,6 +294,23 @@ static const char * const riscv_pred_succ[16] =
 /* The maximal number of subset can be required. */
 #define MAX_SUBSET_NUM 4
 
+/* All RISC-V instructions belong to at least one of these classes.  */
+
+enum riscv_insn_class
+  {
+   INSN_CLASS_NONE,
+
+   INSN_CLASS_I,
+   INSN_CLASS_C,
+   INSN_CLASS_A,
+   INSN_CLASS_M,
+   INSN_CLASS_F,
+   INSN_CLASS_D,
+   INSN_CLASS_D_AND_C,
+   INSN_CLASS_F_AND_C,
+   INSN_CLASS_Q,
+  };
+
 /* This structure holds information for a particular instruction.  */
 
 struct riscv_opcode
@@ -302,9 +319,9 @@ struct riscv_opcode
   const char *name;
   /* The requirement of xlen for the instruction, 0 if no requirement.  */
   unsigned xlen_requirement;
-  /* An array of ISA subset name (I, M, A, F, D, Xextension), must ended
-     with a NULL pointer sential.  */
-  const char *subset[MAX_SUBSET_NUM];
+  /* Class to which this instruction belongs.  Used to decide whether or
+     not this instruction is legal in the current -march context.  */
+  enum riscv_insn_class insn_class;
   /* A string describing the arguments for this instruction.  */
   const char *args;
   /* The basic opcode for the instruction.  When assembling, this

opcodes/ChangeLog

@@ -1,3 +1,9 @@
+2019-09-17  Maxim Blinov  <maxim.blinov@embecosm.com>
+
+	* riscv-opc.c (riscv_opcodes): Change subset field
+	to insn_class field for all instructions.
+	(riscv_insn_types): Likewise.
+
 2019-09-16  Phil Blundell  <pb@pbcl.net>
 
 	* configure: Regenerated.