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Add semantic tracing to the tic80

gdb-4_18-branch
Michael Meissner 30 years ago
parent
baa83bcc80
commit
7b167b0900
8 changed files with 605 additions and 196 deletions
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  1. 11
      sim/common/ChangeLog
  2. 83
      sim/common/sim-trace.c
  3. 66
      sim/common/sim-trace.h
  4. 11
      sim/igen/igen.c
  5. 15
      sim/tic80/ChangeLog
  6. 108
      sim/tic80/cpu.h
  7. 298
      sim/tic80/insns
  8. 209
      sim/tic80/interp.c

11
sim/common/ChangeLog
View File

@ -2,13 +2,18 @@ Tue May 6 06:14:01 1997 Mike Meissner <meissner@cygnus.com>
* sim-trace.c (toplevel): Include bfd.h.
(trace_options): Note that --trace-linenum also turns on
--trace-insn.
--trace-insn. Add --trace-{branch,semantics}.
(trace_option_handler): If --trace-linenum, also turn on
--trace-insn.
--trace-insn. Add --trace-branch support. If --trace-semantics,
turn on ALU, FPU, branch, and memory tracing.
(trace_one_insn): New function to trace an instruction. Support
--trace-linenum.
(OPTION_TRACE_*): Use an enum, rather than lots of defines.
* sim-trace.h (TRACE_LINENUM_P): Define macro.
* sim-trace.h (TRACE_{SEMANTICS,BRANCH}_IDX): Add new macros.
(MAX_TRACE_VALUES): Use 32, not 12 by default.
(TRACE_branch): Add new mask.
(TRACE_*_P): Define all possible trace_p macros.
(trace_one_insn): Declare function.
Mon May 5 14:08:34 1997 Mike Meissner <meissner@cygnus.com>

83
sim/common/sim-trace.c
View File

@ -31,6 +31,10 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#endif
#endif
#ifndef SIZE_PHASE
#define SIZE_PHASE 8
#endif
#ifndef SIZE_LOCATION
#define SIZE_LOCATION 20
#endif
@ -47,17 +51,21 @@ static MODULE_UNINSTALL_FN trace_uninstall;
static DECLARE_OPTION_HANDLER (trace_option_handler);
#define OPTION_TRACE_INSN (OPTION_START + 0)
#define OPTION_TRACE_DECODE (OPTION_START + 1)
#define OPTION_TRACE_EXTRACT (OPTION_START + 2)
#define OPTION_TRACE_LINENUM (OPTION_START + 3)
#define OPTION_TRACE_MEMORY (OPTION_START + 4)
#define OPTION_TRACE_MODEL (OPTION_START + 5)
#define OPTION_TRACE_ALU (OPTION_START + 6)
#define OPTION_TRACE_CORE (OPTION_START + 7)
#define OPTION_TRACE_EVENTS (OPTION_START + 8)
#define OPTION_TRACE_FPU (OPTION_START + 9)
#define OPTION_TRACE_FILE (OPTION_START + 10)
enum {
OPTION_TRACE_INSN = OPTION_START,
OPTION_TRACE_DECODE,
OPTION_TRACE_EXTRACT,
OPTION_TRACE_LINENUM,
OPTION_TRACE_MEMORY,
OPTION_TRACE_MODEL,
OPTION_TRACE_ALU,
OPTION_TRACE_CORE,
OPTION_TRACE_EVENTS,
OPTION_TRACE_FPU,
OPTION_TRACE_BRANCH,
OPTION_TRACE_SEMANTICS,
OPTION_TRACE_FILE
};
static const OPTION trace_options[] =
{
@ -94,6 +102,12 @@ static const OPTION trace_options[] =
{ {"trace-fpu", no_argument, NULL, OPTION_TRACE_FPU},
'\0', NULL, "Perform FPU tracing",
trace_option_handler },
{ {"trace-branch", no_argument, NULL, OPTION_TRACE_BRANCH},
'\0', NULL, "Perform branch tracing",
trace_option_handler },
{ {"trace-semantics", no_argument, NULL, OPTION_TRACE_SEMANTICS},
'\0', NULL, "Perform ALU, FPU, and MEMORY tracing",
trace_option_handler },
{ {"trace-file", required_argument, NULL, OPTION_TRACE_FILE},
'\0', "FILE NAME", "Specify tracing output file",
trace_option_handler },
@ -212,6 +226,27 @@ trace_option_handler (sd, opt, arg)
sim_io_eprintf (sd, "FPU tracing not compiled in, `--trace-fpu' ignored\n");
break;
case OPTION_TRACE_BRANCH :
if (WITH_TRACE_BRANCH_P)
for (n = 0; n < MAX_NR_PROCESSORS; ++n)
CPU_TRACE_FLAGS (STATE_CPU (sd, n))[TRACE_FPU_IDX] = 1;
else
sim_io_eprintf (sd, "Branch tracing not compiled in, `--trace-branch' ignored\n");
break;
case OPTION_TRACE_SEMANTICS :
if (WITH_TRACE_ALU_P && WITH_TRACE_FPU_P && WITH_TRACE_MEMORY_P)
for (n = 0; n < MAX_NR_PROCESSORS; ++n)
{
CPU_TRACE_FLAGS (STATE_CPU (sd, n))[TRACE_ALU_IDX] = 1;
CPU_TRACE_FLAGS (STATE_CPU (sd, n))[TRACE_FPU_IDX] = 1;
CPU_TRACE_FLAGS (STATE_CPU (sd, n))[TRACE_MEMORY_IDX] = 1;
CPU_TRACE_FLAGS (STATE_CPU (sd, n))[TRACE_BRANCH_IDX] = 1;
}
else
sim_io_eprintf (sd, "Alu, fpu, and/or memory tracing not compiled in, `--trace-semantics' ignored\n");
break;
case OPTION_TRACE_FILE :
if (! WITH_TRACE)
sim_io_eprintf (sd, "Tracing not compiled in, `--trace-file' ignored\n");
@ -263,15 +298,21 @@ trace_uninstall (SIM_DESC sd)
void
trace_one_insn (SIM_DESC sd, sim_cpu *cpu, address_word pc,
int line_p, const TRACE_INSN_DATA *insn_data)
int line_p, const char *filename, int linenum,
const char *phase_wo_colon, const char *name)
{
char phase[SIZE_PHASE+2];
strncpy (phase, phase_wo_colon, SIZE_PHASE);
strcat (phase, ":");
if (!line_p)
trace_printf(sd, cpu, "trace-%s: %s:%-*d 0x%.*lx %s\n",
insn_data->phase,
*(insn_data->p_filename),
SIZE_LINE_NUMBER, insn_data->linenum,
trace_printf(sd, cpu, "%-*s %s:%-*d 0x%.*lx %s\n",
SIZE_PHASE+1, phase,
filename,
SIZE_LINE_NUMBER, linenum,
SIZE_PC, (long)pc,
*(insn_data->p_name));
name);
else
{
@ -321,13 +362,11 @@ trace_one_insn (SIM_DESC sd, sim_cpu *cpu, address_word pc,
}
}
trace_printf (sd, cpu, "trace-%s: %s:%-*d 0x%.*x %-*.*s %s\n",
insn_data->phase,
*(insn_data->p_filename),
SIZE_LINE_NUMBER, insn_data->linenum,
trace_printf (sd, cpu, "%-*s 0x%.*x %-*.*s %s\n",
SIZE_PHASE+1, phase,
SIZE_PC, (unsigned) pc,
SIZE_LOCATION, SIZE_LOCATION, buf,
*(insn_data->p_name));
name);
}
}

66
sim/common/sim-trace.h
View File

@ -29,12 +29,8 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#endif
#endif
/* Maximum number of traceable entities. */
#ifndef MAX_TRACE_VALUES
#define MAX_TRACE_VALUES 12
#endif
/* Standard traceable entities. */
#define TRACE_SEMANTICS_IDX -1 /* set ALU, FPU, MEMORY tracing */
#define TRACE_INSN_IDX 0
#define TRACE_DECODE_IDX 1
#define TRACE_EXTRACT_IDX 2
@ -45,8 +41,14 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#define TRACE_CORE_IDX 7
#define TRACE_EVENTS_IDX 8
#define TRACE_FPU_IDX 9
#define TRACE_BRANCH_IDX 10
#define TRACE_NEXT_IDX 16 /* simulator specific trace bits begin here */
/* Maximum number of traceable entities. */
#ifndef MAX_TRACE_VALUES
#define MAX_TRACE_VALUES 32
#endif
/* Masks so WITH_TRACE can have symbolic values. */
#define TRACE_insn 1
#define TRACE_decode 2
@ -58,18 +60,20 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#define TRACE_core 128
#define TRACE_events 256
#define TRACE_fpu 512
#define TRACE_branch 1024
/* Preprocessor macros to simplify tests of WITH_TRACE. */
#define WITH_TRACE_INSN_P (WITH_TRACE & TRACE_insn)
#define WITH_TRACE_DECODE_P (WITH_TRACE & TRACE_decode)
#define WITH_TRACE_EXTRACT_P (WITH_TRACE & TRACE_extract)
#define WITH_TRACE_LINENUM_P (WITH_TRACE & TRACE_linenum)
#define WITH_TRACE_MEMORY_P (WITH_TRACE & TRACE_memory)
#define WITH_TRACE_MODEL_P (WITH_TRACE & TRACE_model)
#define WITH_TRACE_ALU_P (WITH_TRACE & TRACE_alu)
#define WITH_TRACE_CORE_P (WITH_TRACE & TRACE_core)
#define WITH_TRACE_EVENTS_P (WITH_TRACE & TRACE_events)
#define WITH_TRACE_FPU_P (WITH_TRACE & TRACE_fpu)
#define WITH_TRACE_INSN_P (WITH_TRACE & TRACE_insn)
#define WITH_TRACE_DECODE_P (WITH_TRACE & TRACE_decode)
#define WITH_TRACE_EXTRACT_P (WITH_TRACE & TRACE_extract)
#define WITH_TRACE_LINENUM_P (WITH_TRACE & TRACE_linenum)
#define WITH_TRACE_MEMORY_P (WITH_TRACE & TRACE_memory)
#define WITH_TRACE_MODEL_P (WITH_TRACE & TRACE_model)
#define WITH_TRACE_ALU_P (WITH_TRACE & TRACE_alu)
#define WITH_TRACE_CORE_P (WITH_TRACE & TRACE_core)
#define WITH_TRACE_EVENTS_P (WITH_TRACE & TRACE_events)
#define WITH_TRACE_FPU_P (WITH_TRACE & TRACE_fpu)
#define WITH_TRACE_BRANCH_P (WITH_TRACE & TRACE_branch)
/* Tracing install handler. */
MODULE_INSTALL_FN trace_install;
@ -89,15 +93,6 @@ typedef struct {
FILE *trace_file;
#define TRACE_FILE(t) ((t)->trace_file)
} TRACE_DATA;
/* Structure containing constant stuff to pass to trace_one_insn */
typedef struct {
const char *phase; /* which phase this in (decode,insn) */
char **p_filename; /* ptr to filename insns where defined in */
char **p_name; /* ptr to instruction name */
int linenum; /* line number of line where insn is defined */
} TRACE_INSN_DATA;
/* Usage macros. */
@ -113,18 +108,23 @@ struct _sim_cpu;
((WITH_TRACE & (1 << (idx))) != 0 \
&& CPU_TRACE_FLAGS (cpu)[idx] != 0)
/* Non-zero if "--trace-insn" specified for CPU. */
#define TRACE_INSN_P(cpu) TRACE_P (cpu, TRACE_INSN_IDX)
/* Non-zero if "--trace-linenum" specified for CPU. */
#define TRACE_LINENUM_P(cpu) TRACE_P (cpu, TRACE_LINENUM_IDX)
/* Non-zero if "--trace-decode" specified for CPU. */
#define TRACE_DECODE_P(cpu) TRACE_P (cpu, TRACE_DECODE_IDX)
/* Non-zero if "--trace-fpu" specified for CPU. */
#define TRACE_FPU_P(cpu) TRACE_P (cpu, TRACE_FPU_IDX)
/* Non-zero if a certain --trace-<xxxx> was specified for CPU. */
#define TRACE_INSN_P(cpu) TRACE_P (cpu, TRACE_INSN_IDX)
#define TRACE_DECODE_P(cpu) TRACE_P (cpu, TRACE_DECODE_IDX)
#define TRACE_EXTRACT_P(cpu) TRACE_P (cpu, TRACE_EXTRACT_IDX)
#define TRACE_LINENUM_P(cpu) TRACE_P (cpu, TRACE_LINENUM_IDX)
#define TRACE_MEMORY_P(cpu) TRACE_P (cpu, TRACE_MEMORY_IDX)
#define TRACE_MODEL_P(cpu) TRACE_P (cpu, TRACE_MODEL_IDX)
#define TRACE_ALU_P(cpu) TRACE_P (cpu, TRACE_ALU_IDX)
#define TRACE_CORE_P(cpu) TRACE_P (cpu, TRACE_CORE_IDX)
#define TRACE_EVENTS_P(cpu) TRACE_P (cpu, TRACE_EVENTS_IDX)
#define TRACE_FPU_P(cpu) TRACE_P (cpu, TRACE_FPU_IDX)
#define TRACE_BRANCH_P(cpu) TRACE_P (cpu, TRACE_BRANCH_IDX)
extern void trace_one_insn PARAMS ((SIM_DESC, sim_cpu *,
address_word, int,
const TRACE_INSN_DATA *));
const char *, int,
const char *, const char *));
extern void trace_printf PARAMS ((SIM_DESC, sim_cpu *, const char *, ...))
__attribute__((format (printf, 3, 4)));

11
sim/igen/igen.c
View File

@ -255,13 +255,12 @@ print_itrace(lf *file,
lf_printf(file, "#if defined(WITH_TRACE)\n");
lf_printf(file, "/* trace the instructions execution if enabled */\n");
lf_printf(file, "if (TRACE_%s_P (CPU)) {\n", phase);
lf_printf(file, " static const TRACE_INSN_DATA my_insn_data = { \"%s\", &itable[MY_INDEX].file, &itable[MY_INDEX].name, %d };\n",
phase_lc,
file_entry->line_nr);
lf_printf(file, " trace_one_insn (SD, CPU, %s, TRACE_LINENUM_P (CPU), &my_insn_data);\n",
lf_printf(file, " trace_one_insn (SD, CPU, %s, TRACE_LINENUM_P (CPU),\n",
(code & generate_with_semantic_delayed_branch) ? "cia.ip" : "cia");
lf_printf(file, " itable[MY_INDEX].file, MY_INDEX, \"%s\",\n", phase_lc);
lf_printf(file, " itable[MY_INDEX].name);\n");
lf_printf(file, "}\n");
lf_indent_suppress(file);
lf_printf(file, "#endif\n");

15
sim/tic80/ChangeLog
View File

@ -1,3 +1,18 @@
Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com>
* cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
big endian hosts.
(tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
new functions.
(TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
trace various instruction types.
* insns: Modify all instructions to support semantic tracing.
* interp.c (toplevel): Include itable.h.
(tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
functions to provide semantic level tracing information.
Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
* alu.h: Update usage of core object to reflect recent changes in

108
sim/tic80/cpu.h
View File

@ -30,7 +30,107 @@ struct _sim_cpu {
#define GPR(N) ((CPU)->reg[N])
#define ACC(N) ((CPU)->acc[N])
#define SP_FPR(N) (GPR(N))
#define DP_FPR(N) (*(unsigned64*)&GPR(N))
#define vSP_FPR(N) (N == 0 ? (unsigned32)0 : GPR(N))
#define vDP_FPR(N) (*(unsigned64*)&GPR(N))
#if defined(WITH_TRACE)
extern char *tic80_trace_alu3 PARAMS ((int, unsigned32, unsigned32, unsigned32));
extern char *tic80_trace_alu2 PARAMS ((int, unsigned32, unsigned32));
extern char *tic80_trace_nop PARAMS ((int));
extern char *tic80_trace_sink1 PARAMS ((int, unsigned32));
extern char *tic80_trace_sink2 PARAMS ((int, unsigned32, unsigned32));
extern char *tic80_trace_cond_br PARAMS ((int, int, unsigned32, unsigned32));
extern char *tic80_trace_ucond_br PARAMS ((int, unsigned32));
extern char *tic80_trace_ldst PARAMS ((int, int, int, int, unsigned32, unsigned32, unsigned32));
#define TRACE_ALU3(indx, result, input1, input2) \
do { \
if (TRACE_ALU_P (CPU)) { \
trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
itable[indx].line_nr, "alu", \
tic80_trace_alu3 (indx, result, input1, input2)); \
} \
} while (0)
#define TRACE_ALU2(indx, result, input) \
do { \
if (TRACE_ALU_P (CPU)) { \
trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
itable[indx].line_nr, "alu", \
tic80_trace_alu2 (indx, result, input)); \
} \
} while (0)
#define TRACE_NOP(indx) \
do { \
if (TRACE_ALU_P (CPU)) { \
trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
itable[indx].line_nr, "nop", \
tic80_trace_nop (indx)); \
} \
} while (0)
#define TRACE_SINK1(indx, input) \
do { \
if (TRACE_ALU_P (CPU)) { \
trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
itable[indx].line_nr, "nop", \
tic80_trace_sink1 (indx, input)); \
} \
} while (0)
#define TRACE_SINK2(indx, input1, input2) \
do { \
if (TRACE_ALU_P (CPU)) { \
trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
itable[indx].line_nr, "nop", \
tic80_trace_sink2 (indx, input1, input2)); \
} \
} while (0)
#define TRACE_COND_BR(indx, jump_p, cond, target) \
do { \
if (TRACE_BRANCH_P (CPU)) { \
trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
itable[indx].line_nr, "branch", \
tic80_trace_cond_br (indx, jump_p, cond, target)); \
} \
} while (0)
#define TRACE_UCOND_BR(indx, target) \
do { \
if (TRACE_ALU_P (CPU)) { \
trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
itable[indx].line_nr, "branch", \
tic80_trace_ucond_br (indx, target)); \
} \
} while (0)
#define TRACE_LD(indx, result, m, s, addr1, addr2) \
do { \
if (TRACE_MEMORY_P (CPU)) { \
trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
itable[indx].line_nr, "memory", \
tic80_trace_ldst (indx, 0, m, s, result, \
addr1, addr2)); \
} \
} while (0)
#define TRACE_ST(indx, value, m, s, addr1, addr2) \
do { \
if (TRACE_MEMORY_P (CPU)) { \
trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
itable[indx].line_nr, "memory", \
tic80_trace_ldst (indx, 1, m, s, value, \
addr1, addr2)); \
} \
} while (0)
#else
#define TRACE_ALU3(indx, result, input1, input2)
#define TRACE_ALU2(indx, result, input)
#define TRACE_NOP(indx)
#define TRACE_SINK1(indx, input)
#define TRACE_SINK2(indx, input1, input2)
#define TRACE_COND_BR(indx, jump_p, cond, target)
#define TRACE_UCOND_BR(indx, target)
#define TRACE_LD(indx, m, s, result, addr1, addr2)
#define TRACE_ST(indx, m, s, value, addr1, addr2)
#endif

298
sim/tic80/insns
View File

@ -25,118 +25,137 @@
engine_error (SD, CPU, cia, "illegal instruction at 0x%lx", cia.ip);
// Signed Integer Add - add source1, source2, dest
void::function::do_add:signed32 *rDest, signed32 Source1, signed32 Source2
void::function::do_add:signed32 *rDest, signed32 Source1, signed32 Source2, int indx
ALU_BEGIN (Source1);
ALU_ADD (Source2);
ALU_END (*rDest);
TRACE_ALU3 (indx, *rDest, Source1, Source2);
/* FIXME - a signed add may cause an exception */
31.Dest,26.Source2,21.0b101100,15.0,14.SignedImmediate::::add i
do_add (_SD, rDest, vSource1, rSource2);
do_add (_SD, rDest, vSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b11101100,13.0,12.0,11./,4.Source1::::add r
do_add (_SD, rDest, rSource1, rSource2);
do_add (_SD, rDest, rSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b11101100,13.0,12.1,11./::::add l
long_immediate (LongSignedImmediate);
do_add (_SD, rDest, LongSignedImmediate, rSource2);
do_add (_SD, rDest, LongSignedImmediate, rSource2, MY_INDEX);
// Unsigned Integer Add - addu source1, source2, dest
void::function::do_addu:unsigned32 *rDest, unsigned32 Source1, unsigned32 Source2
*rDest = Source1 + Source2;
void::function::do_addu:unsigned32 *rDest, unsigned32 Source1, unsigned32 Source2, int indx
unsigned32 result = Source1 + Source2;
TRACE_ALU3 (indx, result, Source1, Source2);
*rDest = result;
31.Dest,26.Source2,21.0b101100,15.1,14.SignedImmediate::::addu i
do_addu (_SD, rDest, vSource1, rSource2);
do_addu (_SD, rDest, vSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b11101100,13.1,12.0,11./,4.Source1::::addu r
do_addu (_SD, rDest, rSource1, rSource2);
do_addu (_SD, rDest, rSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b11101100,13.1,12.1,11./::::addu l
long_immediate (LongSignedImmediate);
do_addu (_SD, rDest, LongSignedImmediate, rSource2);
do_addu (_SD, rDest, LongSignedImmediate, rSource2, MY_INDEX);
void::function::do_and:signed32 *rDest, signed32 Source1, signed32 Source2
*rDest = Source1 & Source2;
void::function::do_and:signed32 *rDest, signed32 Source1, signed32 Source2, int indx
unsigned32 result = Source1 & Source2;
TRACE_ALU3 (indx, result, Source1, Source2);
*rDest = result;
// and, and.tt
31.Dest,26.Source2,21.0b0010001,14.SignedImmediate::::and.tt i
do_and (_SD, rDest, vSource1, rSource2);
do_and (_SD, rDest, vSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110010001,12.0,11./,4.Source1::::and.tt r
do_and (_SD, rDest, rSource1, rSource2);
do_and (_SD, rDest, rSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110010001,12.1,11./::::and.tt l
long_immediate (LongSignedImmediate);
do_and (_SD, rDest, LongSignedImmediate, rSource2);
do_and (_SD, rDest, LongSignedImmediate, rSource2, MY_INDEX);
// and.ff
31.Dest,26.Source2,21.0b0011000,14.SignedImmediate::::and.ff i
do_and (_SD, rDest, ~vSource1, ~rSource2);
do_and (_SD, rDest, ~vSource1, ~rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110011000,12.0,11./,4.Source1::::and.ff r
do_and (_SD, rDest, ~rSource1, ~rSource2);
do_and (_SD, rDest, ~rSource1, ~rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110011000,12.1,11./::::and.ff l
long_immediate (LongSignedImmediate);
do_and (_SD, rDest, ~LongSignedImmediate, ~rSource2);
do_and (_SD, rDest, ~LongSignedImmediate, ~rSource2, MY_INDEX);
// and.ft
31.Dest,26.Source2,21.0b0010100,14.SignedImmediate::::and.ft i
do_and (_SD, rDest, ~vSource1, rSource2);
do_and (_SD, rDest, ~vSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110010100,12.0,11./,4.Source1::::and.ft r
do_and (_SD, rDest, ~rSource1, rSource2);
do_and (_SD, rDest, ~rSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110010100,12.1,11./::::and.ft l
long_immediate (LongSignedImmediate);
do_and (_SD, rDest, ~LongSignedImmediate, rSource2);
do_and (_SD, rDest, ~LongSignedImmediate, rSource2, MY_INDEX);
// and.tf
31.Dest,26.Source2,21.0b0010010,14.SignedImmediate::::and.tf i
do_and (_SD, rDest, vSource1, ~rSource2);
do_and (_SD, rDest, vSource1, ~rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110010010,12.0,11./,4.Source1::::and.tf r
do_and (_SD, rDest, rSource1, ~rSource2);
do_and (_SD, rDest, rSource1, ~rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110010010,12.1,11./::::and.tf l
long_immediate (LongSignedImmediate);
do_and (_SD, rDest, LongSignedImmediate, ~rSource2);
do_and (_SD, rDest, LongSignedImmediate, ~rSource2, MY_INDEX);
// bbo.[a]
instruction_address::function::do_bbo:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
instruction_address::function::do_bbo:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset, int indx
int jump_p;
unsigned32 target = cia.ip + 4 * offset;
if (MASKED32 (source, bitnum, bitnum))
{
if (annul)
nia.ip = -1;
nia.dp = cia.ip + 4 * offset;
nia.dp = target;
jump_p = 1;
}
else
jump_p = 0;
TRACE_COND_BR(indx, jump_p, bitnum, target);
return nia;
31.BITNUM,26.Source,21.0b100101,15.A,14.SignedOffset::::bbo i
nia = do_bbo (_SD, nia, BITNUM, rSource, A, vSignedOffset);
nia = do_bbo (_SD, nia, BITNUM, rSource, A, vSignedOffset, MY_INDEX);
31.BITNUM,26.Source,21.0b11100101,13.A,12.0,11./,4.IndOff::::bbo r
nia = do_bbo (_SD, nia, BITNUM, rSource, A, rIndOff);
nia = do_bbo (_SD, nia, BITNUM, rSource, A, rIndOff, MY_INDEX);
31.BITNUM,26.Source,21.0b11100101,13.A,12.1,11./::::bbo l
long_immediate (LongSignedImmediate);
nia = do_bbo (_SD, nia, BITNUM, rSource, A, LongSignedImmediate);
nia = do_bbo (_SD, nia, BITNUM, rSource, A, LongSignedImmediate, MY_INDEX);
// bbz[.a]
instruction_address::function::do_bbz:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
instruction_address::function::do_bbz:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset, int indx
int jump_p;
unsigned32 target = cia.ip + 4 * offset;
if (!MASKED32 (source, bitnum, bitnum))
{
if (annul)
nia.ip = -1;
nia.dp = cia.ip + 4 * offset;
nia.dp = target;
jump_p = 1;
}
else
jump_p = 0;
TRACE_COND_BR(indx, jump_p, bitnum, target);
return nia;
31.BITNUM,26.Source,21.0b100100,15.A,14.SignedOffset::::bbz i
nia = do_bbz (_SD, nia, BITNUM, rSource, A, vSignedOffset);
nia = do_bbz (_SD, nia, BITNUM, rSource, A, vSignedOffset, MY_INDEX);
31.BITNUM,26.Source,21.0b11100100,13.A,12.0,11./,4.IndOff::::bbz r
nia = do_bbz (_SD, nia, BITNUM, rSource, A, rIndOff);
nia = do_bbz (_SD, nia, BITNUM, rSource, A, rIndOff, MY_INDEX);
31.BITNUM,26.Source,21.0b11100100,13.A,12.1,11./::::bbz l
long_immediate (LongSignedImmediate);
nia = do_bbz (_SD, nia, BITNUM, rSource, A, LongSignedImmediate);
nia = do_bbz (_SD, nia, BITNUM, rSource, A, LongSignedImmediate, MY_INDEX);
// bcnd[.a]
instruction_address::function::do_bcnd:instruction_address nia, int Cond, unsigned32 source, int annul, unsigned32 offset
instruction_address::function::do_bcnd:instruction_address nia, int Cond, unsigned32 source, int annul, unsigned32 offset, int indx
int condition;
int size = EXTRACTED32 (Cond, 31 - 27, 30 - 27);
int code = EXTRACTED32 (Cond, 29 - 27, 27 - 27);
signed32 val = 0;
unsigned32 target = cia.ip + 4 * offset;
switch (size)
{
case 0: val = SEXT32 (source, 7); break;
@ -159,16 +178,17 @@ instruction_address::function::do_bcnd:instruction_address nia, int Cond, unsign
{
if (annul)
nia.ip = -1;
nia.dp = cia.ip + 4 * offset;
nia.dp = target;
}
TRACE_COND_BR(indx, condition, source, target);
return nia;
31.Code,26.Source,21.0b100110,15.A,14.SignedOffset::::bcnd i
nia = do_bcnd (_SD, nia, Code, rSource, A, vSignedOffset);
nia = do_bcnd (_SD, nia, Code, rSource, A, vSignedOffset, MY_INDEX);
31.Code,26.Source,21.0b11100110,13.A,12.0,11./,4.IndOff::::bcnd r
nia = do_bcnd (_SD, nia, Code, rSource, A, rIndOff);
nia = do_bcnd (_SD, nia, Code, rSource, A, rIndOff, MY_INDEX);
31.Code,26.Source,21.0b11100110,13.A,12.1,11./::::bcnd l
long_immediate (LongSignedImmediate);
nia = do_bcnd (_SD, nia, Code, rSource, A, LongSignedImmediate);
nia = do_bcnd (_SD, nia, Code, rSource, A, LongSignedImmediate, MY_INDEX);
// br[.a] - see bbz[.a]
@ -186,7 +206,7 @@ instruction_address::function::do_bcnd:instruction_address nia, int Cond, unsign
// bsr[.a]
instruction_address::function::do_bsr:instruction_address nia, signed32 *rLink, int annul, unsigned32 offset
instruction_address::function::do_bsr:instruction_address nia, signed32 *rLink, int annul, unsigned32 offset, int indx
if (annul)
{
*rLink = nia.ip;
@ -195,18 +215,19 @@ instruction_address::function::do_bsr:instruction_address nia, signed32 *rLink,
else
*rLink = cia.dp + sizeof (instruction_word);
nia.dp = cia.ip + 4 * offset;
TRACE_UCOND_BR (indx, nia.dp);
return nia;
31.Link,26./,21.0b100000,15.A,14.SignedOffset::::bsr i
nia = do_bsr (_SD, nia, rLink, A, vSignedOffset);
nia = do_bsr (_SD, nia, rLink, A, vSignedOffset, MY_INDEX);
31.Link,26./,21.0b11100000,13.A,12.0,11./,4.IndOff::::bsr r
nia = do_bsr (_SD, nia, rLink, A, rIndOff);
nia = do_bsr (_SD, nia, rLink, A, rIndOff, MY_INDEX);
31.Link,26./,21.0b11100000,13.A,12.1,11./::::bsr l
long_immediate (LongSignedImmediate);
nia = do_bsr (_SD, nia, rLink, A, LongSignedImmediate);
nia = do_bsr (_SD, nia, rLink, A, LongSignedImmediate, MY_INDEX);
// cmnd
void::function::do_cmnd:signed32 source
void::function::do_cmnd:signed32 source, int indx
int Reset = EXTRACTED32 (source, 31, 31);
int Halt = EXTRACTED32 (source, 30, 30);
int Unhalt = EXTRACTED32 (source, 29, 29);
@ -243,13 +264,14 @@ void::function::do_cmnd:signed32 source
engine_error (SD, CPU, cia, "0x%lx: cmnd - Msg to MP not suported",
(unsigned long) cia.ip);
}
TRACE_SINK1 (indx, source);
31./,21.0b0000010,14.UI::::cmnd i
do_cmnd (_SD, UI);
do_cmnd (_SD, UI, MY_INDEX);
31./,21.0b110000010,12.0,11./,4.Source::::cmnd r
do_cmnd (_SD, rSource);
do_cmnd (_SD, rSource, MY_INDEX);
31./,21.0b110000010,12.1,11./::::cmnd l
long_immediate (LongUnsignedImmediate);
do_cmnd (_SD, LongUnsignedImmediate);
do_cmnd (_SD, LongUnsignedImmediate, MY_INDEX);
// cmp
unsigned32::function::cmp_vals:signed32 s1, unsigned32 u1, signed32 s2, unsigned32 u2
@ -265,7 +287,7 @@ unsigned32::function::cmp_vals:signed32 s1, unsigned32 u1, signed32 s2, unsigned
if (u1 < u2) field |= BIT32 (8);
if (u1 >= u2) field |= BIT32 (9);
return field;
void::function::do_cmp:unsigned32 *rDest, unsigned32 Source1, unsigned32 Source2
void::function::do_cmp:unsigned32 *rDest, unsigned32 Source1, unsigned32 Source2, int indx
unsigned32 field = 0;
field |= INSERTED32 (cmp_vals (_SD, Source2, Source1, Source2, Source2),
29, 20);
@ -275,61 +297,64 @@ void::function::do_cmp:unsigned32 *rDest, unsigned32 Source1, unsigned32 Source2
field |= INSERTED32 (cmp_vals (_SD, (signed8)Source1, (unsigned8)Source1,
(signed8)Source2, (unsigned8)Source2),
9, 0);
TRACE_ALU3 (indx, field, Source1, Source2);
*rDest = field;
31.Dest,26.Source2,21.0b1010000,14.SignedImmediate::::cmp i
do_cmp (_SD, rDest, vSource1, rSource2);
do_cmp (_SD, rDest, vSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b111010000,12.0,11./,4.Source1::::cmp r
do_cmp (_SD, rDest, rSource1, rSource2);
do_cmp (_SD, rDest, rSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b111010000,12.1,11./::::cmp l
long_immediate (LongSignedImmediate);
do_cmp (_SD, rDest, LongSignedImmediate, rSource2);
do_cmp (_SD, rDest, LongSignedImmediate, rSource2, MY_INDEX);
// dcache
31./,27.F,26.Source2,21.0b0111,17.M,16.0b00,14.SignedOffset::::dcache i
TRACE_NOP (MY_INDEX);
/* NOP */
31./,27.F,26.Source2,21.0b110111,15.M,14.0b00,12.0,11./,4.Source1::::dcache r
TRACE_NOP (MY_INDEX);
/* NOP */
31./,27.F,26.Source2,21.0b110111,15.M,14.0b00,12.1,11./::::dcache l
long_immediate (LongSignedImmediate);
LongSignedImmediate++;
TRACE_NOP (MY_INDEX);
/* NOP */
// dld[{.b|.h|.d}]
void::function::do_dld:int Dest, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset
do_ld (_SD, Dest, Base, rBase, m, sz, S, Offset);
void::function::do_dld:int Dest, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset, int indx
do_ld (_SD, Dest, Base, rBase, m, sz, S, Offset, indx);
31.Dest,26.Base,21.0b110100,15.m,14.sz,12.0,11.S,10.1,9./,4.IndOff::::dld r
do_dld (_SD, Dest, rBase, &GPR(Base), m, sz, S, rIndOff);
do_dld (_SD, Dest, rBase, &GPR(Base), m, sz, S, rIndOff, MY_INDEX);
31.Dest,26.Base,21.0b110100,15.m,14.sz,12.1,11.S,10.1,9./::::dld l
long_immediate (LongSignedImmediateOffset);
do_dld (_SD, Dest, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset);
do_dld (_SD, Dest, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset, MY_INDEX);
// dld.u[{.b|.h|.d}]
void::function::do_dld_u:unsigned32 *rDest, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset
do_ld_u (_SD, rDest, Base, rBase, m, sz, S, Offset);
void::function::do_dld_u:unsigned32 *rDest, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset, int indx
do_ld_u (_SD, rDest, Base, rBase, m, sz, S, Offset, indx);
31.Dest,26.Base,21.0b110101,15.m,14.sz,12.0,11.S,10.1,9./,4.IndOff::::dld.u r
do_dld_u (_SD, rDest, rBase, &GPR(Base), m, sz, S, rIndOff);
do_dld_u (_SD, rDest, rBase, &GPR(Base), m, sz, S, rIndOff, MY_INDEX);
31.Dest,26.Base,21.0b110101,15.m,14.sz,12.1,11.S,10.1,9./::::dld.u l
long_immediate (LongSignedImmediateOffset);
do_dld_u (_SD, rDest, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset);
do_dld_u (_SD, rDest, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset, MY_INDEX);
// dst[{.b|.h|.d}]
void::function::do_dst:int Source, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset
do_st (_SD, Source, Base, rBase, m, sz, S, Offset);
void::function::do_dst:int Source, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset, int indx
do_st (_SD, Source, Base, rBase, m, sz, S, Offset, indx);
31.Source,26.Base,21.0b110110,15.m,14.sz,12.0,11.S,10.1,9./,4.IndOff::::dst r
do_dst (_SD, Source, rBase, &GPR(Base), m, sz, S, rIndOff);
do_dst (_SD, Source, rBase, &GPR(Base), m, sz, S, rIndOff, MY_INDEX);
31.Source,26.Base,21.0b110110,15.m,14.sz,12.1,11.S,10.1,9./::::dst l
long_immediate (LongSignedImmediateOffset);
do_dst (_SD, Source, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset);
do_dst (_SD, Source, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset, MY_INDEX);
// estop
31./,21.0b1111111,14.1,13.0,12.0,11./::::estop
// etrap
31./,27.1,26./,21.0b0000001,14.UTN::::etrap i
31./,27.1,26./,21.0b110000001,12.0,11./,4.iUTN::::etrap r
@ -584,7 +609,8 @@ void::function::do_fsub:int Dest, int PD, sim_fpu s1, sim_fpu s2
// jsr[.a]
instruction_address::function::do_jsr:instruction_address nia, signed32 *rLink, int annul, unsigned32 offset, unsigned32 base
instruction_address::function::do_jsr:instruction_address nia, signed32 *rLink, int annul, unsigned32 offset, unsigned32 base, int indx
TRACE_UCOND_BR (indx, nia.ip);
if (annul)
{
*rLink = nia.ip;
@ -600,16 +626,16 @@ instruction_address::function::do_jsr:instruction_address nia, signed32 *rLink,
(unsigned long) nia.dp);
return nia;
31.Link,26.Base,21.0b100010,15.A,14.SignedOffset::::jsr i
nia = do_jsr (_SD, nia, rLink, A, vSignedOffset, rBase);
nia = do_jsr (_SD, nia, rLink, A, vSignedOffset, rBase, MY_INDEX);
31.Link,26.Base,21.0b11100010,13.A,12.0,11./,4.Source1::::jsr r
nia = do_jsr (_SD, nia, rLink, A, rSource1, rBase);
nia = do_jsr (_SD, nia, rLink, A, rSource1, rBase, MY_INDEX);
31.Link,26.Base,21.0b11100010,13.A,12.1,11./::::jsr l
long_immediate (LongSignedImmediate);
nia = do_jsr (_SD, nia, rLink, A, LongSignedImmediate, rBase);
nia = do_jsr (_SD, nia, rLink, A, LongSignedImmediate, rBase, MY_INDEX);
// ld[{.b.h.d}]
void::function::do_ld:int Dest, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset
void::function::do_ld:int Dest, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset, int indx
unsigned32 addr;
switch (sz)
{
@ -644,17 +670,18 @@ void::function::do_ld:int Dest, unsigned32 Base, unsigned32 *rBase, int m , int
addr = -1;
engine_error (SD, CPU, cia, "ld - invalid sz %d", sz);
}
TRACE_LD (indx, m, S, GPR(Dest), Base, Offset);
31.Dest,26.Base,21.0b0100,17.m,16.sz,14.SignedOffset::::ld i
do_ld (_SD, Dest, rBase, &GPR(Base), m, sz, 0, vSignedOffset);
do_ld (_SD, Dest, rBase, &GPR(Base), m, sz, 0, vSignedOffset, MY_INDEX);
31.Dest,26.Base,21.0b110100,15.m,14.sz,12.0,11.S,10.0,9./,4.IndOff::::ld r
do_ld (_SD, Dest, rBase, &GPR(Base), m, sz, S, rIndOff);
do_ld (_SD, Dest, rBase, &GPR(Base), m, sz, S, rIndOff, MY_INDEX);
31.Dest,26.Base,21.0b110100,15.m,14.sz,12.1,11.S,10.0,9./::::ld l
long_immediate (LongSignedImmediateOffset);
do_ld (_SD, Dest, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset);
do_ld (_SD, Dest, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset, MY_INDEX);
// ld.u[{.b.h.d}]
void::function::do_ld_u:unsigned32 *rDest, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset
void::function::do_ld_u:unsigned32 *rDest, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset, int indx
unsigned32 addr;
switch (sz)
{
@ -672,13 +699,14 @@ void::function::do_ld_u:unsigned32 *rDest, unsigned32 Base, unsigned32 *rBase, i
}
if (m)
*rBase = addr;
TRACE_LD (indx, m, S, *rDest, Base, Offset);
31.Dest,26.Base,21.0b0101,17.m,16.sz,14.SignedOffset::::ld.u i
do_ld_u (_SD, rDest, rBase, &GPR(Base), m, sz, 0, vSignedOffset);
do_ld_u (_SD, rDest, rBase, &GPR(Base), m, sz, 0, vSignedOffset, MY_INDEX);
31.Dest,26.Base,21.0b110101,15.m,14.sz,12.0,11.S,10.0,9./,4.IndOff::::ld.u r
do_ld_u (_SD, rDest, rBase, &GPR(Base), m, sz, S, rIndOff);
do_ld_u (_SD, rDest, rBase, &GPR(Base), m, sz, S, rIndOff, MY_INDEX);
31.Dest,26.Base,21.0b110101,15.m,14.sz,12.1,11.S,10.0,9./::::ld.u l
long_immediate (LongSignedImmediateOffset);
do_ld_u (_SD, rDest, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset);
do_ld_u (_SD, rDest, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset, MY_INDEX);
// lmo
@ -688,61 +716,64 @@ void::function::do_ld_u:unsigned32 *rDest, unsigned32 Base, unsigned32 *rBase, i
// nop - see rdcr 0, r0
void::function::do_or:unsigned32 *rDest, unsigned32 Source1, unsigned32 Source2
*rDest = Source1 | Source2;
void::function::do_or:unsigned32 *rDest, unsigned32 Source1, unsigned32 Source2, int indx
unsigned32 result = Source1 | Source2;
TRACE_ALU3 (indx, result, Source1, Source2);
*rDest = result;
// or, or.tt
31.Dest,26.Source2,21.0b0010111,14.UnsignedImmediate::::or.tt i
do_or (_SD, rDest, vSource1, rSource2);
do_or (_SD, rDest, vSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110010111,12.0,11./,4.Source1::::or.tt r
do_or (_SD, rDest, rSource1, rSource2);
do_or (_SD, rDest, rSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110010111,12.1,11./::::or.tt l
long_immediate (LongUnsignedImmediate);
do_or (_SD, rDest, LongUnsignedImmediate, rSource2);
do_or (_SD, rDest, LongUnsignedImmediate, rSource2, MY_INDEX);
// or.ff
31.Dest,26.Source2,21.0b0011110,14.UnsignedImmediate::::or.ff i
do_or (_SD, rDest, ~vSource1, ~rSource2);
do_or (_SD, rDest, ~vSource1, ~rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110011110,12.0,11./,4.Source1::::or.ff r
do_or (_SD, rDest, ~rSource1, ~rSource2);
do_or (_SD, rDest, ~rSource1, ~rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110011110,12.1,11./::::or.ff l
long_immediate (LongUnsignedImmediate);
do_or (_SD, rDest, ~LongUnsignedImmediate, ~rSource2);
do_or (_SD, rDest, ~LongUnsignedImmediate, ~rSource2, MY_INDEX);
// or.ft
31.Dest,26.Source2,21.0b0011101,14.UnsignedImmediate::::or.ft i
do_or (_SD, rDest, ~vSource1, rSource2);
do_or (_SD, rDest, ~vSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110011101,12.0,11./,4.Source1::::or.ft r
do_or (_SD, rDest, ~rSource1, rSource2);
do_or (_SD, rDest, ~rSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110011101,12.1,11./::::or.ft l
long_immediate (LongUnsignedImmediate);
do_or (_SD, rDest, ~LongUnsignedImmediate, rSource2);
do_or (_SD, rDest, ~LongUnsignedImmediate, rSource2, MY_INDEX);
// or.tf
31.Dest,26.Source2,21.0b0011011,14.UnsignedImmediate::::or.tf i
do_or (_SD, rDest, vSource1, ~rSource2);
do_or (_SD, rDest, vSource1, ~rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110011011,12.0,11./,4.Source1::::or.tf r
do_or (_SD, rDest, rSource1, ~rSource2);
do_or (_SD, rDest, rSource1, ~rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110011011,12.1,11./::::or.tf l
long_immediate (LongUnsignedImmediate);
do_or (_SD, rDest, LongUnsignedImmediate, ~rSource2);
do_or (_SD, rDest, LongUnsignedImmediate, ~rSource2, MY_INDEX);
// rdcr
void::function::do_rdcr:unsigned32 Dest, int cr
void::function::do_rdcr:unsigned32 Dest, int cr, int indx
TRACE_SINK2 (indx, Dest, cr);
if (Dest != 0)
engine_error (SD, CPU, cia, "rdcr unimplement");
31.Dest,26.0,21.0b0000100,14.UCRN::::rdcr i
do_rdcr (_SD, Dest, UCRN);
do_rdcr (_SD, Dest, UCRN, MY_INDEX);
31.Dest,26.0,21.0b110000100,12.0,11./,4.INDCR::::rdcr r
do_rdcr (_SD, Dest, UCRN);
do_rdcr (_SD, Dest, UCRN, MY_INDEX);
31.Dest,26.0,21.0b110000100,12.1,11./::::rdcr l
long_immediate (UnsignedControlRegisterNumber);
do_rdcr (_SD, Dest, UnsignedControlRegisterNumber);
do_rdcr (_SD, Dest, UnsignedControlRegisterNumber, MY_INDEX);
// rmo
@ -759,8 +790,9 @@ void::function::do_rdcr:unsigned32 Dest, int cr
// sl.{d|e|i}{m|s|z}
void::function::do_shift:int Dest, int Source, int Merge, int i, int n, int EndMask, int Rotate
void::function::do_shift:int Dest, int Source, int Merge, int i, int n, int EndMask, int Rotate, int indx
/* see 10-30 for a reasonable description */
unsigned32 input = GPR (Source);
unsigned32 rotated;
unsigned32 endmask;
unsigned32 shiftmask;
@ -829,8 +861,9 @@ void::function::do_shift:int Dest, int Source, int Merge, int i, int n, int EndM
cia.ip, Source);
}
TRACE_ALU2 (indx, GPR (Dest), input);
31.Dest,26.Source,21.0b0001,17.Merge,14./,11.i,10.n,9.EndMask,4.Rotate::::sl i
do_shift (_SD, Dest, Source, Merge, i, n, EndMask, Rotate);
do_shift (_SD, Dest, Source, Merge, i, n, EndMask, Rotate, MY_INDEX);
31.Dest,26.Source,21.0b110001,15.Merge,12.0,11.i,10.n,9.EndMask,4.RotReg::::sl r
int endmask;
if (EndMask == 0)
@ -843,7 +876,7 @@ void::function::do_shift:int Dest, int Source, int Merge, int i, int n, int EndM
cia.ip, Source);
endmask = GPR (Source + 1) & 31;
}
do_shift (_SD, Dest, Source, Merge, i, n, endmask, GPR (RotReg) & 31);
do_shift (_SD, Dest, Source, Merge, i, n, endmask, GPR (RotReg) & 31, MY_INDEX);
// sli.{d|e|i}{m|s|z}
@ -868,7 +901,7 @@ void::function::do_shift:int Dest, int Source, int Merge, int i, int n, int EndM
// st[{.b|.h|.d}]
void::function::do_st:int Source, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset
void::function::do_st:int Source, unsigned32 Base, unsigned32 *rBase, int m , int sz, int S, unsigned32 Offset, int indx
unsigned32 addr;
switch (sz)
{
@ -897,54 +930,59 @@ void::function::do_st:int Source, unsigned32 Base, unsigned32 *rBase, int m , in
}
if (m)
*rBase = addr;
TRACE_ST (indx, m, S, Source, Base, Offset);
31.Source,26.Base,21.0b0110,17.m,16.sz,14.SignedOffset::::st i
do_st (_SD, Source, rBase, &GPR(Base), m, sz, 0, vSignedOffset);
do_st (_SD, Source, rBase, &GPR(Base), m, sz, 0, vSignedOffset, MY_INDEX);
31.Source,26.Base,21.0b110110,15.m,14.sz,12.0,11.S,10.0,9./,4.IndOff::::st r
do_st (_SD, Source, rBase, &GPR(Base), m, sz, S, rIndOff);
do_st (_SD, Source, rBase, &GPR(Base), m, sz, S, rIndOff, MY_INDEX);
31.Source,26.Base,21.0b110110,15.m,14.sz,12.1,11.S,10.0,9./::::st l
long_immediate (LongSignedImmediateOffset);
do_st (_SD, Source, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset);
do_st (_SD, Source, rBase, &GPR(Base), m, sz, S, LongSignedImmediateOffset, MY_INDEX);
// sub
void::function::do_sub:signed32 *rDest, signed32 Source1, signed32 Source2
void::function::do_sub:signed32 *rDest, signed32 Source1, signed32 Source2, int indx
ALU_BEGIN (Source1);
ALU_SUB (Source2);
ALU_END (*rDest);
ALU_END (*rDest);
TRACE_ALU3 (indx, *rDest, Source1, Source2);
31.Dest,26.Source2,21.0b101101,15.0,14.SignedImmediate::::sub i
do_sub (_SD, rDest, vSource1, rSource2);
do_sub (_SD, rDest, vSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b11101101,13.0,12.0,11./,4.Source1::::sub r
do_sub (_SD, rDest, rSource1, rSource2);
do_sub (_SD, rDest, rSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b11101101,13.0,12.1,11./::::sub l
long_immediate (LongSignedImmediate);
do_sub (_SD, rDest, LongSignedImmediate, rSource2);
do_sub (_SD, rDest, LongSignedImmediate, rSource2, MY_INDEX);
// subu
void::function::do_subu:signed32 *rDest, signed32 Source1, signed32 Source2
*rDest = Source1 - Source2;
void::function::do_subu:signed32 *rDest, signed32 Source1, signed32 Source2, int indx
unsigned32 result = Source1 - Source2;
TRACE_ALU3 (indx, result, Source1, Source2);
*rDest = result;
// NOTE - the book has 15.1 which conflicts with subu.
31.Dest,26.Source2,21.0b101101,15.1,14.SignedImmediate::::subu i
do_subu (_SD, rDest, vSource1, rSource2);
do_subu (_SD, rDest, vSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b11101101,13.1,12.0,11./,4.Source1::::subu r
do_subu (_SD, rDest, rSource1, rSource2);
do_subu (_SD, rDest, rSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b11101101,13.1,12.1,11./::::subu l
long_immediate (LongSignedImmediate);
do_subu (_SD, rDest, LongSignedImmediate, rSource2);
do_subu (_SD, rDest, LongSignedImmediate, rSource2, MY_INDEX);
// swcr
#void::function::do_swcr:signed32 *rDest, signed32 Source1, signed32 Source2
#void::function::do_swcr:signed32 *rDest, signed32 Source1, signed32 Source2, int indx
31.Dest,26.Source,21.0b000010,15.1,14.SignedImmediate::::swcr i
# do_swcr (_SD, rDest, SI, rSource2);
# do_swcr (_SD, rDest, SI, rSource2, MY_INDEX);
31.Dest,26.Source,21.0b11000010,13.1,12.0,11./,4.INDCR::::swcr r
# do_swcr (_SD, rDest, rSource1, rSource2);
# do_swcr (_SD, rDest, rSource1, rSource2, MY_INDEX);
31.Dest,26.Source,21.0b11000010,13.1,12.1,11./::::swcr l
# do_swcr (_SD, rDest, LongSignedImmediate, rSource2);
# do_swcr (_SD, rDest, LongSignedImmediate, rSource2, MY_INDEX);
// trap
void::function::do_trap:unsigned32 trap_number
void::function::do_trap:unsigned32 trap_number, int indx
TRACE_SINK1 (indx, trap_number);
switch (trap_number)
{
case 72:
@ -993,12 +1031,12 @@ void::function::do_trap:unsigned32 trap_number
(unsigned long) cia.ip, trap_number);
}
31./,27.0,26./,21.0b0000001,14.UTN::::trap i
do_trap (_SD, UTN);
do_trap (_SD, UTN, MY_INDEX);
31./,27.0,26./,21.0b110000001,12.0,11./,4.INDTR::::trap r
do_trap (_SD, UTN);
do_trap (_SD, UTN, MY_INDEX);
31./,27.0,26./,21.0b110000001,12.1,11./::::trap l
long_immediate (UTN);
do_trap (_SD, UTN);
do_trap (_SD, UTN, MY_INDEX);
// vadd.{s|d}{s|d}
@ -1057,24 +1095,28 @@ void::function::do_trap:unsigned32 trap_number
// xnor
void::function::do_xnor:signed32 *rDest, signed32 Source1, signed32 Source2
*rDest = ~ (Source1 ^ Source2);
void::function::do_xnor:signed32 *rDest, signed32 Source1, signed32 Source2, int indx
unsigned32 result = ~ (Source1 ^ Source2);
TRACE_ALU3 (indx, result, Source1, Source2);
*rDest = result;
31.Dest,26.Source2,21.0b0011001,14.UnsignedImmediate::::xnor i
do_xnor (_SD, rDest, vSource1, rSource2);
do_xnor (_SD, rDest, vSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110011001,12.0,11./,4.Source1::::xnor r
do_xnor (_SD, rDest, rSource1, rSource2);
do_xnor (_SD, rDest, rSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110011001,12.1,11./::::xnor l
long_immediate (LongUnsignedImmediate);
do_xnor (_SD, rDest, LongUnsignedImmediate, rSource2);
do_xnor (_SD, rDest, LongUnsignedImmediate, rSource2, MY_INDEX);
// xor
void::function::do_xor:signed32 *rDest, signed32 Source1, signed32 Source2
*rDest = Source1 ^ Source2;
void::function::do_xor:signed32 *rDest, signed32 Source1, signed32 Source2, int indx
unsigned32 result = Source1 ^ Source2;
TRACE_ALU3 (indx, result, Source1, Source2);
*rDest = result;
31.Dest,26.Source2,21.0b0010110,14.UnsignedImmediate::::xor i
do_xor (_SD, rDest, vSource1, rSource2);
do_xor (_SD, rDest, vSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110010110,13.0,12.0,11./,4.Source1::::xor r
do_xor (_SD, rDest, rSource1, rSource2);
do_xor (_SD, rDest, rSource1, rSource2, MY_INDEX);
31.Dest,26.Source2,21.0b110010110,13.0,12.1,11./::::xor l
long_immediate (LongUnsignedImmediate);
do_xor (_SD, rDest, LongUnsignedImmediate, rSource2);
do_xor (_SD, rDest, LongUnsignedImmediate, rSource2, MY_INDEX);

209
sim/tic80/interp.c
View File

@ -24,6 +24,7 @@
#include "sim-main.h"
#include "idecode.h"
#include "itable.h"
#include <signal.h>
@ -128,3 +129,211 @@ engine_run_until_stop (SIM_DESC sd,
engine_halt (sd, cpu, cia, sim_stopped, SIGINT);
}
}
#if defined(WITH_TRACE)
/* Tracing support routines */
static char tic80_trace_buffer[1024];
static int tic80_size_name;
#define SIZE_HEX 8
#define SIZE_DECIMAL 12
/* Initialize tracing by calculating the maximum name size */
static void
tic80_init_trace (void)
{
int i;
int len, max_len = 0;
for (i = 0; i < (int)nr_itable_entries; i++) {
len = strlen (itable[i].name);
if (len > max_len)
max_len = len;
}
tic80_size_name = max_len + sizeof(":m") - 1 + sizeof (":s") - 1;
}
/* Trace the result of an ALU operation with 2 integer inputs and an integer output */
char *
tic80_trace_alu3 (int indx,
unsigned32 result,
unsigned32 input1,
unsigned32 input2)
{
char buf1[SIZE_DECIMAL+10], buf2[SIZE_DECIMAL+10], bufr[SIZE_DECIMAL+10];
if (!tic80_size_name)
tic80_init_trace ();
sprintf (bufr, "(%ld)", (long) (signed32) result);
sprintf (buf1, "(%ld)", (long) (signed32) input1);
sprintf (buf2, "(%ld)", (long) (signed32) input2);
sprintf (tic80_trace_buffer, "%-*s 0x%.*lx %-*s 0x%.*lx %-*s => 0x%.*lx %-*s",
tic80_size_name, itable[indx].name,
SIZE_HEX, input1, SIZE_DECIMAL, buf1,
SIZE_HEX, input2, SIZE_DECIMAL, buf2,
SIZE_HEX, result, SIZE_DECIMAL, bufr);
return tic80_trace_buffer;
}
/* Trace the result of an ALU operation with 1 integer input and an integer output */
char *
tic80_trace_alu2 (int indx,
unsigned32 result,
unsigned32 input)
{
char bufi[SIZE_DECIMAL+10], bufr[SIZE_DECIMAL+10];
if (!tic80_size_name)
tic80_init_trace ();
sprintf (bufr, "(%ld)", (long) (signed32) result);
sprintf (bufi, "(%ld)", (long) (signed32) input);
sprintf (tic80_trace_buffer, "%-*s 0x%.*lx %-*s %*s => 0x%.*lx %-*s",
tic80_size_name, itable[indx].name,
SIZE_HEX, input, SIZE_DECIMAL, bufi,
SIZE_HEX + SIZE_DECIMAL + 3, "",
SIZE_HEX, result, SIZE_DECIMAL, bufr);
return tic80_trace_buffer;
}
/* Trace the result of a NOP operation */
char *
tic80_trace_nop (int indx)
{
if (!tic80_size_name)
tic80_init_trace ();
sprintf (tic80_trace_buffer, "%s:", itable[indx].name);
return tic80_trace_buffer;
}
/* Trace the result of a data sink with one input */
char *
tic80_trace_sink1 (int indx, unsigned32 input)
{
char buf[SIZE_DECIMAL+10];
if (!tic80_size_name)
tic80_init_trace ();
sprintf (buf, "(%ld)", (long) (signed32) input);
sprintf (tic80_trace_buffer, "%-*s: 0x%.*lx %-*s",
tic80_size_name, itable[indx].name,
SIZE_HEX, input, SIZE_DECIMAL, buf);
return tic80_trace_buffer;
}
/* Trace the result of a data sink with two inputs */
char *
tic80_trace_sink2 (int indx, unsigned32 input1, unsigned32 input2)
{
char buf1[SIZE_DECIMAL+10], buf2[SIZE_DECIMAL+10];
if (!tic80_size_name)
tic80_init_trace ();
sprintf (buf1, "(%ld)", (long) (signed32) input1);
sprintf (buf2, "(%ld)", (long) (signed32) input2);
sprintf (tic80_trace_buffer, "%-*s: 0x%.*lx %-*s 0x%.*lx %-*s",
tic80_size_name, itable[indx].name,
SIZE_HEX, input1, SIZE_DECIMAL, buf1,
SIZE_HEX, input2, SIZE_DECIMAL, buf2);
return tic80_trace_buffer;
}
/* Trace the result of a conditional branch operation */
char *
tic80_trace_cond_br (int indx,
int jump_p,
unsigned32 cond,
unsigned32 target)
{
char buf[SIZE_DECIMAL+10];
if (!tic80_size_name)
tic80_init_trace ();
sprintf (buf, "(%ld)", (long) (signed32) cond);
if (jump_p)
sprintf (tic80_trace_buffer,
"%-*s 0x%.*lx %*s 0x%.*lx %-*s => 0x%.*lx",
tic80_size_name, itable[indx].name,
SIZE_HEX, target, SIZE_DECIMAL, "",
SIZE_HEX, cond, SIZE_DECIMAL, buf,
SIZE_HEX, target);
else
sprintf (tic80_trace_buffer,
"%-*s 0x%.*lx %*s 0x%.*lx %-*s => [fallthrough]",
tic80_size_name, itable[indx].name,
SIZE_HEX, target, SIZE_DECIMAL, "",
SIZE_HEX, cond, SIZE_DECIMAL, buf);
return tic80_trace_buffer;
}
/* Trace the result of a unconditional branch operation */
char *
tic80_trace_ucond_br (int indx,
unsigned32 target)
{
if (!tic80_size_name)
tic80_init_trace ();
sprintf (tic80_trace_buffer,
"%-*s 0x%.*lx %*s => 0x%.*lx",
tic80_size_name, itable[indx].name,
SIZE_HEX, target, (SIZE_DECIMAL*2) + SIZE_HEX + 4, "",
SIZE_HEX, target);
return tic80_trace_buffer;
}
/* Trace the result of a load or store operation with 2 integer addresses
and an integer output or input */
char *
tic80_trace_ldst (int indx,
int st_p,
int m_p,
int s_p,
unsigned32 value,
unsigned32 input1,
unsigned32 input2)
{
char buf1[SIZE_DECIMAL+10], buf2[SIZE_DECIMAL+10], bufr[SIZE_DECIMAL+10];
char name[40];
if (!tic80_size_name)
tic80_init_trace ();
strcpy (name, itable[indx].name);
if (m_p)
strcat (name, ":m");
if (s_p)
strcat (name, ":s");
sprintf (bufr, "(%ld)", (long) (signed32) value);
sprintf (buf1, "(%ld)", (long) (signed32) input1);
sprintf (buf2, "(%ld)", (long) (signed32) input2);
sprintf (tic80_trace_buffer, "%-*s 0x%.*lx %-*s 0x%.*lx %-*s %s 0x%.*lx %-*s",
tic80_size_name, name,
SIZE_HEX, input1, SIZE_DECIMAL, buf1,
SIZE_HEX, input2, SIZE_DECIMAL, buf2,
(!st_p) ? "=>" : "<=",
SIZE_HEX, value, SIZE_DECIMAL, bufr);
return tic80_trace_buffer;
}
#endif /* WITH_TRACE */

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