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CSKY: Add L2Cache instructions for CK860. 

opcodes/
	* csky-opc.h (csky_v2_opcodes): Add L2Cache instructions.
	* testsuite/gas/csky/cskyv2_ck860.d : Adjust to icache.iva
	opcode fixing.
gdb-10-branch
Cooper Qu 6 years ago
committed by Lifang Xia
parent
525a0aa301
commit
79c8d443b1
3 changed files with 125 additions and 110 deletions
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  1. 2
      gas/testsuite/gas/csky/cskyv2_ck860.d
  2. 6
      opcodes/ChangeLog
  3. 227
      opcodes/csky-opc.h

2
gas/testsuite/gas/csky/cskyv2_ck860.d
View File

@ -26,7 +26,7 @@ Disassembly of section \.text:
\s*[0-9a-f]*:\s*c1009420\s*dcache.iall
\s*[0-9a-f]*:\s*c1009020\s*icache.iall
\s*[0-9a-f]*:\s*c3009020\s*icache.ialls
\s*[0-9a-f]*:\s*c0bf9020\s*icache.iva\s*r31
\s*[0-9a-f]*:\s*c17f9020\s*icache.iva\s*r31
\s*[0-9a-f]*:\s*c000842f\s*bar.brwarw
\s*[0-9a-f]*:\s*c200842f\s*bar.brwarws
\s*[0-9a-f]*:\s*c0008425\s*bar.brar

6
opcodes/ChangeLog
View File

@ -1,3 +1,9 @@
2020-09-10 Cooper Qu <cooper.qu@linux.alibaba.com>
* csky-opc.h (csky_v2_opcodes): Add L2Cache instructions.
* testsuite/gas/csky/cskyv2_ck860.d : Adjust to icache.iva
opcode fixing.
2020-09-10 Nick Clifton <nickc@redhat.com>
* csky-dis.c (csky_output_operand): Coerce the immediate values to

227
opcodes/csky-opc.h
View File

@ -4716,115 +4716,124 @@ const struct csky_opcode csky_v2_opcodes[] =
#define _RELAX 0
/* CK860 instructions. */
OP32("sync.is",
OPCODE_INFO0(0xc2200420),
CSKYV2_ISA_10E60),
OP32("sync.i",
OPCODE_INFO0(0xc0200420),
CSKYV2_ISA_10E60),
OP32("sync.s",
OPCODE_INFO0(0xc2000420),
CSKYV2_ISA_10E60),
OP32("bar.brwarw",
OPCODE_INFO0(0xc000842f),
CSKYV2_ISA_10E60),
OP32("bar.brwarws",
OPCODE_INFO0(0xc200842f),
CSKYV2_ISA_10E60),
OP32("bar.brar",
OPCODE_INFO0(0xc0008425),
CSKYV2_ISA_10E60),
OP32("bar.brars",
OPCODE_INFO0(0xc2008425),
CSKYV2_ISA_10E60),
OP32("bar.bwaw",
OPCODE_INFO0(0xc000842a),
CSKYV2_ISA_10E60),
OP32("bar.bwaws",
OPCODE_INFO0(0xc200842a),
CSKYV2_ISA_10E60),
OP32("icache.iall",
OPCODE_INFO0(0xc1009020),
CSKYV2_ISA_10E60),
OP32("icache.ialls",
OPCODE_INFO0(0xc3009020),
CSKYV2_ISA_10E60),
OP32("icache.iva",
OPCODE_INFO1(0xc0a09020,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("dcache.iall",
OPCODE_INFO0(0xc1009420),
CSKYV2_ISA_10E60),
OP32("dcache.iva",
OPCODE_INFO1(0xc1609420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("dcache.isw",
OPCODE_INFO1(0xc1409420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("dcache.call",
OPCODE_INFO0(0xc0809420),
CSKYV2_ISA_10E60),
OP32("dcache.cva",
OPCODE_INFO1(0xc0e09420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("dcache.cval1",
OPCODE_INFO1(0xc2e09420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("dcache.csw",
OPCODE_INFO1(0xc0c09420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("dcache.ciall",
OPCODE_INFO0(0xc1809420),
CSKYV2_ISA_10E60),
OP32("dcache.civa",
OPCODE_INFO1(0xc1e09420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("dcache.cisw",
OPCODE_INFO1(0xc1c09420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("tlbi.vaa",
OPCODE_INFO1(0xc0408820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("tlbi.vaas",
OPCODE_INFO1(0xc2408820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("tlbi.asid",
OPCODE_INFO1(0xc0208820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("tlbi.asids",
OPCODE_INFO1(0xc2208820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("tlbi.va",
OPCODE_INFO1(0xc0608820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("tlbi.vas",
OPCODE_INFO1(0xc2608820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32("tlbi.all",
OPCODE_INFO0(0xc0008820),
CSKYV2_ISA_10E60),
OP32("tlbi.alls",
OPCODE_INFO0(0xc2008820),
CSKYV2_ISA_10E60),
DOP32("sync",
OPCODE_INFO0(0xc0000420),
OPCODE_INFO1(0xc0000420,
(21_25, IMM5b, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_E1),
OP32 ("sync.is",
OPCODE_INFO0 (0xc2200420),
CSKYV2_ISA_10E60),
OP32 ("sync.i",
OPCODE_INFO0 (0xc0200420),
CSKYV2_ISA_10E60),
OP32 ("sync.s",
OPCODE_INFO0 (0xc2000420),
CSKYV2_ISA_10E60),
OP32 ("bar.brwarw",
OPCODE_INFO0 (0xc000842f),
CSKYV2_ISA_10E60),
OP32 ("bar.brwarws",
OPCODE_INFO0 (0xc200842f),
CSKYV2_ISA_10E60),
OP32 ("bar.brar",
OPCODE_INFO0 (0xc0008425),
CSKYV2_ISA_10E60),
OP32 ("bar.brars",
OPCODE_INFO0 (0xc2008425),
CSKYV2_ISA_10E60),
OP32 ("bar.bwaw",
OPCODE_INFO0 (0xc000842a),
CSKYV2_ISA_10E60),
OP32 ("bar.bwaws",
OPCODE_INFO0 (0xc200842a),
CSKYV2_ISA_10E60),
OP32 ("icache.iall",
OPCODE_INFO0 (0xc1009020),
CSKYV2_ISA_10E60),
OP32 ("icache.ialls",
OPCODE_INFO0 (0xc3009020),
CSKYV2_ISA_10E60),
OP32 ("l2cache.iall",
OPCODE_INFO0 (0xc1009820),
CSKYV2_ISA_10E60),
OP32 ("l2cache.call",
OPCODE_INFO0 (0xc0809820),
CSKYV2_ISA_10E60),
OP32 ("l2cache.ciall",
OPCODE_INFO0 (0xc1809820),
CSKYV2_ISA_10E60),
OP32 ("icache.iva",
OPCODE_INFO1 (0xc1609020,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("dcache.iall",
OPCODE_INFO0 (0xc1009420),
CSKYV2_ISA_10E60),
OP32 ("dcache.iva",
OPCODE_INFO1 (0xc1609420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("dcache.isw",
OPCODE_INFO1 (0xc1409420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("dcache.call",
OPCODE_INFO0 (0xc0809420),
CSKYV2_ISA_10E60),
OP32 ("dcache.cva",
OPCODE_INFO1 (0xc0e09420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("dcache.cval1",
OPCODE_INFO1 (0xc2e09420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("dcache.csw",
OPCODE_INFO1 (0xc0c09420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("dcache.ciall",
OPCODE_INFO0 (0xc1809420),
CSKYV2_ISA_10E60),
OP32 ("dcache.civa",
OPCODE_INFO1 (0xc1e09420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("dcache.cisw",
OPCODE_INFO1 (0xc1c09420,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("tlbi.vaa",
OPCODE_INFO1 (0xc0408820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("tlbi.vaas",
OPCODE_INFO1 (0xc2408820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("tlbi.asid",
OPCODE_INFO1 (0xc0208820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("tlbi.asids",
OPCODE_INFO1 (0xc2208820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("tlbi.va",
OPCODE_INFO1 (0xc0608820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("tlbi.vas",
OPCODE_INFO1 (0xc2608820,
(16_20, AREG, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_10E60),
OP32 ("tlbi.all",
OPCODE_INFO0 (0xc0008820),
CSKYV2_ISA_10E60),
OP32 ("tlbi.alls",
OPCODE_INFO0 (0xc2008820),
CSKYV2_ISA_10E60),
DOP32 ("sync",
OPCODE_INFO0 (0xc0000420),
OPCODE_INFO1 (0xc0000420,
(21_25, IMM5b, OPRND_SHIFT_0_BIT)),
CSKYV2_ISA_E1),
/* The followings are enhance DSP instructions. */
DOP32_WITH_WORK ("bloop",

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