[testsuite][AArch64] Port gdb.trace

This patch adds support for AArch64 to the gdb.trace testsuite.

Note that it does not add support for testing fast tracepoint as it
isn't supported.  Therefore the test cases with inline assembly are not
ported in this patch, as we do not know what the conditions for
inserting a fast tracepoint on AArch64 would be.

gdb/testsuite/ChangeLog:

	* gdb.trace/backtrace.exp: Set registers for aarch64 target.
	* gdb.trace/collection.exp: Likewise.
	* gdb.trace/mi-trace-frame-collected.exp: Likewise.
	* gdb.trace/mi-trace-unavailable.exp: Likewise.
	* gdb.trace/report.exp: Likewise.
	* gdb.trace/trace-break.exp: Likewise.
	* gdb.trace/unavailable.exp: Likewise.
	* gdb.trace/while-dyn.exp: Likewise.

gdb/ChangeLog

@@ -1,3 +1,14 @@
+2015-07-09  Pierre Langlois  <pierre.langlois@arm.com>
+
+	* gdb.trace/backtrace.exp: Set registers for aarch64 target.
+	* gdb.trace/collection.exp: Likewise.
+	* gdb.trace/mi-trace-frame-collected.exp: Likewise.
+	* gdb.trace/mi-trace-unavailable.exp: Likewise.
+	* gdb.trace/report.exp: Likewise.
+	* gdb.trace/trace-break.exp: Likewise.
+	* gdb.trace/unavailable.exp: Likewise.
+	* gdb.trace/while-dyn.exp: Likewise.
+
 2015-07-09  Pierre Langlois  <pierre.langlois@arm.com>
 
 	* aarch64-tdep.c: Add ax.h and ax-gdb.h includes.

gdb/testsuite/gdb.trace/backtrace.exp

@@ -146,6 +146,9 @@ if [is_amd64_regs_target] {
 } elseif [is_x86_like_target] {
     set fpreg "\$ebp"
     set spreg "\$esp"
+} elseif [is_aarch64_target] {
+    set fpreg "\$x29"
+    set spreg "\$sp"
 } else {
     set fpreg "\$fp"
     set spreg "\$sp"

gdb/testsuite/gdb.trace/collection.exp

@@ -44,6 +44,10 @@ if [is_amd64_regs_target] {
     set fpreg "ebp"
     set spreg "esp"
     set pcreg "eip"
+} elseif [is_aarch64_target] {
+    set fpreg "x29"
+    set spreg "sp"
+    set pcreg "pc"
 } else {
     set fpreg "fp"
     set spreg "sp"

gdb/testsuite/gdb.trace/mi-trace-frame-collected.exp

@@ -56,6 +56,8 @@ if [is_amd64_regs_target] {
     set pcreg "rip"
 } elseif [is_x86_like_target] {
     set pcreg "eip"
+} elseif [is_aarch64_target] {
+    set pcreg "pc"
 } else {
     # Other ports that support tracepoints should set the name of pc
     # register here.

gdb/testsuite/gdb.trace/mi-trace-unavailable.exp

@@ -135,6 +135,8 @@ proc test_trace_unavailable { data_source } {
 	    set pcnum 16
 	} elseif [is_x86_like_target] {
 	    set pcnum 8
+	} elseif [is_aarch64_target] {
+	    set pcnum 32
 	} else {
 	    # Other ports support tracepoint should define the number
 	    # of its own pc register.

gdb/testsuite/gdb.trace/report.exp

@@ -158,6 +158,10 @@ if [is_amd64_regs_target] {
     set fpreg "ebp"
     set spreg "esp"
     set pcreg "eip"
+} elseif [is_aarch64_target] {
+    set fpreg "x29"
+    set spreg "sp"
+    set pcreg "pc"
 } else {
     set fpreg "fp"
     set spreg "sp"

gdb/testsuite/gdb.trace/trace-break.exp

@@ -49,6 +49,8 @@ if [is_amd64_regs_target] {
     set fpreg "ebp"
     set spreg "esp"
     set pcreg "eip"
+} elseif [is_aarch64_target] {
+    set fpreg "x29"
 }
 
 # Set breakpoint and tracepoint at the same address.

gdb/testsuite/gdb.trace/unavailable.exp

@@ -34,6 +34,10 @@ if [is_amd64_regs_target] {
     set fpreg "ebp"
     set spreg "esp"
     set pcreg "eip"
+} elseif [is_aarch64_target] {
+    set fpreg "x29"
+    set spreg "sp"
+    set pcreg "pc"
 } else {
     set fpreg "fp"
     set spreg "sp"

gdb/testsuite/gdb.trace/while-dyn.exp

@@ -47,6 +47,8 @@ if [is_amd64_regs_target] {
     set fpreg "\$rbp"
 } elseif [is_x86_like_target] {
     set fpreg "\$ebp"
+} elseif [is_aarch64_target] {
+    set fpreg "\$x29"
 } else {
     set fpreg "\$fp"
 }