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@ -379,9 +379,6 @@ static int mips_32bitmode = 0; |
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enum mips_pic_level mips_pic; |
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/* Warn about all NOPS that the assembler generates. */ |
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static int warn_nops = 0; |
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/* 1 if we should generate 32 bit offsets from the $gp register in
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SVR4_PIC mode. Currently has no meaning in other modes. */ |
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static int mips_big_got = 0; |
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@ -4196,19 +4193,9 @@ macro (struct mips_cl_insn *ip) |
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do_false: |
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/* result is always false */ |
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if (! likely) |
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{ |
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if (warn_nops) |
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as_warn (_("Branch %s is always false (nop)"), |
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ip->insn_mo->name); |
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macro_build (NULL, &icnt, NULL, "nop", "", 0); |
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} |
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macro_build (NULL, &icnt, NULL, "nop", "", 0); |
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else |
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{ |
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if (warn_nops) |
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as_warn (_("Branch likely %s is always false"), |
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ip->insn_mo->name); |
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macro_build (NULL, &icnt, &offset_expr, "bnel", "s,t,p", 0, 0); |
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} |
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macro_build (NULL, &icnt, &offset_expr, "bnel", "s,t,p", 0, 0); |
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return; |
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} |
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if (imm_expr.X_op != O_constant) |
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@ -10428,7 +10415,7 @@ static int support_64bit_objects(void) |
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} |
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#endif /* OBJ_ELF */ |
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const char *md_shortopts = "nO::g::G:"; |
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const char *md_shortopts = "O::g::G:"; |
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struct option md_longopts[] = |
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{ |
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@ -10613,10 +10600,6 @@ md_parse_option (int c, char *arg) |
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target_big_endian = 0; |
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break; |
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case 'n': |
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warn_nops = 1; |
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break; |
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case 'O': |
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if (arg && arg[1] == '0') |
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mips_optimize = 1; |
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@ -14705,7 +14688,6 @@ MIPS options:\n\ |
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-mfp32 use 32-bit FPRs, regardless of the chosen ISA\n\ |
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-O0 remove unneeded NOPs, do not swap branches\n\ |
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-O remove unneeded NOPs and swap branches\n\ |
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-n warn about NOPs generated from macros\n\ |
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--[no-]construct-floats [dis]allow floating point values to be constructed\n\ |
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--trap, --no-break trap exception on div by 0 and mult overflow\n\ |
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--break, --no-trap break exception on div by 0 and mult overflow\n")); |
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