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* nlm/Makefile.in: Add rule for .S.o. 

* nlm/aio.h:  Protect from multiple inclusions.
	* nlm/alpha-io.S:  Remove everything we don't need.
	* nlm/{alpha-patch.c, alpha-patch.h, alpha-uart.c, alpha-uart.h}:
	Remove, no longer needed.
	* nlm/alpha.c:  Merge in lots of stuff from previous files.
	* nlm/alpha.h:  Don't #include alpha-patch.h.  Make
	breakpoint_insn extern.
	* Move stuff from alpha-patch.h into here.

	* config/alpha/gdbserve.mt (TDEPFILES):  Get rid of alpha-uart.o.
gdb-4_18-branch
Stu Grossman 32 years ago
parent
e32890404e
commit
74ace0c87a
10 changed files with 425 additions and 1948 deletions
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  1. 2
      gdb/config/alpha/gdbserve.mt
  2. 3
      gdb/nlm/Makefile.in
  3. 3
      gdb/nlm/aio.h
  4. 893
      gdb/nlm/alpha-io.S
  5. 243
      gdb/nlm/alpha-patch.c
  6. 651
      gdb/nlm/alpha-patch.h
  7. 179
      gdb/nlm/alpha-uart.c
  8. 59
      gdb/nlm/alpha-uart.h
  9. 320
      gdb/nlm/alpha.c
  10. 12
      gdb/nlm/alpha.h

2
gdb/config/alpha/gdbserve.mt
View File

@ -1,3 +1,3 @@
# Target: GDBSERVE.NLM running on a little-endian Alpha
TDEPFILES= alpha.o alpha-io.o alpha-patch.o alpha-uart.o
TDEPFILES= alpha.o alpha-io.o alpha-patch.o
CPU_FILE= alpha

3
gdb/nlm/Makefile.in
View File

@ -196,6 +196,9 @@ TAGFILES = $(SOURCES) ${HFILES} ${ALLPARAM} ${POSSLIBS}
.c.o:
${CC_FOR_TARGET} -c ${INTERNAL_CFLAGS} $<
.S.o:
${CC_FOR_TARGET} -c ${INTERNAL_CFLAGS} $<
all: gdbserve.nlm
# Traditionally "install" depends on "all". But it may be useful

3
gdb/nlm/aio.h
View File

@ -1,3 +1,5 @@
#ifndef _AIO_H_
#define _AIO_H_
/*----------------------------------------------------------------------------*
* *
@ -634,3 +636,4 @@ extern int AIOWriteStatus ( int portHandle,
WORD *state
);
#endif /* _AIO_H_ */

893
gdb/nlm/alpha-io.S
View File

@ -20,856 +20,133 @@
*/
/*#include "kxalpha.h"*/
#include "alpha-regdef.h"
#define LEAF_ENTRY(NAME) .text ; .align 4 ; .globl NAME ; .ent NAME, 0 ; NAME: ; .frame sp, 0, ra ; .prologue 0 ;
#define PICIACKADR 0xfffffc0100000000
#define EISABAD 0xfffffc0200000000
#define EISABIO 0xfffffc0300000000
#define EISA_SHIFT 7
#define EISA_BYTE_ADJ 0x80
#define EISA_WORD_ADJ 0x100
#define EISA_LONG_ADJ 0x200
#define HALF_USEC 75
#define ONE_USEC 150
LEAF_ENTRY(flush_i_cache)
call_pal 0x86 // IMB
ret zero, (ra) // return
.end outportb
//++
//
// VOID
// { outportX
// ULONG port
// ULONG data
// )
// X variants are:
//
// b - byte 8 bits
// w - word 16 bits
// t - tri-byte 24 bits
// l - long 32 bits
//
//
// Routine Description:
//
// This function uses the 64-bit super-page to write data to a port
// of the EISA bus for JENSEN. Only AT (ISA) cycles are supported.
//
// Arguments:
//
// port (a0) - port address on the EISA to which to write data
// data (a1) - data to write to the port.
//
//
// Return Value:
//
// None.
//
//--
//+
// outportb
//--
LEAF_ENTRY(outportb)
//
// generate super-page address of EISA base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,3,t0 // get byte index from address
insbl a1,t0,t5 // put byte in proper position
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABIO // get EISA IO base address
sll t1, 7, a0 // shift 7 for EISA
bis t0,a0,t0 // t0 = address of EISA
stl t5, 0(t0) // write data to port
mb // guarantee write ordering
ret zero, (ra) // return
.end outportb
//+
// outportw
//--
LEAF_ENTRY(outportw)
//
// generate super-page address of EISA base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,3,t0 // get byte index from address
inswl a1,t0,t5 // put byte in proper position
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABIO // get EISA IO base address
or t0,0x20,t0 // t0 = ffff fc03 0000 0020 - word
sll t1, 7, a0 // shift 7 for EISA
bis t0,a0,t0 // t0 = address of EISA
stl t5, 0(t0) // write data to port
mb // guarantee write ordering
ret zero, (ra) // return
.end outportw
//+
// outportl
//--
LEAF_ENTRY(outportl)
//
// generate super-page address of EISA base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABIO // get EISA IO base address
or t0,0x60,t0 // t0 = ffff fc03 0000 0060 - long
sll t1, 7, a0 // shift 7 for EISA
bis t0,a0,t0 // t0 = address of EISA
stl a1, 0(t0) // write data to port
mb // guarantee write ordering
ret zero, (ra) // return
.end outportl
//+
// vgastl
//--
LEAF_ENTRY(vgastl)
//
// generate super-page address of EISA base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
sra a0, 3, t0 // right shift addr by 3
and t0, 3, t1 // and addr with 3
s8addq t1, zero, t2 // multiply by 8
sll a1, t2, t3 // left shift data
sll a0, 4, t4 // left shift addr by 4
lda t0,0xfc00 // t0 = 0000 0000 0000 0c00
ldah t0,-1(t0) // t0 = ffff ffff ffff 0c00
sll t0,32,t0 // t0 = ffff fc00 0000 0000
or t0,t4,t4 // make io address
stl t3, 0(t4) // store data
mb // guarantee write ordering
ret zero, (ra) // return
.end vgastl
//++
//
// ULONG
// inportX(
// ULONG port
// )
//
// X variants are:
//
// b - byte 8 bits
// w - word 16 bits
// t - tri-byte 24 bits
// l - long 32 bits
//
// Routine Description:
//
// This function uses the 64-bit super-page to read data from an EISA
// port for JENSEN.
//
// Arguments:
//
// port (a0) - EISA port number.
//
// Return Value:
//
// data (v0) - the data read and only the low byte is valid
//
//--
//+
// inportb
//--
LEAF_ENTRY(inportb)
//
// generate super-page address of EISA, base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABIO // get EISA IO base address
sll t1, 7, t2 // shift 7 for EISA
bis t0,t2,t0 // t0 = address of EISA
ldl v0, 0(t0) // get EISA IO byte
and a0,0x3,t1 // setup word shift count
extbl v0,t1,v0 // put into low byte
ret zero, (ra) // return
.end inportb
//+
// inportw
//--
LEAF_ENTRY(inportw)
//
// generate super-page address of vti, base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABIO // get EISA IO base addr
or t0,0x20,t0 // t0 = ffff fc03 0000 0020 - word
sll t1, 7, t2 // shift 7 for EISA
bis t0,t2,t0 // t0 = address of EISA
ldl v0, 0(t0) // load EISA word
and a0,0x3,t1 // setup shift count
extwl v0,t1,v0 // put into low word
ret zero, (ra) // return
.end inportw
//+
// inportl
//--
LEAF_ENTRY(inportl)
//
// generate super-page address of vti, base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABIO // get EISA IO base address
or t0,0x60,t0 // t0 = ffff fc03 0000 0060
sll t1, 7, t2 // shift 7 for EISA
bis t0,t2,t0 // t0 = address of EISA
ldl v0, 0(t0) // load EISA word
ret zero, (ra) // return
.end inportl
//+
// vgaldl
//--
LEAF_ENTRY(vgaldl)
//
// generate super-page address of EISA base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
sll a0, 4, t5 // left shift address by 4
lda t0,0xfc00 // t0 = 0000 0000 0000 fc00
ldah t0,-1(t0) // t0 = ffff ffff ffff fc00
sll t0,32,t0 // t0 = ffff fc00 0000 0000
or t0,t5,t0 // make io address
ldl t4, 0(t0) // load data
sra a0, 3, t1 // right shift addr by 3
and t1, 3, t2 // and addr with 3
s8addq t2, zero, t3 // multiply by 8
srl t4, t3, v0 // right shift data
ret zero, (ra) // return
.end vgaldl
//+
// inIack
//--
LEAF_ENTRY(inIack)
//
// get Iack from pic, need two to get the vector
//
ldiq t0,PICIACKADR
ldl v0,0(t0) // load data
and v0,0xff,v0 // make it a byte
ret zero, (ra) // return
.end inIack
LEAF_ENTRY(outmemb)
//
// generate super-page address of EISA base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,3,t0 // get byte index from address
insbl a1,t0,t5 // put byte in proper position
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABAD // get EISA address
sll t1, 7, a0 // shift 7 for EISA
bis t0,a0,t0 // t0 = address of EISA
stl t5, 0(t0) // write data to port
ret zero, (ra) // return
.end outmemb
LEAF_ENTRY(outmemw)
//
// generate super-page address of EISA base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,3,t0 // get byte index from address
inswl a1,t0,t5 // put byte in proper position
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABAD // get EISA address
or t0,0x20,t0 // t0 = ffff fc02 0000 0020 - word
sll t1, 7, a0 // shift 7 for EISA
bis t0,a0,t0 // t0 = address of EISA
stl t5, 0(t0) // write data to port
ret zero, (ra) // return
.end outmemw
LEAF_ENTRY(outmeml)
//
// generate super-page address of EISA base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABAD // get EISA address
or t0,0x60,t0 // t0 = ffff fc02 0000 0060 - long
sll t1, 7, a0 // shift 7 for EISA
bis t0,a0,t0 // t0 = address of EISA
stl a1, 0(t0) // write data to port
ret zero, (ra) // return
.end outmeml
LEAF_ENTRY(outbuffb)
/* Arguments:
a0 address of destination buffer (byte aligned).
a1 address of source buffer in memory (byte aligned)
a2 Number of bytes to move (Count).
*/
//
// generate super-page address of EISA base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
beq a2, donewb // leave if nothing to do
ldiq t0,EISABAD // get EISA address
and a0,3,t3 // get byte index from dst address
and a0,0x1ffffff,t1 // 25 bit mask
sll t1,EISA_SHIFT,t4 // shift 7 for EISA
bis t0,t4,t0 // t0 = address of EISA
loopwb:
ldq_u t1, 0(a1) // get src data
subl a2, 1, a2 // decrement count
extbl t1, a1,t1 // extract byte
addl a1, 1, a1 // point ot next src address
insbl t1,t3,t1 // insert byte in proper place
stl t1, 0(t0) // write data to EISA memory
addq t0,EISA_BYTE_ADJ, t0 // increment EISA memory pointer
addl t3,1,t3 // increment index
and t3,3,t3 // mask off overflow
bne a2, loopwb
donewb:
ret zero, (ra)
.end outbuffb
LEAF_ENTRY(outbuffw)
/* Arguments:
a0 address of destination buffer (word aligned), eisa.
a1 address of source buffer in memory (word aligned)
a2 Number of words to move (Count).
*/
//
// generate super-page address of EISA base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
beq a2, doneww // leave if nothing to do
ldiq t0,EISABAD // get EISA address
or t0,0x20,t0 // t0 = ffff fc02 0000 0020 - word
and a0,3,t3 // get word index from dst address
and a0,0x1ffffff,t1 // 25 bit mask
sll t1,EISA_SHIFT,t4 // shift 7 for EISA
bis t0,t4,t0 // t0 = address of EISA
loopww:
ldq_u t1, 0(a1) // get src data
subl a2, 1, a2 // decrement count
extwl t1, a1,t1 // extract word
addl a1, 2, a1 // point ot next src address
inswl t1,t3,t1 // insert in proper place
stl t1, 0(t0) // write data to EISA memory
addq t0,EISA_WORD_ADJ, t0 // increment EISA memory pointer
addl t3,2,t3 // increment index
and t3,3,t3 // mask off overflow
bne a2, loopww
doneww:
ret zero, (ra)
.end outbuffw
call_pal 0x86 /* IMB */
ret zero, (ra) /* return */
.end flush_i_cache
LEAF_ENTRY(outbuffl)
/* Arguments:
a0 address of destination buffer (long aligned), eisa.
a1 address of source buffer in memory (long aligned)
a2 Number of longs to move (Count).
/* ++
*
* VOID
* outVti(
* ULONG Port
* ULONG Data
* )
*
* Routine Description:
*
* This Function Uses The 64-Bit Super-Page To Write Data To A Port
* Of The On-Board VTI Combo Chip For JENSEN.
*
* Arguments:
*
* Port (A0) - Port Number On VTI Chip To Which To Write Data
* data (a1) - data to write to the port, only low byte is significant
* To The VTI
*
* Return Value:
*
* None.
*
*/
//
// generate super-page address of EISA base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
beq a2, donewl // leave if nothing to do
ldiq t0,EISABAD // get EISA address
or t0,0x60,t0 // t0 = ffff fc02 0000 0060 - long
and a0,0x1ffffff,t1 // 25 bit mask
sll t1,EISA_SHIFT,t4 // shift 7 for EISA
bis t0,t4,t0 // t0 = address of EISA
loopwl:
ldl t1, 0(a1) // get src data
subl a2, 1, a2 // decrement count
stl t1, 0(t0) // write data to EISA memory
addl a1, 4, a1 // point ot next src address
addq t0,EISA_LONG_ADJ, t0 // increment EISA memory pointer
bne a2, loopwl
donewl:
ret zero, (ra)
.end outbuffw
LEAF_ENTRY(inmemb)
//
// generate super-page address of EISA, base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABAD // get EISA address
sll t1, 7, t2 // shift 7 for EISA
bis t0,t2,t0 // t0 = address of EISA
ldl v0, 0(t0) // get EISA byte
and a0,0x3,t1 // setup word shift count
extbl v0,t1,v0 // put into low byte
ret zero, (ra) // return
.end inmemb
LEAF_ENTRY(inmemw)
//
// generate super-page address of EISA, base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABAD // get EISA base addr
or t0,0x20,t0 // t0 = ffff fc02 0000 0020 - word
sll t1, 7, t2 // shift 7 for EISA
bis t0,t2,t0 // t0 = address of EISA
ldl v0, 0(t0) // get EISA short
and a0,0x3,t1 // setup byte shift count
extwl v0,t1,v0 // put into low word
ret zero, (ra) // return
.end inmemw
LEAF_ENTRY(inmeml)
//
// generate super-page address of EISA, base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
and a0,0x1ffffff,t1 // 25 bit mask
ldiq t0,EISABAD // get EISA base address
or t0,0x60,t0 // t0 = ffff fc02 0000 0060 - long
sll t1, 7, t2 // shift 7 for EISA
bis t0,t2,t0 // t0 = address of EISA
ldl v0, 0(t0) // get EISA 4 bytes
ret zero, (ra) // return
.end inmeml
LEAF_ENTRY(inbuffb)
LEAF_ENTRY(outVti)
/*
Arguments:
a0 source buffer in eisa bus memory.
a1 destination buffer in memory.
a2 Number of bytes to move (Count).
* generate super-page address of vti, base address
* N.B. - Upper Bits Must Be Sign Extension Of Bit 42
* va<42:41> = 10 (binary) for super-page address
*/
//
// generate super-page address of EISA, base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
beq a2, donerb // leave if nothing to do
ldiq t0,EISABAD // get EISA base address
and a0,3,t3 // get byte index from src address
lda t0, 0xc01c(zero) /* t0 = 0000 0000 0000 c01c */
ldah t0, -1(t0) /* t0 = ffff ffff ffff c01c */
sll t0, 28, t0 /* t0 = ffff fc01 c000 0000 */
and a0,0x1ffffff,t1 // 25 bit mask
sll t1, EISA_SHIFT, t4 // shift 7 for EISA
bis t0,t4,t0 // t0 = address of EISA
looprb:
ldl t1, 0(t0) // get EISA 4 bytes
subl a2, 1, a2 // decrement byte count
extbl t1, t3, t1 // extract byte
addq t0, EISA_BYTE_ADJ, t0 // increment EISA address
stb t1, 0(a1) // assembler preserves the memory
// behind the newly stored byte
addl a1, 1, a1 // increment memory pointer
addl t3, 1, t3 // point to next byte in long
and t3, 3, t3 // get new index
bne a2, looprb
donerb:
ret zero, (ra) // return
.end inbuffb
LEAF_ENTRY(inbuffw)
/*
Arguments:
a0 source buffer in eisa bus memory.
a1 destination buffer in memory.
a2 Number of words to move (Count).
* Shift In The Port Number To Generate The Port Address We
* wish to access
* N.B. - Access Width Is Always Zero = Byte Access For VTI
*/
sll a0, 9, a0 /* a0 << 9 */
bis t0, a0, t0 /* T0 = Address Of VTI Port */
//
// generate super-page address of EISA, base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
beq a2, donerw // leave if nothing to do
ldiq t0,EISABAD // get EISA base address
or t0,0x20,t0 // t0 = ffff fc02 0000 0020 - word
and a0,3,t3 // get byte index from src address
and a0,0x1ffffff,t1 // 25 bit mask
sll t1, EISA_SHIFT, t4 // shift 7 for EISA
bis t0,t4,t0 // t0 = address of EISA
looprw:
ldl t1, 0(t0) // get EISA 4 bytes
subl a2, 1, a2 // decrement word count
extwl t1, t3, t1 // extract word
addq t0, EISA_WORD_ADJ, t0 // increment EISA address
stw t1, 0(a1) // store in dst memory
addl a1, 2, a1 // increment memory pointer
addl t3, 2, t3 // point to next word in long
and t3, 3, t3 // get new index
bne a2, looprw
donerw:
ret zero, (ra) // return
.end inbuffw
LEAF_ENTRY(inbuffl)
/*
Arguments:
a0 source buffer in eisa bus memory.
a1 destination buffer in memory.
a2 Number of longs to move (Count).
* Do The Port Write, Guarantee That Subsequent Writes (And Reads)
* are ordered with respect to this write and return to caller
*/
//
// generate super-page address of EISA, base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
beq a2, donerl // leave if nothing to do
ldiq t0,EISABAD // get EISA base address
or t0,0x60,t0 // t0 = ffff fc02 0000 0060 - long
and a0,0x1ffffff,t1 // 25 bit mask
sll t1, EISA_SHIFT, t4 // shift 7 for EISA
bis t0,t4,t0 // t0 = address of EISA
looprl:
ldl v0, 0(t0) // get EISA 4 bytes
subl a2, 1, a2 // decrement long count
stl v0, 0(a1) // store in dst memory
addl a1, 4, a1 // increment memory pointer
addq t0, EISA_LONG_ADJ, t0 // increment EISA address
bne a2, looprl
donerl:
ret zero, (ra) // return
.end inbuffl
LEAF_ENTRY(inctl)
//
// generate super-page address of EISA, base address
// upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
lda t0,0xfc01 // t0 = 0000 0000 0000 fc01
ldah t0,-1(t0) // t0 = ffff ffff ffff fc01
sll t0,32,t0 // t0 = ffff fc01 0000 0000
bis t0,0xe0000000,t0 // t0 = ffff fc01 e000 0000
ldl v0, 0(t0) // get EISA byte
and v0,0xff,v0
ret zero, (ra) // return
.end inctl
//++
//
// VOID
// outVti(
// ULONG port
// ULONG data
// )
//
// Routine Description:
//
// This function uses the 64-bit super-page to write data to a port
// of the on-board VTI combo chip for JENSEN.
//
// Arguments:
//
// port (a0) - port number on VTI chip to which to write data
// data (a1) - data to write to the port, only low byte is significant
// to the VTI
//
// Return Value:
//
// None.
//
//--
LEAF_ENTRY(outVti)
//
// generate super-page address of vti, base address
// N.B. - upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
stl a1, 0(t0) /* write data to port */
mb /* guarantee write ordering */
lda t0, 0xc01c(zero) // t0 = 0000 0000 0000 c01c
ldah t0, -1(t0) // t0 = ffff ffff ffff c01c
sll t0, 28, t0 // t0 = ffff fc01 c000 0000
//
// Shift in the port number to generate the port address we
// wish to access
// N.B. - access width is always zero = byte access for VTI
//
sll a0, 9, a0 // a0 << 9
bis t0, a0, t0 // t0 = address of VTI port
//
// Do the port write, guarantee that subsequent writes (and reads)
// are ordered with respect to this write and return to caller
//
stl a1, 0(t0) // write data to port
mb // guarantee write ordering
ret zero, (ra) // return
ret zero, (ra) /* return */
.end outVti
//++
//
// ULONG
// inVti(
// ULONG port
// )
//
// Routine Description:
//
// This function uses the 64-bit super-page to read data from a port
// of the on-board VTI combo chip for JENSEN.
//
// Arguments:
//
// port (a0) - port number on VTI chip to which to write data
//
// Return Value:
//
// data (v0) - the data read from the VTI chip, only the low byte will
// be valid
//
//--
/*
*
* ULONG
* inVti(
* ULONG Port
* )
*
* Routine Description:
*
* This Function Uses The 64-Bit Super-Page To Read Data From A Port
* Of The On-Board VTI Combo Chip For JENSEN.
*
* Arguments:
*
* Port (A0) - Port Number On VTI Chip To Which To Write Data
*
* Return Value:
*
* Data (V0) - The Data Read From The VTI Chip, Only The Low Byte Will
* be valid
*
*/
LEAF_ENTRY(inVti)
//
// generate super-page address of vti, base address
// N.B. - upper bits must be sign extension of bit 42
// va<42:41> = 10 (binary) for super-page address
//
/*
* generate super-page address of vti, base address
* N.B. - Upper Bits Must Be Sign Extension Of Bit 42
* va<42:41> = 10 (binary) for super-page address
*/
lda t0, 0xc01c(zero) // t0 = 0000 0000 0000 c01c
ldah t0, -1(t0) // t0 = ffff ffff ffff c01c
sll t0, 28, t0 // t0 = ffff fc01 c000 0000
lda t0, 0xc01c(zero) /* t0 = 0000 0000 0000 c01c */
ldah t0, -1(t0) /* t0 = ffff ffff ffff c01c */
sll t0, 28, t0 /* t0 = ffff fc01 c000 0000 */
//
// Shift in the port number to generate the port address we
// wish to access
// N.B. - access width for VTI is always 0 = byte access
//
/*
* Shift In The Port Number To Generate The Port Address We
* wish to access
* N.B. - Access Width For VTI Is Always 0 = Byte Access
*/
sll a0, 9, a0 // a0 << 9
bis t0, a0, t0 // t0 = address of VTI port
sll a0, 9, a0 /* a0 << 9 */
bis t0, a0, t0 /* T0 = Address Of VTI Port */
//
// Do the super-page i/o access and return data to caller
//
/*
* Do The Super-Page I/O Access And Return Data To Caller
*/
ldl v0, 0(t0) // read data from port
ldl v0, 0(t0) /* read data from port */
and v0, 0xff, v0
ret zero, (ra) // return
ret zero, (ra) /* return */
.end inVti
LEAF_ENTRY(delay_us)
bis zero, ONE_USEC, t1
rpcc t0 /* RCC T0, read cycle counter */
loop0: rpcc t2 /* RCC T2, read cycle counter */
subl t2, t0, t2 /* check for wrapping */
bge t2, over0 /* check, and see if negative */
ornot t0, zero, t4 /* calculate the offset */
zap t4, 0xf0, t4
cmplt t4, t1, t2
beq t2, done0
subl t1, t4, t1 /* adjust the counter */
and zero, t0, t0 /* set t0 to zero */
over0: cmplt t2, t1, t2 /* compare these for usec timer */
bne t2, loop0 /* stay in... */
done0: ret zero, (ra)
.end delay_us
LEAF_ENTRY(delay_500ns)
bis zero, HALF_USEC, t1
rpcc t0 /* RCC T0, read cycle counter */
loop1: rpcc t2 /* RCC T2, read cycle counter */
subl t2, t0, t2 /* check for wrapping */
bge t2, over1 /* check, and see if negative */
ornot t0, zero, t4 /* calculate the offset */
zap t4, 0xf0, t4
cmplt t4, t1, t2
beq t2, done1
subl t1, t4, t1 /* adjust the counter */
and zero, t0, t0 /* set t0 to zero */
over1: cmplt t2, t1, t2 /* compare these for usec timer */
bne t2, loop1 /* stay in... */
done1: ret zero, (ra)
.end delay_500ns

243
gdb/nlm/alpha-patch.c
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@ -1,243 +0,0 @@
#include <nwtypes.h>
#include "alpha-patch.h"
#include <errno.h>
#include <stdio.h>
#define CONST const
/* This file provides stubs and equivalent interfaces for all functions that
the debugger stub needs, but aren't yet implemented. */
int
AIOReadData (int portHandle, char *buffer, LONG length, LONG *numberBytesRead)
{
ULONG c;
while (1)
{
c = com_interrupt ();
if ((c & ~0377) == COM1)
break;
}
*buffer = c;
*numberBytesRead = 1;
return AIO_SUCCESS;
}
int
AIOWriteData (int portHandle, char *buffer, LONG length,
LONG *numberBytesWritten)
{
*numberBytesWritten = length;
while (length-- > 0)
uart_putchar (COM1, *buffer++);
return AIO_SUCCESS;
}
int
AIOAcquirePort (int *hardwareType, int *boardNumber, int *portNumber,
int *portHandle)
{
return AIO_SUCCESS;
}
int
AIOConfigurePort (int portHandle, BYTE bitRate, BYTE dataBits, BYTE stopBits,
BYTE parityMode, BYTE flowCtrlMode)
{
uart_init_line (1, 9600);
return AIO_SUCCESS;
}
int
AIOGetPortConfiguration (int portHandle, AIOPORTCONFIG *pPortConfig,
AIODVRCONFIG *pDvrConfig)
{
fprintf (stderr, "AIOGetPortConfiguration stubbed out\n");
exit (1);
}
int
AIOReleasePort (int portHandle)
{
return AIO_SUCCESS;
}
int
AIOSetExternalControl (int portHandle, int requestType, int requestValue)
{
return AIO_SUCCESS;
}
int
AIOGetExternalStatus (int portHandle, LONG *extStatus, LONG *chgdExtStatus)
{
fprintf (stderr, "AIOGetExternalStatus stubbed out\n");
exit (1);
}
void
StopBell ()
{
}
int
Breakpoint (int __arg)
{
fprintf (stderr, "Breakpoint() stubbed out\n");
exit (1);
}
/*
* strtol : convert a string to long.
*
* Andy Wilson, 2-Oct-89.
*/
/* FIXME: It'd be nice to configure around these, but the include files are too
painful. These macros should at least be more portable than hardwired hex
constants. */
#define ULONG_MAX ((unsigned long)(~0L)) /* 0xFFFFFFFF */
#define LONG_MAX ((long)(ULONG_MAX >> 1)) /* 0x7FFFFFFF */
#define LONG_MIN ((long)(~LONG_MAX)) /* 0x80000000 */
extern int errno;
long
strtol(s, ptr, base)
CONST char *s; char **ptr; int base;
{
extern unsigned long strtoul();
int minus=0;
unsigned long tmp;
CONST char *start=s, *eptr;
if (s==NULL)
{
errno = ERANGE;
if (!ptr)
*ptr = (char *)start;
return 0L;
}
while (isspace(*s))
s++;
if (*s == '-') {
s++;
minus = 1;
}
else if (*s == '+')
s++;
/*
* let strtoul do the hard work.
*/
tmp = strtoul(s, &eptr, base);
if (ptr != NULL)
*ptr = (char *)((eptr==s) ? (char *)start : eptr);
if (tmp > (minus ? - (unsigned long) LONG_MIN : (unsigned long) LONG_MAX))
{
errno = ERANGE;
return (minus ? LONG_MIN : LONG_MAX);
}
return (minus ? (long) -tmp : (long) tmp);
}
/*
* strtol : convert a string to long.
*
* Andy Wilson, 2-Oct-89.
*/
#ifndef ULONG_MAX
#define ULONG_MAX ((unsigned long)(~0L)) /* 0xFFFFFFFF */
#endif
extern int errno;
unsigned long
strtoul(s, ptr, base)
CONST char *s; char **ptr; int base;
{
unsigned long total = 0;
unsigned digit;
CONST char *start=s;
int did_conversion=0;
int overflow = 0;
int negate = 0;
unsigned long maxdiv, maxrem;
if (s==NULL)
{
errno = ERANGE;
if (!ptr)
*ptr = (char *)start;
return 0L;
}
while (isspace(*s))
s++;
if (*s == '+')
s++;
else if (*s == '-')
s++, negate = 1;
if (base==0 || base==16) /* the 'base==16' is for handling 0x */
{
int tmp;
/*
* try to infer base from the string
*/
if (*s != '0')
tmp = 10; /* doesn't start with 0 - assume decimal */
else if (s[1] == 'X' || s[1] == 'x')
tmp = 16, s += 2; /* starts with 0x or 0X - hence hex */
else
tmp = 8; /* starts with 0 - hence octal */
if (base==0)
base = (int)tmp;
}
maxdiv = ULONG_MAX / base;
maxrem = ULONG_MAX % base;
while ((digit = *s) != '\0')
{
if (digit >= '0' && digit < ('0'+base))
digit -= '0';
else
if (base > 10)
{
if (digit >= 'a' && digit < ('a'+(base-10)))
digit = digit - 'a' + 10;
else if (digit >= 'A' && digit < ('A'+(base-10)))
digit = digit - 'A' + 10;
else
break;
}
else
break;
did_conversion = 1;
if (total > maxdiv
|| (total == maxdiv && digit > maxrem))
overflow = 1;
total = (total * base) + digit;
s++;
}
if (overflow)
{
errno = ERANGE;
if (ptr != NULL)
*ptr = (char *)s;
return (ULONG_MAX);
}
if (ptr != NULL)
*ptr = (char *) ((did_conversion) ? (char *)s : (char *)start);
return negate ? -total : total;
}

651
gdb/nlm/alpha-patch.h
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@ -1,651 +0,0 @@
/* This contains defs for the stubs defined in alpha-patch.c. Many of these
defs are ripped off of other files. */
#include "altdebug.h" /* Get StackFrame structure */
/* -=-=-= aio.h -=-=-= */
/*----------------------------------------------------------------------------*
* *
* NetWare 386 Developer's Asynchronous I/O (AIO) Runtime library *
* *
* This include file defines the constants and prototypes required *
* to use the AIO application interface. *
* *
* (c) Copyright. 1991 Novell, Inc. All rights reserved. *
* *
*----------------------------------------------------------------------------*/
typedef unsigned long DWORD;
/*----------------------------------------------------------------------------*
* *
* Predefined hardware types for use with the AIOAcquirePort function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_COMX_TYPE (1)
#define AIO_ARTIC_TYPE (2)
#define AIO_WNIM_TYPE (3)
/*----------------------------------------------------------------------------*
* *
* Function completion code status values. *
* *
* Note that all error statuses are negative values. *
* *
*----------------------------------------------------------------------------*/
#define AIO_SUCCESS (0)
#define AIO_BAD_HANDLE (-1)
#define AIO_FAILURE (-2)
#define AIO_FUNC_NOT_SUPPORTED (-3)
#define AIO_INVALID_PARAMETER (-5)
#define AIO_PORT_NOT_AVAILABLE (-6)
#define AIO_QUALIFIED_SUCCESS (-7)
#define AIO_NO_MORE_PORTS (-8)
#define AIO_TYPE_NUMBER_INVALID (-10)
#define AIO_BOARD_NUMBER_INVALID (-11)
#define AIO_PORT_NUMBER_INVALID (-12)
#define AIO_RESOURCE_TAG_INVALID (-13)
#define AIO_DATA_PRESENT (-14)
#define AIO_BAD_REQUEST_TYPE (-15)
#define AIO_PORT_GONE (-20)
#define AIO_RTAG_INVALID (-21)
/* This is only for non-CLIB application */
#define ASYNCIOSignature 0x4E595341 /* 'NYSA' */
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOSetExternalControl function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_EXTERNAL_CONTROL (1)
#define AIO_EXTCTRL_DTR (1)
#define AIO_EXTCTRL_RTS (2)
#define AIO_BREAK_CONTROL (2)
#define AIO_SET_BREAK_OFF (0)
#define AIO_SET_BREAK_ON (1)
#define AIO_FLOW_CONTROL (3)
#define AIO_SOFTWARE_FLOW_CONTROL_OFF (0)
#define AIO_SOFTWARE_FLOW_CONTROL_ON (1)
#define AIO_HARDWARE_FLOW_CONTROL_OFF (0)
#define AIO_HARDWARE_FLOW_CONTROL_ON (2)
#define AIO_FLOW_CONTROL_CHARACTERS (4)
#define AIO_SET_DEADMAN_TIMER (5)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOGetExternalStatus function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_EXTSTA_RI (0x00000001)
#define AIO_EXTSTA_DCD (0x00000008)
#define AIO_EXTSTA_DSR (0x00000010)
#define AIO_EXTSTA_CTS (0x00000020)
#define AIO_EXTSTA_BREAK (0x00000080)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOFlushBuffers function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_FLUSH_WRITE_BUFFER (0x0001)
#define AIO_FLUSH_READ_BUFFER (0x0002)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOReadStatus function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_RECEIVE_ACTIVE (0)
#define AIO_RECEIVE_FULL (1)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOWriteStatus function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_TRANSMIT_IDLE (0)
#define AIO_TRANSMIT_ACTIVE (1)
#define AIO_TRANSMIT_XOFFED (2)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOAcquirePort function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_HARDWARE_TYPE_WILDCARD (-1)
#define AIO_BOARD_NUMBER_WILDCARD (-1)
#define AIO_PORT_NUMBER_WILDCARD (-1)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOConfigurePort function. *
* *
*----------------------------------------------------------------------------*/
/* BitRate */
#define AIO_BAUD_50 (0)
#define AIO_BAUD_75 (1)
#define AIO_BAUD_110 (2)
#define AIO_BAUD_134p5 (3)
#define AIO_BAUD_150 (4)
#define AIO_BAUD_300 (5)
#define AIO_BAUD_600 (6)
#define AIO_BAUD_1200 (7)
#define AIO_BAUD_1800 (8)
#define AIO_BAUD_2000 (9)
#define AIO_BAUD_2400 (10)
#define AIO_BAUD_3600 (11)
#define AIO_BAUD_4800 (12)
#define AIO_BAUD_7200 (13)
#define AIO_BAUD_9600 (14)
#define AIO_BAUD_19200 (15)
#define AIO_BAUD_38400 (16)
#define AIO_BAUD_57600 (17)
#define AIO_BAUD_115200 (18)
/* DataBits */
#define AIO_DATA_BITS_5 (0)
#define AIO_DATA_BITS_6 (1)
#define AIO_DATA_BITS_7 (2)
#define AIO_DATA_BITS_8 (3)
/* StopBits */
#define AIO_STOP_BITS_1 (0)
#define AIO_STOP_BITS_1p5 (1)
#define AIO_STOP_BITS_2 (2)
/* Parity */
#define AIO_PARITY_NONE (0)
#define AIO_PARITY_ODD (1)
#define AIO_PARITY_EVEN (2)
#define AIO_PARITY_MARK (3)
#define AIO_PARITY_SPACE (4)
/* FlowControl */
#define AIO_SOFTWARE_FLOWCONTROL_OFF (0)
#define AIO_SOFTWARE_FLOWCONTROL_ON (1)
#define AIO_HARDWARE_FLOWCONTROL_OFF (0)
#define AIO_HARDWARE_FLOWCONTROL_ON (2)
#define AIO_DROPOUT_VALUE (0xFF)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with AIOPORTCAPABILITIES structure. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
WORD returnLength; /* byte length of capabilities data */
BYTE majorVersion;
BYTE minorVersion;
LONG notSupportedMask;
BYTE minBitRate; /* minimum bit rate index supported */
BYTE maxBitRate; /* maximum bit rate index supported */
BYTE minDataBits; /* minimum data bits per char index supported */
BYTE maxDataBits; /* maximum data bits per char index supported */
BYTE minStopBits; /* minimum stop bits per char index supported */
BYTE maxStopBits; /* maximum stop bits per char index supported */
BYTE minParityMode; /* minimum parity mode index supported */
BYTE maxParityMode; /* maximum parity mode index supported */
BYTE minFlowCtrlMode; /* minimum flow control mode index supported */
BYTE maxFlowCtrlMode; /* maximum flow control mode index supported */
LONG miscCapabilities; /* miscellaneous capability flags */
LONG minReadBufferSize; /* minimum length of receive buffer */
LONG maxReadBufferSize; /* maximum length of receive buffer */
LONG minWriteBufferSize; /* minimum length of transmit buffer */
LONG maxWriteBufferSize; /* maximum length of transmit buffer */
WORD minDeadmanTime; /* minimum deadman time (seconds) */
WORD maxDeadmanTime; /* maximum deadman time (seconds) */
} AIOPORTCAPABILITIES;
#define AIO_PORT_NS_MINBITRATE (0x80000000)
#define AIO_PORT_NS_MAXBITRATE (0x40000000)
#define AIO_PORT_NS_MINDATABITS (0x20000000)
#define AIO_PORT_NS_MAXDATABITS (0x10000000)
#define AIO_PORT_NS_MINSTOPBITS (0x08000000)
#define AIO_PORT_NS_MAXSTOPBITS (0x04000000)
#define AIO_PORT_NS_MINPARITYMODE (0x02000000)
#define AIO_PORT_NS_MAXPARITYMODE (0x01000000)
#define AIO_PORT_NS_MINFLOWCTRLMODE (0x00800000)
#define AIO_PORT_NS_MAXFLOWCTRLMODE (0x00400000)
#define AIO_PORT_NS_MISCCAPABILITIES (0x00200000)
#define AIO_PORT_NS_MINREADBUFFERSIZE (0x00100000)
#define AIO_PORT_NS_MAXREADBUFFERSIZE (0x00080000)
#define AIO_PORT_NS_MINWRITEBUFFERSIZE (0x00040000)
#define AIO_PORT_NS_MAXWRITEBUFFERSIZE (0x00020000)
#define AIO_PORT_NS_MINDEADMANTIME (0x00010000)
#define AIO_PORT_NS_MAXDEADMANTIME (0x00008000)
#define AIO_PORT_CAPS_NOT_SUPPORTED (0x00007FFF)
#define AIO_PORT_CAPS_MAJOR_VERSION (1)
#define AIO_PORT_CAPS_MINOR_VERSION (0)
#define AIO_CAP_OUTPUT_BREAK (0x00000002)
#define AIO_CAP_FLOWCTRLCHARS (0x00000004)
#define AIO_CAP_PROGRAMMABLE (0x00000008)
#define AIO_CAP_INPUT (0x00000010)
#define AIO_CAP_OUTPUT (0x00000020)
typedef struct
{
WORD returnLength; /* byte length of driver capabilities structure */
BYTE byteData[2];
} AIODVRCAPABILITIES;
#define AIO_NO_STRUCT_DATA_RETURNED (2)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOGetPortsRollCall function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
WORD returnLength; /* byte length of port info data */
BYTE majorVersion;
BYTE minorVersion;
LONG notSupportedMask;
int hardwareType; /* value used with AIOAcquirePort */
int boardNumber; /* " */
int portNumber; /* " */
WORD availability; /* availability of port for acquire */
LONG externalStatus; /* current external status value for port */
LONG chgdExternalStatus; /* changed external status value for port */
} AIOPORTINFO;
#define AIO_INFO_NS_HARDWARETYPE (0x80000000)
#define AIO_INFO_NS_BOARDNUMBER (0x40000000)
#define AIO_INFO_NS_PORTNUMBER (0x20000000)
#define AIO_INFO_NS_AVAILABILITY (0x10000000)
#define AIO_INFO_NS_EXTERNALSTATUS (0x08000000)
#define AIO_INFO_NS_CHGDEXTERNALSTATUS (0x04000000)
#define AIO_PORT_INFO_NOT_SUPPORTED (0x03FFFFFF)
#define AIO_PORT_INFO_MAJOR_VERSION (1)
#define AIO_PORT_INFO_MINOR_VERSION (0)
#define AIO_AVAILABLE_FOR_ACQUIRE (0)
#define AIO_ALREADY_ACQUIRED (1)
#define AIO_UNAVAILABLE (0xFF)
#define AIO_INITIAL (0)
#define AIO_SUCCESSOR (1)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOGetPortConfiguration function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
WORD returnLength; /* byte length of port configuration data */
BYTE majorVersion;
BYTE minorVersion;
LONG notSupportedMask;
int hardwareType; /* value used with AIOAcquirePort */
int boardNumber; /* " */
int portNumber; /* " */
BYTE bitRate; /* Bits per second index */
BYTE dataBits; /* Bits per character index */
BYTE stopBits; /* Stop bits per char index */
BYTE parityMode; /* Generated parity index */
BYTE flowCtrlMode; /* Flow control mode */
BYTE breakMode; /* Break control mode */
LONG readSize; /* Receive buffer size */
LONG writeSize; /* Transmit buffer size */
BYTE transmitXon;
BYTE transmitXoff;
BYTE receiveXon;
BYTE receiveXoff;
WORD externalControl; /* set with AIO_EXTERNAL_CONTROL */
} AIOPORTCONFIG;
#define AIO_CONFIG_NS_HARDWARETYPE (0x80000000)
#define AIO_CONFIG_NS_BOARDNUMBER (0x40000000)
#define AIO_CONFIG_NS_PORTNUMBER (0x20000000)
#define AIO_CONFIG_NS_BITRATE (0x10000000)
#define AIO_CONFIG_NS_DATABITS (0x08000000)
#define AIO_CONFIG_NS_STOPBITS (0x04000000)
#define AIO_CONFIG_NS_PARITYMODE (0x02000000)
#define AIO_CONFIG_NS_FLOWCTRLMODE (0x01000000)
#define AIO_CONFIG_NS_BREAKMODE (0x00800000)
#define AIO_CONFIG_NS_READSIZE (0x00400000)
#define AIO_CONFIG_NS_WRITESIZE (0x00200000)
#define AIO_CONFIG_NS_TRANSMITXON (0x00100000)
#define AIO_CONFIG_NS_TRANSMITXOFF (0x00080000)
#define AIO_CONFIG_NS_RECEIVEXON (0x00040000)
#define AIO_CONFIG_NS_RECEIVEXOFF (0x00020000)
#define AIO_CONFIG_NS_EXTERNALCONTROL (0x00010000)
#define AIO_PORT_CONFIG_NOT_SUPPORTED (0x0007FFFF)
#define AIO_PORT_CONFIG_MAJOR_VERSION (1)
#define AIO_PORT_CONFIG_MINOR_VERSION (0)
#define AIO_EXTCTRL_DTR_ENABLE (1)
#define AIO_EXTCTRL_DTR_DISABLE (0)
#define AIO_EXTCTRL_RTS_ENABLE (2)
#define AIO_EXTCTRL_RTS_DISABLE (0)
#define AIO_BREAK_MODE_OFF (0)
#define AIO_BREAK_MODE_ON (1)
typedef struct
{
WORD returnLength; /* byte length of driver config structure */
BYTE byteData[2];
} AIODVRCONFIG;
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOGetStatistics function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
WORD returnLength; /* byte length of port statistics structure */
BYTE majorVersion;
BYTE minorVersion;
LONG notSupportedMask;
LONG receiveBytes; /* total number of bytes received on port */
LONG transmitBytes; /* total number of bytes transmitted from port */
LONG parityErrors; /* number of receive parity errors */
LONG framingErrors; /* number of receive framing errors */
LONG overrunSoftware; /* number of software overruns (occurrences) */
LONG overrunHardware; /* number of hardware overruns (occurrences) */
} AIOPORTSTATISTICS;
#define AIO_STATS_NS_RECEIVEBYTES (0x80000000)
#define AIO_STATS_NS_TRANSMITBYTES (0x40000000)
#define AIO_STATS_NS_PARITYERRORS (0x20000000)
#define AIO_STATS_NS_FRAMINGERRORS (0x10000000)
#define AIO_STATS_NS_OVERRUNSOFTWARE (0x08000000)
#define AIO_STATS_NS_OVERRUNHARDWARE (0x04000000)
#define AIO_PORT_STATS_NOT_SUPPORTED (0x03FFFFFF)
#define AIO_PORT_STATS_MAJOR_VERSION (1)
#define AIO_PORT_STATS_MINOR_VERSION (0)
typedef struct
{
WORD returnLength; /* byte length of driver statistics structure */
BYTE byteData[2];
} AIODVRSTATISTICS;
/*----------------------------------------------------------------------------*
* *
* Definitions for use with AIOGetDriverList function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
int hardwareType;
int ports;
char name[128];
} AIODRIVERLISTENTRY;
typedef struct
{
WORD returnLength;
AIODRIVERLISTENTRY driver[1];
} AIODRIVERLIST;
#define AIO_DRIVER_LIST_GET_FIRST (-1)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with AIOGetBoardList function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
int boardNumber;
int ports;
char name[128];
} AIOBOARDLISTENTRY;
typedef struct
{
WORD returnLength;
AIOBOARDLISTENTRY board[1];
} AIOBOARDLIST;
#define AIO_BOARD_LIST_GET_FIRST (-1)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with AIOSetControlData function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
WORD returnLength; /* byte length of control data structure */
BYTE byteData[2];
} AIOCONTROLDATA;
/*----------------------------------------------------------------------------*
* *
* Definitions for use with AIOGetFirstPortInfo and AIOGetNextPortInfo *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
int typeMask;
int boardMask;
int portMask;
int reserved[6];
} AIOPORTSEARCH;
/* reserved index values */
#define SEARCH_TYPE_INDEX 0
#define SEARCH_BOARD_INDEX 1
#define SEARCH_PORT_INDEX 2
/*----------------------------------------------------------------------------*
* *
* Definition of AIO functions. *
* *
*----------------------------------------------------------------------------*/
extern int AIOAcquirePort ( int *hardwareType,
int *boardNumber,
int *portNumber,
int *portHandle
);
extern int AIOAcquirePortWithRTag ( int *hardwareType,
int *boardNumber,
int *portNumber,
int *portHandle,
LONG RTag
);
extern int AIOConfigurePort ( int portHandle,
BYTE bitRate,
BYTE dataBits,
BYTE stopBits,
BYTE parityMode,
BYTE flowCtrlMode
);
extern int AIOFlushBuffers ( int portHandle,
WORD flushFlag
);
extern int AIOGetBoardList( int hardwareType,
int boardIndex,
AIOBOARDLIST *pBoardList );
extern int AIOGetDriverList ( int lastHardwareType,
AIODRIVERLIST *pDriverList
);
extern int AIOGetExternalStatus ( int portHandle,
LONG *extStatus,
LONG *chgdExtStatus
);
extern int AIOGetFirstPortInfo ( int hardwareType,
int boardNumber,
int portNumber,
AIOPORTSEARCH *portSearchP,
AIOPORTINFO *portInfoP,
AIOPORTCAPABILITIES *capabilitiesP,
AIODVRCAPABILITIES *dvrCapabilitiesP,
char *NLMModuleNameP );
extern int AIOGetNextPortInfo ( AIOPORTSEARCH *portSearchP,
AIOPORTINFO *portInfoP,
AIOPORTCAPABILITIES *capabilitiesP,
AIODVRCAPABILITIES *dvrCapabilitiesP,
char *NLMModuleNameP );
extern int AIOGetPortCapability ( int portHandle,
AIOPORTCAPABILITIES *pCapabilities,
AIODVRCAPABILITIES *pDvrCapabilities
);
extern int AIOGetPortConfiguration ( int portHandle,
AIOPORTCONFIG *pPortConfig,
AIODVRCONFIG *pDvrConfig
);
extern int AIOGetPortStatus ( int portHandle,
LONG *writeCount,
WORD *writeState,
LONG *readCount,
WORD *readState,
LONG *extStatus,
LONG *chgdExtStatus
);
extern int AIOGetReadBufferSize ( int portHandle,
LONG *readSize
);
extern int AIOGetPortStatistics ( int portHandle,
AIOPORTSTATISTICS *pPortStatistics,
AIODVRSTATISTICS *pDvrStatistics
);
extern int AIOGetFirstPortStatistics( int hardwareType,
int boardNumber,
int portNumber,
AIOPORTSEARCH *portSearchP,
AIOPORTSTATISTICS *pPortStatistics,
AIODVRSTATISTICS *pDvrStatistics
);
extern int AIOGetNextPortStatistics ( AIOPORTSEARCH *portSearchP,
AIOPORTSTATISTICS *pPortStatistics,
AIODVRSTATISTICS *pDvrStatistics
);
extern int AIOGetWriteBufferSize ( int portHandle,
LONG *writeSize
);
extern int AIOReadData ( int portHandle,
char *buffer,
LONG length,
LONG *numberBytesRead
);
extern int AIOReadStatus ( int portHandle,
LONG *count,
WORD *state
);
extern int AIOReleasePort ( int portHandle );
extern int AIOSetControlData ( int portHandle,
int requestType,
AIOCONTROLDATA *requestStructValue
);
extern int AIOSetExternalControl ( int portHandle,
int requestType,
int requestValue
);
extern int AIOSetFlowControl ( int portHandle,
int flowCtrlMode
);
extern int AIOSetFlowControlCharacters( int portHandle,
BYTE transmitXon,
BYTE transmitXoff,
BYTE receiveXon,
BYTE receiveXoff
);
extern int AIOSetReadBufferSize ( int portHandle,
LONG bufferSize
);
extern int AIOSetWriteBufferSize ( int portHandle,
LONG bufferSize
);
extern int AIOWriteData ( int portHandle,
char *buffer,
LONG length,
LONG *numberBytesWritten
);
extern int AIOWriteStatus ( int portHandle,
LONG *count,
WORD *state
);
/* -=-=-= Random stuff -=-=-=-= */
#define isspace(C) (C == '\n' || C == '\r' || C == ' ' || C == '\t')
int Breakpoint (int __arg);
#define ULONG unsigned long
#define COM1 0x8000
#define COM2 0x9000

179
gdb/nlm/alpha-uart.c
View File

@ -1,179 +0,0 @@
/*
* Copyright (C) 1993, 1994 by
* Digital Equipment Corporation, Maynard, Massachusetts.
* All rights reserved.
*
* This software is furnished under a license and may be used and copied
* only in accordance of the terms of such license and with the
* inclusion of the above copyright notice. This software or any other
* copies thereof may not be provided or otherwise made available to any
* other person. No title to and ownership of the software is hereby
* transferred.
*
* The information in this software is subject to change without notice
* and should not be construed as a commitment by Digital Equipment
* Corporation.
*
* Digital assumes no responsibility for the use or reliability of its
* software on equipment which is not supplied by Digital.
*
*/
/*$Id$*/
#include "nwtypes.h"
#include "alpha-uart.h"
/*#include "alphansi.h"*/
#include "alpha-patch.h"
#include <stdio.h>
ULONG com_interrupt()
{
if (inVti(com1Lsr) & 1)
return COM1 | inVti (com1Rbr);
return 0;
}
void
putcLpt(int c)
{
int i, s;
while(!((s = inVti(lptSr)) & 0x80))
;
for(i=0;i<lptDly;++i)
;
outVti(lptDr, c);
for(i=0;i<lptDly;++i)
;
outVti(lptCr, lptnInit|lptSTB|lptAFD);
for(i=0;i<lptDly;++i)
;
outVti(lptCr, lptnInit|lptAFD);
for(i=0;i<lptDly;++i)
;
s = inVti(lptSr);
}
void
uart_putchar(int port, char c)
{
int lsr, thr;
switch(port)
{
case COM1:
lsr = com1Lsr;
thr = com1Thr;
break;
case COM2:
lsr = com2Lsr;
thr = com2Thr;
break;
#if 0
case LPT:
putcLpt(c);
return;
case VGA:
vga_putc(c);
return;
#endif
default:
return;
}
while ((inVti(lsr) & 0x20) == 0);
outVti(thr,c);
if (c == '\n') uart_putchar(port, '\r');
}
int uart_init_line(int line, int baud)
{
int i;
int baudconst;
switch (baud)
{
case 57600: baudconst = 2; break;
case 38400: baudconst = 3; break;
case 19200: baudconst = 6; break;
case 9600: baudconst = 12; break;
case 4800: baudconst = 24; break;
case 2400: baudconst = 48; break;
case 1200: baudconst = 96; break;
case 300: baudconst = 384; break;
case 150: baudconst = 768; break;
default: baudconst = 12; break;
}
if (line == 1)
{
outVti(com1Lcr, 0x87);
outVti(com1Dlm, 0);
outVti(com1Dll, baudconst);
outVti(com1Lcr, 0x07);
outVti(com1Mcr, 0x0F);
com1_disable_int();
}
else if (line == 2)
{
outVti(com2Lcr, 0x87);
outVti(com2Dlm, 0);
outVti(com2Dll, baudconst);
outVti(com2Lcr, 0x07);
outVti(com2Mcr, 0x0F);
}
fprintf (stderr, "com1Ier = 0x%x\n", inVti(com1Ier));
fprintf (stderr, "com1Lcr = 0x%x\n", inVti(com1Lcr));
fprintf (stderr, "com1Dlm = 0x%x\n", inVti(com1Dlm));
fprintf (stderr, "com1Dll = 0x%x\n", inVti(com1Dll));
fprintf (stderr, "com1Lcr = 0x%x\n", inVti(com1Lcr));
fprintf (stderr, "com1Mcr = 0x%x\n", inVti(com1Mcr));
}
int
uart_init()
{
uart_init_line(1, 19200);
}
com1_enable_int()
{
outVti(com1Ier, 0x01);
}
com1_disable_int()
{
outVti(com1Ier, 0x0);
}
com2_enable_int()
{
outVti(com2Ier, 0x01);
}
com2_disable_int()
{
outVti(com2Ier, 0x0);
}

59
gdb/nlm/alpha-uart.h
View File

@ -1,59 +0,0 @@
/*
* Copyright (C) 1993, 1994 by
* Digital Equipment Corporation, Maynard, Massachusetts.
* All rights reserved.
*
* This software is furnished under a license and may be used and copied
* only in accordance of the terms of such license and with the
* inclusion of the above copyright notice. This software or any other
* copies thereof may not be provided or otherwise made available to any
* other person. No title to and ownership of the software is hereby
* transferred.
*
* The information in this software is subject to change without notice
* and should not be construed as a commitment by Digital Equipment
* Corporation.
*
* Digital assumes no responsibility for the use or reliability of its
* software on equipment which is not supplied by Digital.
*
*/
#define com1Rbr 0x3f8 /* Receiver Buffer - Read */
#define com1Thr 0x3f8 /* Transmitter Holding - Write */
#define com1Ier 0x3f9 /* Interrupt Enable */
#define com1Iir 0x3fa /* Interrupt Identification */
#define com1Lcr 0x3fb /* Line Control */
#define com1Mcr 0x3fc /* Modem Control */
#define com1Lsr 0x3fd /* Line Status */
#define com1Msr 0x3fe /* Modem Status */
#define com1Scr 0x3ff /* Scratch */
#define com1Dll 0x3f8 /* Divisor Latch - lsb */
#define com1Dlm 0x3f9 /* Divisor Latch - msb */
#define com2Rbr 0x2f8 /* Receiver Buffer - Read */
#define com2Thr 0x2f8 /* Transmitter Holding - Write */
#define com2Ier 0x2f9 /* Interrupt Enable */
#define com2Iir 0x2fa /* Interrupt Identification */
#define com2Lcr 0x2fb /* Line Control */
#define com2Mcr 0x2fc /* Modem Control */
#define com2Lsr 0x2fd /* Line Status */
#define com2Msr 0x2fe /* Modem Status */
#define com2Scr 0x2ff /* Scratch */
#define com2Dll 0x2f8 /* Divisor Latch - lsb */
#define com2Dlm 0x2f9 /* Divisor Latch - msb */
#define lptDr 0x3bc
#define lptSr 0x3bd
#define lptCr 0x3be
#define lptSTB 0x01
#define lptAFD 0x02
#define lptnInit 0x04
#define lptSlct 0x08
#define lptIrq 0x10
#define lptDir 0x20
#define lptDly 100000

320
gdb/nlm/alpha.c
View File

@ -1,5 +1,21 @@
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include <errno.h>
#include <nwdfs.h>
#include <nwconio.h>
#include <nwadv.h>
#include <nwdbgapi.h>
#include <nwthread.h>
#include <aio.h>
#include "alpha.h"
extern char *mem2hex (void *mem, char *buf, int count, int may_fault);
extern char *hex2mem (char *buf, void *mem, int count, int may_fault);
extern int computeSignal (int exceptionVector);
/* Get the registers out of the frame information. */
void
@ -150,3 +166,307 @@ do_status (ptr, frame)
*ptr = '\000';
}
/* This section provides stubs and equivalent interfaces for all functions that
the debugger stub needs, but aren't yet implemented (such as the AIO nlm). */
#include <nwtypes.h>
#include <errno.h>
#include <stdio.h>
#include <aio.h>
#define CONST const
#define com1Rbr 0x3f8 /* Receiver Buffer - Read */
#define com1Thr 0x3f8 /* Transmitter Holding - Write */
#define com1Ier 0x3f9 /* Interrupt Enable */
#define com1Iir 0x3fa /* Interrupt Identification */
#define com1Lcr 0x3fb /* Line Control */
#define com1Mcr 0x3fc /* Modem Control */
#define com1Lsr 0x3fd /* Line Status */
#define com1Msr 0x3fe /* Modem Status */
#define com1Scr 0x3ff /* Scratch */
#define com1Dll 0x3f8 /* Divisor Latch - lsb */
#define com1Dlm 0x3f9 /* Divisor Latch - msb */
#define com2Rbr 0x2f8 /* Receiver Buffer - Read */
#define com2Thr 0x2f8 /* Transmitter Holding - Write */
#define com2Ier 0x2f9 /* Interrupt Enable */
#define com2Iir 0x2fa /* Interrupt Identification */
#define com2Lcr 0x2fb /* Line Control */
#define com2Mcr 0x2fc /* Modem Control */
#define com2Lsr 0x2fd /* Line Status */
#define com2Msr 0x2fe /* Modem Status */
#define com2Scr 0x2ff /* Scratch */
#define com2Dll 0x2f8 /* Divisor Latch - lsb */
#define com2Dlm 0x2f9 /* Divisor Latch - msb */
#define COM1 0x8000
#define COM2 0x9000
static ULONG
uart_getchar (void)
{
while ((inVti(com1Lsr) & 1) == 0);
return inVti (com1Rbr);
}
static void
uart_putchar (char c)
{
while ((inVti(com1Lsr) & 0x20) == 0);
outVti (com1Thr,c);
}
static int
uart_init (int baud)
{
int i;
int baudconst;
baudconst = 115200 / baud;
outVti (com1Lcr, 0x87);
outVti (com1Dlm, 0);
outVti (com1Dll, baudconst);
outVti (com1Lcr, 0x07);
outVti (com1Mcr, 0x0F);
outVti (com1Ier, 0x0);
}
int
AIOReadData (int portHandle, char *buffer, LONG length, LONG *numberBytesRead)
{
ULONG c;
while (1)
{
c = uart_getchar ();
if ((c & ~0377) == COM1)
break;
}
*buffer = c;
*numberBytesRead = 1;
return AIO_SUCCESS;
}
int
AIOWriteData (int portHandle, char *buffer, LONG length,
LONG *numberBytesWritten)
{
*numberBytesWritten = length;
while (length-- > 0)
uart_putchar (*buffer++);
return AIO_SUCCESS;
}
int
AIOAcquirePort (int *hardwareType, int *boardNumber, int *portNumber,
int *portHandle)
{
return AIO_SUCCESS;
}
int
AIOConfigurePort (int portHandle, BYTE bitRate, BYTE dataBits, BYTE stopBits,
BYTE parityMode, BYTE flowCtrlMode)
{
uart_init (9600);
return AIO_SUCCESS;
}
int
AIOGetPortConfiguration (int portHandle, AIOPORTCONFIG *pPortConfig,
AIODVRCONFIG *pDvrConfig)
{
fprintf (stderr, "AIOGetPortConfiguration stubbed out\n");
exit (1);
}
int
AIOReleasePort (int portHandle)
{
return AIO_SUCCESS;
}
int
AIOSetExternalControl (int portHandle, int requestType, int requestValue)
{
return AIO_SUCCESS;
}
int
AIOGetExternalStatus (int portHandle, LONG *extStatus, LONG *chgdExtStatus)
{
fprintf (stderr, "AIOGetExternalStatus stubbed out\n");
exit (1);
}
void
StopBell ()
{
}
int
Breakpoint (int __arg)
{
fprintf (stderr, "Breakpoint() stubbed out\n");
exit (1);
}
/*
* strtol : convert a string to long.
*
* Andy Wilson, 2-Oct-89.
*/
/* FIXME: It'd be nice to configure around these, but the include files are too
painful. These macros should at least be more portable than hardwired hex
constants. */
#define ULONG_MAX ((unsigned long)(~0L)) /* 0xFFFFFFFF */
#define LONG_MAX ((long)(ULONG_MAX >> 1)) /* 0x7FFFFFFF */
#define LONG_MIN ((long)(~LONG_MAX)) /* 0x80000000 */
extern int errno;
long
strtol(s, ptr, base)
CONST char *s; char **ptr; int base;
{
extern unsigned long strtoul();
int minus=0;
unsigned long tmp;
CONST char *start=s;
char *eptr;
if (s==NULL)
{
errno = ERANGE;
if (!ptr)
*ptr = (char *)start;
return 0L;
}
while (isspace(*s))
s++;
if (*s == '-') {
s++;
minus = 1;
}
else if (*s == '+')
s++;
/*
* let strtoul do the hard work.
*/
tmp = strtoul(s, &eptr, base);
if (ptr != NULL)
*ptr = (char *)((eptr==s) ? (char *)start : eptr);
if (tmp > (minus ? - (unsigned long) LONG_MIN : (unsigned long) LONG_MAX))
{
errno = ERANGE;
return (minus ? LONG_MIN : LONG_MAX);
}
return (minus ? (long) -tmp : (long) tmp);
}
/*
* strtol : convert a string to long.
*
* Andy Wilson, 2-Oct-89.
*/
#ifndef ULONG_MAX
#define ULONG_MAX ((unsigned long)(~0L)) /* 0xFFFFFFFF */
#endif
extern int errno;
unsigned long
strtoul(s, ptr, base)
CONST char *s; char **ptr; int base;
{
unsigned long total = 0;
unsigned digit;
CONST char *start=s;
int did_conversion=0;
int overflow = 0;
int negate = 0;
unsigned long maxdiv, maxrem;
if (s==NULL)
{
errno = ERANGE;
if (!ptr)
*ptr = (char *)start;
return 0L;
}
while (isspace(*s))
s++;
if (*s == '+')
s++;
else if (*s == '-')
s++, negate = 1;
if (base==0 || base==16) /* the 'base==16' is for handling 0x */
{
int tmp;
/*
* try to infer base from the string
*/
if (*s != '0')
tmp = 10; /* doesn't start with 0 - assume decimal */
else if (s[1] == 'X' || s[1] == 'x')
tmp = 16, s += 2; /* starts with 0x or 0X - hence hex */
else
tmp = 8; /* starts with 0 - hence octal */
if (base==0)
base = (int)tmp;
}
maxdiv = ULONG_MAX / base;
maxrem = ULONG_MAX % base;
while ((digit = *s) != '\0')
{
if (digit >= '0' && digit < ('0'+base))
digit -= '0';
else
if (base > 10)
{
if (digit >= 'a' && digit < ('a'+(base-10)))
digit = digit - 'a' + 10;
else if (digit >= 'A' && digit < ('A'+(base-10)))
digit = digit - 'A' + 10;
else
break;
}
else
break;
did_conversion = 1;
if (total > maxdiv
|| (total == maxdiv && digit > maxrem))
overflow = 1;
total = (total * base) + digit;
s++;
}
if (overflow)
{
errno = ERANGE;
if (ptr != NULL)
*ptr = (char *)s;
return (ULONG_MAX);
}
if (ptr != NULL)
*ptr = (char *) ((did_conversion) ? (char *)s : (char *)start);
return negate ? -total : total;
}

12
gdb/nlm/alpha.h
View File

@ -1,5 +1,3 @@
#include "alpha-patch.h"
/* Register values. All of these values *MUST* agree with tm.h */
#define RA_REGNUM 26 /* Contains return address value */
#define SP_REGNUM 30 /* Contains address of top of stack */
@ -12,8 +10,16 @@
#define ExceptionPC ExceptionRegs[SF_REG_PC].lo
#define DECR_PC_AFTER_BREAK 0 /* NT's Palcode gets this right! */
#define BREAKPOINT {0x80, 0, 0, 0} /* call_pal bpt */
unsigned char breakpoint_insn;
extern unsigned char breakpoint_insn[];
#define BREAKPOINT_SIZE 4
/*#define flush_i_cache() asm("call_pal 0x86")*/
/* Temporary defs until DEC gets their netware includes straightened out */
#include "altdebug.h" /* Get StackFrame structure */
#define isspace(C) (C == '\n' || C == '\r' || C == ' ' || C == '\t')
int Breakpoint (int __arg);
typedef unsigned long ULONG;

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