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Remove leading/trailing white spaces in ChangeLog

users/ARM/embedded-binutils-2_26-branch
H.J. Lu 11 years ago
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91cb26dac4
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72f4393d8c
51 changed files with 1421 additions and 1421 deletions
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  1. 2
      ChangeLog
  2. 4
      binutils/ChangeLog
  3. 4
      config/ChangeLog
  4. 14
      cpu/ChangeLog
  5. 8
      gas/ChangeLog
  6. 2
      gas/testsuite/ChangeLog
  7. 12
      gdb/ChangeLog
  8. 56
      gdb/doc/ChangeLog
  9. 18
      gdb/gdbserver/ChangeLog
  10. 8
      gdb/testsuite/ChangeLog
  11. 112
      gold/ChangeLog
  12. 48
      include/ChangeLog
  13. 34
      include/elf/ChangeLog
  14. 6
      include/gdb/ChangeLog
  15. 10
      include/opcode/ChangeLog
  16. 4
      intl/ChangeLog
  17. 24
      ld/testsuite/ChangeLog
  18. 20
      libdecnumber/ChangeLog
  19. 6
      libiberty/ChangeLog
  20. 34
      sim/ChangeLog
  21. 84
      sim/arm/ChangeLog
  22. 320
      sim/common/ChangeLog
  23. 8
      sim/cr16/ChangeLog
  24. 76
      sim/d10v/ChangeLog
  25. 46
      sim/erc32/ChangeLog
  26. 42
      sim/frv/ChangeLog
  27. 44
      sim/h8300/ChangeLog
  28. 80
      sim/igen/ChangeLog
  29. 6
      sim/iq2000/ChangeLog
  30. 50
      sim/lm32/ChangeLog
  31. 12
      sim/m32c/ChangeLog
  32. 28
      sim/m32r/ChangeLog
  33. 42
      sim/m68hc11/ChangeLog
  34. 8
      sim/mcore/ChangeLog
  35. 316
      sim/mips/ChangeLog
  36. 62
      sim/mn10300/ChangeLog
  37. 2
      sim/moxie/ChangeLog
  38. 908
      sim/ppc/ChangeLog
  39. 2
      sim/rl78/ChangeLog
  40. 10
      sim/rx/ChangeLog
  41. 76
      sim/sh/ChangeLog
  42. 10
      sim/sh64/ChangeLog
  43. 18
      sim/testsuite/ChangeLog
  44. 6
      sim/testsuite/d10v-elf/ChangeLog
  45. 6
      sim/testsuite/sim/cr16/ChangeLog
  46. 2
      sim/testsuite/sim/cris/ChangeLog
  47. 12
      sim/testsuite/sim/h8300/ChangeLog
  48. 2
      sim/testsuite/sim/mips/ChangeLog
  49. 4
      sim/testsuite/sim/sh/ChangeLog
  50. 122
      sim/v850/ChangeLog
  51. 12
      zlib/ChangeLog

2
ChangeLog
View File

@ -292,7 +292,7 @@
2014-04-04 Eric Botcazou <ebotcazou@adacore.com>
PR bootstrap/60620
* Makefile.def (dependencies): Make gnattools depend on libstdc++-v3.
* Makefile.def (dependencies): Make gnattools depend on libstdc++-v3.
* Makefile.in: Regenerate.
2014-03-28 Yaakov Selkowitz <yselkowitz@users.sourceforge.net>

4
binutils/ChangeLog
View File

@ -37,8 +37,8 @@
2015-07-09 Catherine Moore <clm@codesourcery.com>
* readelf.c (print_mips_fp_abi_value): Handle
Val_GNU_MIPS_ABI_FP_NAN2008.
* readelf.c (print_mips_fp_abi_value): Handle
Val_GNU_MIPS_ABI_FP_NAN2008.
2015-06-26 Matthew Fortune <matthew.fortune@imgtec.com>

4
config/ChangeLog
View File

@ -251,7 +251,7 @@
2012-07-02 Richard Guenther <rguenther@suse.de>
* isl.m4 (_ISL_CHECK_CT_PROG): Omit main function header/footer.
Fix version test.
Fix version test.
2012-07-02 Richard Guenther <rguenther@suse.de>
Michael Matz <matz@suse.de>
@ -293,7 +293,7 @@
* config/mh-interix: Remove as unneeded.
* config/picflag.m4 (i[[34567]]86-*-interix3*):
Change triplet to i[[34567]]86-*-interix[[3-9]]*.
Change triplet to i[[34567]]86-*-interix[[3-9]]*.
2012-01-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

14
cpu/ChangeLog
View File

@ -261,7 +261,7 @@
(dst32-16-16sa-Unprefixed-*): New
(jsri): Fix operands.
(setzx): Fix encoding.
2007-03-08 Alan Modra <amodra@bigpond.net.au>
* m32r.opc: Formatting.
@ -283,7 +283,7 @@
(parse_signed_bitbase8): Likewise.
(parse_signed_bitbase11): Likewise.
(parse_signed_bitbase19): Likewise.
2006-03-13 DJ Delorie <dj@redhat.com>
* m32c.cpu (Bit3-S): New.
@ -320,10 +320,10 @@
attribute.
(jsri16, jsri32): Add 1ADDR attribute.
(jsr32.w, jsr32.a): Add JUMP attribute.
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
* xc16x.cpu: New file containing complete CGEN specific XC16X CPU
description.
@ -424,7 +424,7 @@
stzx16-imm8-imm8-abs16): Fix operand typos.
* m32c.opc (m32c_asm_hash): Support bnCND.
(parse_signed4n, print_signed4n): New.
2005-10-26 DJ Delorie <dj@redhat.com>
* m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
@ -498,7 +498,7 @@
Fix compile time warnings about signedness mismatches.
Remove dead code.
(parse_lab_5_3): New parser function.
2005-07-16 Jim Blandy <jimb@redhat.com>
* m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,

8
gas/ChangeLog
View File

@ -47,8 +47,8 @@
2015-07-09 Catherine Moore <clm@codesourcery.com>
* config/tc-mips.c (check_fpabi): Handle
VAL_GNU_MIPS_ABI_FP_NAN2008.
* config/tc-mips.c (check_fpabi): Handle
VAL_GNU_MIPS_ABI_FP_NAN2008.
2015-07-08 Ciro Santilli <ciro.santilli@gmail.com>
@ -305,8 +305,8 @@
(aarch64_force_relocation): Ditto.
2015-05-28 Catherine Moore <clm@codesourcery.com>
Bernd Schmidt <bernds@codesourcery.com>
Paul Brook <paul@codesourcery.com>
Bernd Schmidt <bernds@codesourcery.com>
Paul Brook <paul@codesourcery.com>
gas/
* config/tc-alpha.c (all_cfi_sections): Declare.

2
gas/testsuite/ChangeLog
View File

@ -871,7 +871,7 @@
* gas/arm/neon-addressing-bad.s: Add test for invalid VSHL,
VQSHL, and VQSHLU immediates.
* gas/arm/neon-addressing-bad.l: Update accordingly.
* gas/arm/neon-addressing-bad.l: Update accordingly.
2015-01-10 Andrew Burgess <andrew.burgess@embecosm.com>

12
gdb/ChangeLog
View File

@ -757,7 +757,7 @@
(rx_frame_this_id): Rename parameter `this_prologue_cache' to
`this_cache'.
(rx_frame_prev_register): Rename parameter `this_prologue_cache' to
`this_cache'. Add cases for RX_FRAME_TYPE_EXCEPTION and
`this_cache'. Add cases for RX_FRAME_TYPE_EXCEPTION and
RX_FRAME_TYPE_FAST_INTERRUPT.
(normal_frame_p, exception_frame_p, rx_frame_sniffer_common)
(rx_frame_sniffer, rx_exception_sniffer): New functions.
@ -4043,10 +4043,10 @@
2015-03-18 Tristan Gingold <gingold@adacore.com>
* amd64-windows-tdep.c (amd64_windows_find_unwind_info): Move
redirection code to ...
(amd64_windows_frame_decode_insns): ... Here. Fix in prologue
checks. Fix SAVE_NONVOL operations. Add debug code and comments.
* amd64-windows-tdep.c (amd64_windows_find_unwind_info): Move
redirection code to ...
(amd64_windows_frame_decode_insns): ... Here. Fix in prologue
checks. Fix SAVE_NONVOL operations. Add debug code and comments.
2015-03-18 Gary Benson <gbenson@redhat.com>
@ -4152,7 +4152,7 @@
* config.in: Regenerate.
* configure: Regenerate.
* fbsd-nat.c [!HAVE_KINFO_GETVMMAP] (fbsd_read_mapping): Don't
define.
define.
(fbsd_find_memory_regions): Use kinfo_getvmmap to
enumerate memory regions if present.

56
gdb/doc/ChangeLog
View File

@ -31,7 +31,7 @@
2015-07-02 Markus Metzger <markus.t.metzger@intel.com>
* gdb.texinfo (Maintenance Commands): Document "maint btrace"
* gdb.texinfo (Maintenance Commands): Document "maint btrace"
commands.
2015-07-02 Markus Metzger <markus.t.metzger@intel.com>
@ -106,7 +106,7 @@
linux-namespaces" command.
2015-06-10 Walfred Tedeschi <walfred.tedeschi@intel.com>
Mircea Gherzan <mircea.gherzan@intel.com>
Mircea Gherzan <mircea.gherzan@intel.com>
* gdb.texinfo (i386): Add documentation about "show mpx bound"
and "set mpx bound".
@ -211,8 +211,8 @@
2015-04-10 Jan Kratochvil <jan.kratochvil@redhat.com>
Eli Zaretskii <eliz@gnu.org>
* gdb.texinfo (Compiling and Injecting Code): Describe set debug
compile, show debug compile. New subsection Compilation options for
* gdb.texinfo (Compiling and Injecting Code): Describe set debug
compile, show debug compile. New subsection Compilation options for
the compile command. New subsection Compiler search for the compile
command.
@ -1086,8 +1086,8 @@
2013-11-07 Phil Muldoon <pmuldoon@redhat.com>
* gdb.texinfo (Commands In Python): Document COMPLETE_EXPRESSION
constant.
* gdb.texinfo (Commands In Python): Document COMPLETE_EXPRESSION
constant.
2013-11-07 Phil Muldoon <pmuldoon@redhat.com>
@ -1717,8 +1717,8 @@
2012-12-23 Pierre Muller <muller@sourceware.org>
* gdbint.texinfo (Function prototypes): Require use of "extern"
modifier for function prototypes in headers.
* gdbint.texinfo (Function prototypes): Require use of "extern"
modifier for function prototypes in headers.
2012-12-19 Joel Brobecker <brobecker@adacore.com>
@ -1743,10 +1743,10 @@
2012-12-14 Tom Tromey <tromey@redhat.com>
* gdb.texinfo (SVR4 Process Information): Mention core files.
* gdb.texinfo (SVR4 Process Information): Mention core files.
2012-12-12 Mircea Gherzan <mircea.gherzan@intel.com>
* gdb.texinfo (GDB/MI Catchpoint Commands): New section.
2012-12-11 Pedro Alves <palves@redhat.com>
@ -1862,7 +1862,7 @@
* observer.texi (memory_changed): Expand parameter LEN to ssize_t.
2012-09-21 Yao Qi <yao@codesourcery.com>
Pedro Alves <palves@redhat.com>
Pedro Alves <palves@redhat.com>
* gdb.texinfo (GDB/MI Async Records): Document notification
'record-started' and 'record-stopped'.
@ -2162,7 +2162,7 @@
appropriate.
2012-05-18 Sandra Loosemore <sandra@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
* gdb.texinfo (MIPS): Document "set mips compression" and "show
mips compression".
@ -2451,7 +2451,7 @@
Mention condition-evaluation mode being shown in "info break".
(Break Conditions): Add description for target-side
conditional breakpoints.
(Remote Configuration): Mention conditional-breakpoints-packet.
(Remote Configuration): Mention conditional-breakpoints-packet.
(Packets): Add cond-expr parameter to Z0/Z1 packets and explain
cond-expr.
(General Query Packets): Mention new ConditionalBreakpoint feature.
@ -2686,17 +2686,17 @@
2011-10-27 Kevin Pouget <kevin.pouget@st.com>
* gdb.texinfo ((Frames In Python): Document
* gdb.texinfo ((Frames In Python): Document
gdb.FRAME_UNWIND_FIRST_ERROR contant.
2011-10-26 Paul Koning <paul_koning@dell.com>
* gdb.texinfo (gdb.types): Document new deepitems function.
2011-10-25 Paul Koning <paul_koning@dell.com>
PR python/13327
* gdb.texinfo (Values From Inferior): Add is_lazy attribute,
fetch_lazy method.
@ -2714,7 +2714,7 @@
2011-10-13 Kevin Pouget <kevin.pouget@st.com>
PR python/13285 Document named constants for frame unwind stop reasons
* gdb.texinfo (Frames In Python): Document gdb.FRAME_UNWIND_*
* gdb.texinfo (Frames In Python): Document gdb.FRAME_UNWIND_*
constants.
2011-10-12 Jan Kratochvil <jan.kratochvil@redhat.com>
@ -2825,7 +2825,7 @@
the syntax of Python. Also put class and module names explicitly
on function, member, and variable names, matching Python
documentation conventions.
2011-09-15 Kevin Pouget <kevin.pouget@st.com>
PR Python/12692 Add gdb.selected_inferior() to Python interface.
@ -2849,11 +2849,11 @@
2011-08-17 Phil Muldoon <pmuldoon@redhat.com>
* gdb.texinfo (Prompt): Add set/show extended-prompt
documentation
(Basic Python): Add prompt_hook anchor.
(Python modules): Reword module text to reflect multiple modules.
(gdb.prompt): Document gdb.prompt module.
* gdb.texinfo (Prompt): Add set/show extended-prompt
documentation
(Basic Python): Add prompt_hook anchor.
(Python modules): Reword module text to reflect multiple modules.
(gdb.prompt): Document gdb.prompt module.
2011-08-14 Yao Qi <yao@codesourcery.com>
@ -2899,10 +2899,10 @@
2011-07-11 Phil Muldoon <pmuldoon@redhat.com>
PR python/12438
PR python/12438
* gdb.texinfo (Python Commands): Add deprecate note to maint
set/show python print-stack. Document set/show python
print-backtrace.
set/show python print-stack. Document set/show python
print-backtrace.
2011-07-05 Thiago Jung Bauermann <bauerman.ibm.com>
@ -3105,7 +3105,7 @@
2011-02-27 Michael Snyder <msnyder@vmware.com>
* gdb.texinfo (Inferiors and Programs): Update commands to show
* gdb.texinfo (Inferiors and Programs): Update commands to show
that they can accept multiple arguments.
2011-02-24 Joel Brobecker <brobecker@adacore.com>
@ -3263,7 +3263,7 @@
2010-11-29 Phil Muldoon <pmuldoon@redhat.com>
PR python/12199
PR python/12199
* gdb.texinfo (Breakpoints In Python): Document "delete" method.

18
gdb/gdbserver/ChangeLog
View File

@ -642,20 +642,20 @@
2015-03-04 Pedro Alves <palves@redhat.com>
* linux-low.c (check_stopped_by_breakpoint) [USE_SIGTRAP_SIGINFO]:
* linux-low.c (check_stopped_by_breakpoint) [USE_SIGTRAP_SIGINFO]:
Decide whether a breakpoint triggered based on the SIGTRAP's
siginfo.si_code.
(thread_still_has_status_pending_p) [USE_SIGTRAP_SIGINFO]: Don't check whether a
breakpoint is inserted if relying on SIGTRAP's siginfo.si_code.
(thread_still_has_status_pending_p) [USE_SIGTRAP_SIGINFO]: Don't check whether a
breakpoint is inserted if relying on SIGTRAP's siginfo.si_code.
(linux_low_filter_event): Check for breakpoints before checking
watchpoints.
(linux_wait_1): Don't re-increment the PC if relying on SIGTRAP's
siginfo.si_code.
(linux_stopped_by_sw_breakpoint)
(linux_supports_stopped_by_sw_breakpoint)
(linux_stopped_by_hw_breakpoint)
(linux_supports_stopped_by_hw_breakpoint): New functions.
(linux_target_ops): Install new target methods.
(linux_stopped_by_sw_breakpoint)
(linux_supports_stopped_by_sw_breakpoint)
(linux_stopped_by_hw_breakpoint)
(linux_supports_stopped_by_hw_breakpoint): New functions.
(linux_target_ops): Install new target methods.
2015-03-04 Pedro Alves <palves@redhat.com>
@ -2885,7 +2885,7 @@
* server.h (struct emit_ops, current_insn_ptr, emit_error):
Move ...
* ax.h: ... here.
* ax.h: ... here.
2013-09-05 Pedro Alves <palves@redhat.com>

8
gdb/testsuite/ChangeLog
View File

@ -257,7 +257,7 @@
* gdb.mi/mi-dprintf-pendshr.c: New file.
2015-06-10 Walfred Tedeschi <walfred.tedeschi@intel.com>
Mircea Gherzan <mircea.gherzan@intel.com>
Mircea Gherzan <mircea.gherzan@intel.com>
* gdb.arch/i386-mpx-map.c: New file.
* gdb.arch/i386-mpx-map.exp: New File.
@ -776,7 +776,7 @@
2015-04-07 Pedro Alves <palves@redhat.com>
* lib/gdb.exp (gdb_test_multiple): When processing an argument,
* lib/gdb.exp (gdb_test_multiple): When processing an argument,
append the substituted item, not the original item.
2015-04-07 Pedro Alves <palves@redhat.com>
@ -3561,7 +3561,7 @@
(explicit_fork_child_follow): Deleted procedure.
(test_follow_fork): New procedure.
(do_fork_tests): Replace calls to deleted procedures with
calls to test_follow_fork and reset GDB for subsequent
calls to test_follow_fork and reset GDB for subsequent
procedure calls.
2014-06-17 Yao Qi <yao@codesourcery.com>
@ -5326,7 +5326,7 @@
Pedro Alves <palves@redhat.com>
* gdb.mi/mi-info-os.exp: Connect to the target with
mi_gdb_target_load.
mi_gdb_target_load.
2014-01-08 Pedro Alves <palves@redhat.com>

112
gold/ChangeLog
View File

@ -239,37 +239,37 @@
Patch for erratum 843419 internal error.
* aarch64.cc (Erratum_stub::Insn_utilities): New typedef.
(Erratum_stub::update_erratum_insn): New method.
(Stub_table::relocate_stubs): Modified to place relocated insn.
(AArch64_relobj::fix_errata): Modified gold_assert.
* aarch64.cc (Erratum_stub::Insn_utilities): New typedef.
(Erratum_stub::update_erratum_insn): New method.
(Stub_table::relocate_stubs): Modified to place relocated insn.
(AArch64_relobj::fix_errata): Modified gold_assert.
2015-06-12 Han Shen <shenhan@google.com>
Fix erratum 835769.
* aarch64.cc (AArch64_insn_utilities::BYTES_PER_INSN): Move
defintion outside class definition.
(AArch64_insn_utilities::AARCH64_ZR): New static constant.
(AArch64_insn_utilities::aarch64_op31): New member.
(AArch64_insn_utilities::aarch64_ra): New member.
(AArch64_insn_utilities::aarch64_mac): New member.
(AArch64_insn_utilities::aarch64_mlxl): New member.
(ST_E_835769): New global enum member.
(Stub_table::relocate_stubs): Add 835769 handler.
(Stub_template_repertoire::Stub_template_repertoire): Install new
stub type.
(AArch64_relobj::scan_errata): This func is renamed from
scan_erratum_843419.
(AArch64_relobj::do_count_local_symbols): Add 835769 handler.
(AArch64_relobj::do_relocate_sections): Add 835769 handler.
(AArch64_relobj::scan_sections_for_stubs): Add 835769 handler.
(Target_aarch64::scan_erratum_835769_span): New method.
(Target_aarch64::create_erratum_stub): New method.
(Target_aarch64::is_erratum_835769_sequence): New method.
(Target_aarch64::scan_erratum_843419_sequence): Move part of the
code into create_erratum_stub.
* options.h (fix_cortex_a53_835769): New option.
* aarch64.cc (AArch64_insn_utilities::BYTES_PER_INSN): Move
defintion outside class definition.
(AArch64_insn_utilities::AARCH64_ZR): New static constant.
(AArch64_insn_utilities::aarch64_op31): New member.
(AArch64_insn_utilities::aarch64_ra): New member.
(AArch64_insn_utilities::aarch64_mac): New member.
(AArch64_insn_utilities::aarch64_mlxl): New member.
(ST_E_835769): New global enum member.
(Stub_table::relocate_stubs): Add 835769 handler.
(Stub_template_repertoire::Stub_template_repertoire): Install new
stub type.
(AArch64_relobj::scan_errata): This func is renamed from
scan_erratum_843419.
(AArch64_relobj::do_count_local_symbols): Add 835769 handler.
(AArch64_relobj::do_relocate_sections): Add 835769 handler.
(AArch64_relobj::scan_sections_for_stubs): Add 835769 handler.
(Target_aarch64::scan_erratum_835769_span): New method.
(Target_aarch64::create_erratum_stub): New method.
(Target_aarch64::is_erratum_835769_sequence): New method.
(Target_aarch64::scan_erratum_843419_sequence): Move part of the
code into create_erratum_stub.
* options.h (fix_cortex_a53_835769): New option.
2015-06-11 Cary Coutant <ccoutant@gmail.com>
@ -420,33 +420,33 @@
2015-06-03 Cary Coutant <ccoutant@gmail.com>
PR gold/17819
* gold.cc (queue_final_tasks): When --build-id=tree, queue a
separate task to schedule the build id computation.
* layout.cc (Hash_task::Hash_task): Remove build_id_blocker,
add Output_file and offset.
(Hash_task::run): Get and release the input views.
(Hash_task::is_runnable): Always return NULL (always runnable).
(Layout::queue_build_id_tasks): Remove.
(Layout::write_build_id): Add array_of_hashes and size_of_hashes
parameters; use them instead of class members.
(Build_id_task_runner::run): New function.
(Close_task_runner::run): Pass array_of_hashes and size_of_hashes
to write_build_id.
* layout.h (Layout::queue_build_id_tasks): Remove.
(Layout::write_build_id): Add array_of_hashes and size_of_hashes
parameters.
(Layout::array_of_hashes_): Remove.
(Layout::size_of_array_of_hashes_): Remove.
(Layout::input_view_): Remove.
(Build_id_task_runner): New class.
(Close_task_runner::Close_task_runner): Add array_of_hashes and
size_of_hashes parameters.
(Close_task_runner::array_of_hashes_): New data member.
(Close_task_runner::size_of_hashes_): New data member.
* testsuite/Makefile.am
(flagstest_compress_debug_sections_and_build_id_tree): New test.
* testsuite/Makefile.in: Regenerate.
PR gold/17819
* gold.cc (queue_final_tasks): When --build-id=tree, queue a
separate task to schedule the build id computation.
* layout.cc (Hash_task::Hash_task): Remove build_id_blocker,
add Output_file and offset.
(Hash_task::run): Get and release the input views.
(Hash_task::is_runnable): Always return NULL (always runnable).
(Layout::queue_build_id_tasks): Remove.
(Layout::write_build_id): Add array_of_hashes and size_of_hashes
parameters; use them instead of class members.
(Build_id_task_runner::run): New function.
(Close_task_runner::run): Pass array_of_hashes and size_of_hashes
to write_build_id.
* layout.h (Layout::queue_build_id_tasks): Remove.
(Layout::write_build_id): Add array_of_hashes and size_of_hashes
parameters.
(Layout::array_of_hashes_): Remove.
(Layout::size_of_array_of_hashes_): Remove.
(Layout::input_view_): Remove.
(Build_id_task_runner): New class.
(Close_task_runner::Close_task_runner): Add array_of_hashes and
size_of_hashes parameters.
(Close_task_runner::array_of_hashes_): New data member.
(Close_task_runner::size_of_hashes_): New data member.
* testsuite/Makefile.am
(flagstest_compress_debug_sections_and_build_id_tree): New test.
* testsuite/Makefile.in: Regenerate.
2015-06-01 Rafael Ávila de Espíndola <rafael.espindola@gmail.com>
@ -930,7 +930,7 @@
object->merge_output_offset.
2015-03-02 Peter Collingbourne <pcc@google.com>
Cary Coutant <ccoutant@google.com>
Cary Coutant <ccoutant@google.com>
* output.cc (Output_section::add_merge_input_section): Do not
attempt to merge sections with an entsize of 0.
@ -1481,7 +1481,7 @@ gold/
Add "typename" keyword.
2014-10-15 Han Shen <shenhan@google.com>
Jing Yu <jingyu@google.com>
Jing Yu <jingyu@google.com>
Patch for gold aarch64 backend to support relaxation.
* aarch64-reloc.def: Change format.
@ -1541,7 +1541,7 @@ gold/
* po/POTFILES.in: Regenerate.
2014-09-23 Taiju Tsuiki <tzik@google.com>
Cary Coutant <ccoutant@google.com>
Cary Coutant <ccoutant@google.com>
PR gold/14860
* gold.cc (queue_final_tasks): Add Write_sections_task as a blocker

48
include/ChangeLog
View File

@ -26,7 +26,7 @@
2015-07-09 Catherine Moore <clm@codesourcery.com>
* elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New.
* elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New.
2015-07-08 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
@ -145,8 +145,8 @@
* gcc-interface.h: New file.
2014-12-11 Uros Bizjak <ubizjak@gmail.com>
Ben Elliston <bje@au.ibm.com>
Manuel Lopez-Ibanez <manu@gcc.gnu.org>
Ben Elliston <bje@au.ibm.com>
Manuel Lopez-Ibanez <manu@gcc.gnu.org>
* libiberty.h (xvasprintf): Declare.
@ -335,7 +335,7 @@
2013-10-10 Sean Keys <skeys@ipdatasys.com>
* xgate.h : Cleanup after opcode
table modification..
table modification..
2013-08-20 Alan Modra <amodra@gmail.com>
@ -352,7 +352,7 @@
* vtv-change-permission.h: New file.
2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
Konrad Eisele <konrad@gaisler.com>
Konrad Eisele <konrad@gaisler.com>
* opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON.
@ -373,8 +373,8 @@
2013-05-06 Paul Brook <paul@codesourcery.com>
include/elf/
* mips.h (R_MIPS_PC32): Update comment.
include/elf/
* mips.h (R_MIPS_PC32): Update comment.
2013-04-03 Jason Merrill <jason@redhat.com>
@ -411,7 +411,7 @@
explicitly for all values.
2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
Andrew Jenner <andrew@codesourcery.com>
Andrew Jenner <andrew@codesourcery.com>
Based on patches from Altera Corporation.
@ -456,7 +456,7 @@
DEMANGLE_COMPONENT_TAGGED_NAME.
2012-10-29 Sterling Augustine <saugustine@google.com>
Cary Coutant <ccoutant@google.com>
Cary Coutant <ccoutant@google.com>
* dwarf2.h (dwarf_location_list_entry_type): New enum with fields
DW_LLE_GNU_end_of_list_entry, DW_LLE_GNU_base_address_selection_entry,
@ -544,15 +544,15 @@
(ARM_ARCH_V8A_CRYPTO): Likewise.
2012-08-13 Ian Bolton <ian.bolton@arm.com>
Laurent Desnogues <laurent.desnogues@arm.com>
Jim MacArthur <jim.macarthur@arm.com>
Marcus Shawcroft <marcus.shawcroft@arm.com>
Nigel Stephens <nigel.stephens@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Richard Earnshaw <rearnsha@arm.com>
Sofiane Naci <sofiane.naci@arm.com>
Tejas Belagod <tejas.belagod@arm.com>
Yufeng Zhang <yufeng.zhang@arm.com>
Laurent Desnogues <laurent.desnogues@arm.com>
Jim MacArthur <jim.macarthur@arm.com>
Marcus Shawcroft <marcus.shawcroft@arm.com>
Nigel Stephens <nigel.stephens@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Richard Earnshaw <rearnsha@arm.com>
Sofiane Naci <sofiane.naci@arm.com>
Tejas Belagod <tejas.belagod@arm.com>
Yufeng Zhang <yufeng.zhang@arm.com>
* dis-asm.h (print_insn_aarch64): New declaration.
(print_aarch64_disassembler_options): New declaration.
@ -563,7 +563,7 @@
* elf/m68hc11.h: #define E_M68HC11_NO_BANK_WARNING 0x000000200
2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
Dr David Alan Gilbert <dave@treblig.org>
Dr David Alan Gilbert <dave@treblig.org>
PR binutils/13135
* dis-asm.h (fprintf_ftype): Add ATTRIBUTE_FPTR_PRINTF_2.
@ -1651,9 +1651,9 @@
override_segment_assignment field.
2007-02-17 Mark Mitchell <mark@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
Vladimir Prus <vladimir@codesourcery.com
Joseph Myers <joseph@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
Vladimir Prus <vladimir@codesourcery.com
Joseph Myers <joseph@codesourcery.com>
* bin-bugs.h: Remove.
@ -1756,8 +1756,8 @@
relax_pass.
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
* dis-asm.h (print_insn_xc16c): New prototype.

34
include/elf/ChangeLog
View File

@ -172,9 +172,9 @@
* avr.h: Add R_AVR_PORT5 and R_AVR_PORT6.
2014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
Pitchumani Sivanupandi <pitchumani.s@atmel.com>
Soundararajan <Sounderarajan.D@atmel.com>
Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
Pitchumani Sivanupandi <pitchumani.s@atmel.com>
Soundararajan <Sounderarajan.D@atmel.com>
* avr.h (E_AVR_MACH_AVRTINY): Define avrtiny machine number.
(R_AVR_LDS_STS_16): Define 16 bit lds/sts reloc number.
@ -351,7 +351,7 @@
* common.h (NT_S390_TDB): Define.
2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
Andrew Jenner <andrew@codesourcery.com>
Andrew Jenner <andrew@codesourcery.com>
Based on patches from Altera Corporation.
@ -442,15 +442,15 @@
(R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto.
2012-08-13 Ian Bolton <ian.bolton@arm.com>
Laurent Desnogues <laurent.desnogues@arm.com>
Jim MacArthur <jim.macarthur@arm.com>
Marcus Shawcroft <marcus.shawcroft@arm.com>
Nigel Stephens <nigel.stephens@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Richard Earnshaw <rearnsha@arm.com>
Sofiane Naci <sofiane.naci@arm.com>
Tejas Belagod <tejas.belagod@arm.com>
Yufeng Zhang <yufeng.zhang@arm.com>
Laurent Desnogues <laurent.desnogues@arm.com>
Jim MacArthur <jim.macarthur@arm.com>
Marcus Shawcroft <marcus.shawcroft@arm.com>
Nigel Stephens <nigel.stephens@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Richard Earnshaw <rearnsha@arm.com>
Sofiane Naci <sofiane.naci@arm.com>
Tejas Belagod <tejas.belagod@arm.com>
Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64.h: New file.
* common.h (EM_res183): Rename to EM_AARCH64.
@ -624,7 +624,7 @@
* x86-64.h (R_X86_64_RELATIVE64): New.
2011-07-24 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (R_MICROMIPS_min): New relocations.
(R_MICROMIPS_26_S1): Likewise.
@ -763,7 +763,7 @@
* tic6x-attrs.h (Tag_ABI_compatibility): Define.
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* tic6x-attrs.h (Tag_ABI_DSBT): New.
@ -1725,8 +1725,8 @@
* m32c.h: Add relax relocs.
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
* common.h (EM_XC16X): New entry for xc16x cpu.
Sort other EM_* numbers into numerical order.

6
include/gdb/ChangeLog
View File

@ -58,7 +58,7 @@
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
2012-05-24 Pedro Alves <palves@redhat.com>
@ -122,7 +122,7 @@
2009-05-18 Jon Beniston <jon@beniston.com>
* sim-lm32.h: New file.
* sim-lm32.h: New file.
2009-01-07 Hans-Peter Nilsson <hp@axis.com>
@ -289,7 +289,7 @@ Wed Jul 17 19:36:38 2002 J"orn Rennecke <joern.rennecke@superh.com>
2002-05-10 Elena Zannoni <ezannoni@redhat.com>
* sim-sh.h: New file, for sh gdb<->sim interface.
* sim-sh.h: New file, for sh gdb<->sim interface.
2002-05-09 Daniel Jacobowitz <drow@mvista.com>

10
include/opcode/ChangeLog
View File

@ -207,7 +207,7 @@
2014-09-16 Kuan-Lin Chen <kuanlinchentw@gmail.com>
* nds32.h: Add new opcode declaration.
* nds32.h: Add new opcode declaration.
2014-09-15 Andrew Bennett <andrew.bennett@imgtec.com>
Matthew Fortune <matthew.fortune@imgtec.com>
@ -250,9 +250,9 @@
(INSN_COPROC_MOVE): New define.
2014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
Pitchumani Sivanupandi <pitchumani.s@atmel.com>
Soundararajan <Sounderarajan.D@atmel.com>
Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
Pitchumani Sivanupandi <pitchumani.s@atmel.com>
Soundararajan <Sounderarajan.D@atmel.com>
* avr.h (AVR_ISA_TINY): Define avrtiny specific ISA.
(AVR_ISA_2xxxa): Define ISA without LPM.
@ -619,7 +619,7 @@
* aarch64.h (AARCH64_FEATURE_CRC): New macro.
2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
Andrew Jenner <andrew@codesourcery.com>
Andrew Jenner <andrew@codesourcery.com>
Based on patches from Altera Corporation.

4
intl/ChangeLog
View File

@ -110,8 +110,8 @@
2004-04-25 Paolo Bonzini <bonzini@gnu.org>
* configure.ac: Point config.intl to the parent directory of
${top_builddir}.
* configure.ac: Point config.intl to the parent directory of
${top_builddir}.
* configure: Regenerate.
2004-03-10 Kelley Cook <kcook@gcc.gnu.org>

24
ld/testsuite/ChangeLog
View File

@ -12,18 +12,18 @@
2015-07-09 Catherine Moore <clm@codesourcery.com>
* ld-mips-elf/attr-gnu-4-08.d: Update expected output.
* ld-mips-elf/attr-gnu-4-09.d: New.
* ld-mips-elf/attr-gnu-4-19.d: New.
* ld-mips-elf/attr-gnu-4-29.d: New.
* ld-mips-elf/attr-gnu-4-39.d: New.
* ld-mips-elf/attr-gnu-4-49.d: New.
* ld-mips-elf/attr-gnu-4-59.d: New.
* ld-mips-elf/attr-gnu-4-69.d: New.
* ld-mips-elf/attr-gnu-4-79.d: New.
* ld-mips-elf/attr-gnu-4-89.d: New.
* ld-mips-elf/attr-gnu-4-9.s: New.
* ld-mips-elf/mips-elf.exp: Run new tests.
* ld-mips-elf/attr-gnu-4-08.d: Update expected output.
* ld-mips-elf/attr-gnu-4-09.d: New.
* ld-mips-elf/attr-gnu-4-19.d: New.
* ld-mips-elf/attr-gnu-4-29.d: New.
* ld-mips-elf/attr-gnu-4-39.d: New.
* ld-mips-elf/attr-gnu-4-49.d: New.
* ld-mips-elf/attr-gnu-4-59.d: New.
* ld-mips-elf/attr-gnu-4-69.d: New.
* ld-mips-elf/attr-gnu-4-79.d: New.
* ld-mips-elf/attr-gnu-4-89.d: New.
* ld-mips-elf/attr-gnu-4-9.s: New.
* ld-mips-elf/mips-elf.exp: Run new tests.
2015-07-08 Pitchumani Sivanupandi <pitchumani.s@atmel.com>

20
libdecnumber/ChangeLog
View File

@ -27,7 +27,7 @@
* configure.ac: Add AC_CONFIG_AUX_DIR.
* configure: Regenerated.
2013-03-27 Kai Tietz <ktietz@redhat.com>
* configure: Regenerated.
@ -212,7 +212,7 @@
2009-04-01 Ben Elliston <bje@au.ibm.com>
* decContext.h: Include gstdint.h instead of <stdint.h>.
* decContext.h: Include gstdint.h instead of <stdint.h>.
2009-03-30 Ben Elliston <bje@au.ibm.com>
@ -464,7 +464,7 @@
* Makefile.in: Don't include decRound in library used by compiler.
2006-10-10 Brooks Moses <bmoses@stanford.edu>
2006-10-10 Brooks Moses <bmoses@stanford.edu>
* Makefile.in: Added empty "pdf" target.
2006-09-15 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
@ -559,11 +559,11 @@
2006-01-02 Paolo Bonzini <bonzini@gnu.org>
PR target/25259
* configure.ac: Use GCC_HEADER_STDINT.
* decContext.h: Include gstdint.h.
* aclocal.m4: Regenerate.
* configure: Regenerate.
PR target/25259
* configure.ac: Use GCC_HEADER_STDINT.
* decContext.h: Include gstdint.h.
* aclocal.m4: Regenerate.
* configure: Regenerate.
2005-12-20 Roger Sayle <roger@eyesopen.com>
@ -602,7 +602,7 @@
* decimal32.c: Ditto.
* decimal64.c: Ditto.
* decimal128.c: Ditto.
2005-11-29 Ben Elliston <bje@au.ibm.com>
* decUtility.c: Remove redundant #includes.
@ -619,7 +619,7 @@
2005-11-29 Ben Elliston <bje@au.ibm.com>
* decimal32.h, decimal64.h, decimal128.h: New.
* decimal32.c, decimal64.c, decimal128.c: Likewise.
* decimal32.c, decimal64.c, decimal128.c: Likewise.
* decContext.c, decContext.h: Likewise.
* decUtility.c, decUtility.h: Likewise.
* decNumber.c, decNumber.h, decNumberLocal.h: Likewise.

6
libiberty/ChangeLog
View File

@ -125,8 +125,8 @@
* functions.texi: Regenerate.
2014-12-11 Uros Bizjak <ubizjak@gmail.com>
Ben Elliston <bje@au.ibm.com>
Manuel Lopez-Ibanez <manu@gcc.gnu.org>
Ben Elliston <bje@au.ibm.com>
Manuel Lopez-Ibanez <manu@gcc.gnu.org>
* xvasprintf.c: New file.
* vprintf-support.h: Likewise.
@ -351,7 +351,7 @@
(d_ctor_dtor_name): Handle unified ctor/dtor.
2013-11-22 Cary Coutant <ccoutant@google.com>
PR other/59195
* cp-demangle.c (struct d_info_checkpoint): New struct.
(struct d_print_info): Add current_template field.

34
sim/ChangeLog
View File

@ -415,7 +415,7 @@
2009-10-06 Michael Eager <eager@eagercon.com>
* microblaze/interp.c: Add include microblaze-dis.h.
2009-09-23 Michael Eager <eager@eagercon.com>
* configure: Add microblaze-*.* (not regenerated).
@ -449,9 +449,9 @@
2009-05-18 Jon Beniston <jon@beniston.com>
* MAINTAINERS: Add Jon Beniston as maintainer of lm32 sim.
* configure.ac: Add lm32 target.
* lm32: New directory.
* MAINTAINERS: Add Jon Beniston as maintainer of lm32 sim.
* configure.ac: Add lm32 target.
* lm32: New directory.
2009-05-11 Andrew Cagney <cagney@gnu.org>
@ -622,8 +622,8 @@
* cris/config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* cris/configure: Regenerate.
@ -910,7 +910,7 @@
* cris/traps.c (cris_break_13_handler) <case TARGET_SYS_mmap2>:
For ((len & 8191) != 0 && fd == (USI) -1), don't say this isn't
implemented. In call to create_map, pad length argument to 8k.
implemented. In call to create_map, pad length argument to 8k.
2005-04-15 Corinna Vinschen <vinschen@redhat.com>
@ -969,7 +969,7 @@
* configure.ac: For mips*-*-* and mn10300*-*-* configure the
common directory. Remove sparc*-*-* from list.
2005-01-11 Andrew Cagney <cagney@gnu.org>
* Makefile.in (autoconf-common autoheader-common): Add --force to
@ -1016,7 +1016,7 @@
* MAINTAINERS: Add myself as maintainer of the FRV port.
2003-08-20 Michael Snyder <msnyder@redhat.com>
Dave Brolley <brolley@redhat.com>
Dave Brolley <brolley@redhat.com>
* frv/: New directory, simulator for the Fujitsu FRV.
* configure.in: Add frv configury.
@ -1062,7 +1062,7 @@
* configure.in (extra_subdirs): Mark d30v-*-* as obsolete.
* configure: Re-generate.
2002-06-16 Andrew Cagney <ac131313@redhat.com>
* Makefile.in (autoconf-changelog autoheader-changelog): Let name,
@ -1132,7 +1132,7 @@ Tue Jul 4 13:43:54 2000 Andrew Cagney <cagney@b1.cygnus.com>
2000-04-20 Nick Clifton <nickc@cygnus.com>
* configure.in (extra_subdirs): Add testsuite to strongarm
directories.
directories.
* configure: Regenerate.
Sat Mar 4 16:48:54 2000 Andrew Cagney <cagney@b1.cygnus.com>
@ -1236,12 +1236,12 @@ Wed Oct 8 12:38:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (extra_subdirs): Add IGEN directory when MIPS
target.
* configure: Regenerate.
Fri Sep 12 13:10:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (extra_subdirs): v850ea needs igen.
* configure: Re-generate.
Mon Sep 1 16:48:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (testdir): When a testsuite directory, add that to
@ -1255,14 +1255,14 @@ Tue Aug 26 15:14:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (w65-*-*, only_if_enabled): Set.
* configure: Re-generate.
Mon Aug 25 16:26:53 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (sparc*-*-*, only_if_enabled): Set
only_if_enabled=yes. Check only_if_enabled before enabling a
simulator.
* configure: Regenerate.
Mon Aug 18 10:56:59 1997 Nick Clifton <nickc@cygnus.com>
* configure.in (extra_subdirs): Add v850e target.
@ -1313,7 +1313,7 @@ Wed Mar 19 14:26:21 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* configure.in (extra_subdirs): Include testsuite for d30v.
* configure: Regenerate.
* Makefile.in (RUNTEST, RUNTESTFLAGS): Borrow test rules from
../gdb/Makefile.in
(check): New rules - drive the testsuite.
@ -1334,7 +1334,7 @@ Sun Feb 16 16:37:47 1997 Andrew Cagney <cagney@critters.cygnus.com>
* configure.in (d30v): New target.
* configure: Regenerated.
Wed Feb 19 23:17:13 1997 Jeffrey A Law (law@cygnus.com)
* configure.in: Don't require GCC to build the mn10200

84
sim/arm/ChangeLog
View File

@ -323,7 +323,7 @@
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
2012-05-18 Nick Clifton <nickc@redhat.com>
@ -393,8 +393,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
* wrapper.c (sim_target_display_usage): Add help parameter.
@ -502,7 +502,7 @@
set.
* wrapper.c (sim_create_inferior): For unknown architectures,
default to allowing the v6 instructions.
2005-04-18 Nick Clifton <nickc@redhat.com>
* iwmmxt.c (WMAC, WMADD): Move casts from the LHS of an assignment
@ -601,25 +601,25 @@
2003-03-20 Nick Clifton <nickc@redhat.com>
* Contribute support for Cirrus Maverick ARM co-processor,
written by Aldy Hernandez <aldyh@redhat.com> and
Andrew Cagney <cagney@redhat.com>:
written by Aldy Hernandez <aldyh@redhat.com> and
Andrew Cagney <cagney@redhat.com>:
* maverick.c: New file: Support for Maverick floating point
co-processor.
* Makefile.in: Add maverick.o target.
* configure.in (COPRO): Add maverick.o.
* configure: Regenerate.
* armcopro.c (ARMul_CoProInit): Only initialise co-processors
co-processor.
* Makefile.in: Add maverick.o target.
* configure.in (COPRO): Add maverick.o.
* configure: Regenerate.
* armcopro.c (ARMul_CoProInit): Only initialise co-processors
available on target processor. Add code to initialse Maverick
co-processor support code.
* armdefs.h (ARMul_state): Add is_ep9312 field.
(ARM_ep9312_Prop): Define.
* armemu.h: Add prototypes for Maverick co-processor
* armdefs.h (ARMul_state): Add is_ep9312 field.
(ARM_ep9312_Prop): Define.
* armemu.h: Add prototypes for Maverick co-processor
functions.
* arminit.c (ARMul_SelectProcessor): Initialise the
* arminit.c (ARMul_SelectProcessor): Initialise the
co-processor support once the chip has been selected.
* wrapper.c: Add support for Maverick co-processor.
(init): Do not call ARMul_CoProInit. Delays this until the
* wrapper.c: Add support for Maverick co-processor.
(init): Do not call ARMul_CoProInit. Delays this until the
chip has been selected.
2003-03-02 Nick Clifton <nickc@redhat.com>
@ -630,7 +630,7 @@
2003-02-27 Andrew Cagney <cagney@redhat.com>
* wrapper.c (sim_create_inferior, sim_open): Rename _bfd to bfd.
2003-01-10 Ben Elliston <bje@redhat.com>
* README.Cygnus: Rename from this ..
@ -651,7 +651,7 @@
* armemu.c (ARMul_Emulate32): Add more tests for valid MIA, MIAPH
and MIAxy instructions.
2002-06-21 Nick Clifton <nickc@cambridge.redhat.com>
* armos.h (ADP_Stopped_RunTimeError): Set correct value.
@ -708,7 +708,7 @@
(ARMul_OSInit): For XScale targets, only support the ANGEL
SWI interface. (This is at the request if Intel).
(ARMul_OSHandleSWI): Examine swi_mask to see if a particular
SWI call should be emulated.
SWI call should be emulated.
Do not fall through from AngelSWI_Reason_WriteC.
Propagate exit code from RedBoot Exit SWI.
* rdi-dgb.h (swi_mask): Prototype.
@ -849,8 +849,8 @@
2001-03-06 Nick Clifton <nickc@redhat.com>
* thumbemu.c (ARMul_ThumbDecode): Delete label bo_blx2.
Compute destination address of BLX(1) instruction by
taking bit 1 from PC and not from bit 0 of the offset.
Compute destination address of BLX(1) instruction by
taking bit 1 from PC and not from bit 0 of the offset.
2001-02-27 Nick Clifton <nickc@redhat.com>
@ -866,10 +866,10 @@
(ARMul_SwapWord): Pass extra parameter to PutWord.
(ARMul_SafeReadByte): New Function: Read a byte but do not abort.
(ARMul_SafeWriteByte): New Function: Write a byte but do not abort.
* armdefs.h: Add prototypes for ARMul_SafeReadByte and
ARMul_SafeWriteByte.
* wrapper.c (sim_write): Use ARMul_SafeWriteByte.
(sim_read): Use ARMul_SafeReadByte.
@ -881,7 +881,7 @@
(SWIwrite): Use ARMul_SafeReadByte.
(ARMul_OSHandleSWI): Remove use of is_SWI_handler.
(ARMul_OSException): Remove use of is_SWI_handler.
2001-02-16 Nick Clifton <nickc@redhat.com>
* armemu.c: Remove Prefetch abort for breakpoints. Instead set
@ -950,12 +950,12 @@
* armdefs.h (State): Add 'v5e' and 'xscale' fields.
(ARM_v5e_Prop): Define.
(ARM_XScale_Prop): Define.
* wrapper.c (sim_create_inferior): Select processor based on
machine number.
(SWI_vector_installed): New boolean. Set to true if the SWI
vector address is written to by the executable.
* arminit.c (ARMul_NewState): Switch default to 32 bit mode.
(ARMul_SelectProcessor): Initialise v5e and xscale signals.
(ARMul_Abort): Fix calculation of LR address.
@ -965,13 +965,13 @@
vector, otherwise issue a warning message and continue.
* armsupp.c (ARMul_CPSRAltered): Set S bit aswell.
* thumbemu.c: Add v5 instruction simulation.
* armemu.c: Add v5, XScale and El Segundo instruction simulation.
* armcopro.c: Add XScale co-processor emulation.
* armemu.h: Add exported XScale co-processor functions.
2000-09-15 Nick Clifton <nickc@redhat.com>
* armdefs.h: Rename StrongARM property to v4_ARM and add v5 ARM
@ -1131,7 +1131,7 @@ Wed Mar 22 15:24:21 2000 glen mccready <gkm@pobox.com>
* armsupp.c: Fix compile time warning messages.
* armvirt.c: Fix compile time warning messages.
* bag.c: Fix compile time warning messages.
2000-02-02 Bernd Schmidt <bernds@cygnus.co.uk>
* *.[ch]: Use indent to make readable.
@ -1146,7 +1146,7 @@ Wed Mar 22 15:24:21 2000 glen mccready <gkm@pobox.com>
1999-10-27 Nick Clifton <nickc@cygnus.com>
* thumbemu.c (ARMul_ThumbDecode): Accept 0xbebe as a thumb
breakpoint.
breakpoint.
1999-10-08 Ulrich Drepper <drepper@cygnus.com>
@ -1166,7 +1166,7 @@ Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-04-06 Keith Seitz <keiths@cygnus.com>
* wrapper.c (stop_simulator): New global.
@ -1214,11 +1214,11 @@ Thu Jun 4 15:22:03 1998 Jason Molenda (crash@bugshack.cygnus.com)
(SWIread): New function.
(SWIwrite): New function.
(SWIflen): New function.
(ARMul_OSHandleSWI): Call new functions instead of handling
(ARMul_OSHandleSWI): Call new functions instead of handling
these here.
(ARMul_OSHandleSWI): Handle Angel SWIs correctly.
(*): Reformat spacing to be a bit more GNUly.
Most code taken from a patch by Anthony Thompson
Most code taken from a patch by Anthony Thompson
(athompso@cambridge.arm.com)
Tue Jun 2 15:22:22 1998 Nick Clifton <nickc@cygnus.com>
@ -1330,7 +1330,7 @@ Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
Thu Oct 30 13:54:06 1997 Nick Clifton <nickc@cygnus.com>
* armos.c (ARMul_OSHandleSWI): Add support for GetEnv SWI. Patch
from Tony Thompson at ARM: athompso@arm.com
from Tony Thompson at ARM: athompso@arm.com
* wrapper.c (sim_create_inferior): Add code to create an execution
environment. Patch from Tony Thompson at ARM: athompso@arm.com
@ -1500,12 +1500,12 @@ Thu Oct 3 16:10:27 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
Wed Jun 26 12:17:24 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
(docdir): Removed.
* configure.in (AC_PREREQ): autoconf 2.5 or higher.
(AC_PROG_INSTALL): Added.
* configure: Rebuilt.
* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
(docdir): Removed.
* configure.in (AC_PREREQ): autoconf 2.5 or higher.
(AC_PROG_INSTALL): Added.
* configure: Rebuilt.
Wed Feb 21 12:14:31 1996 Ian Lance Taylor <ian@cygnus.com>
@ -1525,7 +1525,7 @@ Mon Nov 20 17:40:38 1995 Doug Evans <dje@canuck.cygnus.com>
* wrapper.c (mem_size, verbosity): New static global.
(arm_sim_set_mem_size): Renamed from sim_size. Callers updated.
(arm_sim_set_profile{,_size}): Renamed from sim_foo. Callers updated.
Fri Nov 17 19:35:11 1995 Doug Evans <dje@canuck.cygnus.com>
* armdefs.h (ARMul_State): New member `verbose'.

320
sim/common/ChangeLog
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File diff suppressed because it is too large

8
sim/cr16/ChangeLog
View File

@ -202,7 +202,7 @@
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
2012-03-24 Mike Frysinger <vapier@gentoo.org>
@ -253,8 +253,8 @@
* interp.c (hash): Remove incorrect prototype.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -266,6 +266,6 @@
2008-02-12 M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com>
* ChangeLog, Makefile.in, configure, configure.in, cr16_sim.h,
* ChangeLog, Makefile.in, configure, configure.in, cr16_sim.h,
gencode.c, interp.c, simops.c, endian.c: Created.

76
sim/d10v/ChangeLog
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@ -179,7 +179,7 @@
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
2012-03-24 Mike Frysinger <vapier@gentoo.org>
@ -221,8 +221,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -326,7 +326,7 @@
2002-06-13 Tom Rix <trix@redhat.com>
* interp.c (xfer_mem): Fix transfers across multiple segments.
2002-06-09 Andrew Cagney <cagney@redhat.com>
* Makefile.in (INCLUDE): Update path to callback.h.
@ -341,9 +341,9 @@
2002-06-02 Elena Zannoni <ezannoni@redhat.com>
From Jason Eckhardt <jle@redhat.com>
* d10v_sim.h (INC_ADDR): Correctly handle the case where MOD_E is
less than MOD_S (post-decrement).
From Jason Eckhardt <jle@redhat.com>
* d10v_sim.h (INC_ADDR): Correctly handle the case where MOD_E is
less than MOD_S (post-decrement).
2002-06-01 Andrew Cagney <ac131313@redhat.com>
@ -427,7 +427,7 @@ Mon Jan 3 00:14:33 2000 Andrew Cagney <cagney@b1.cygnus.com>
and "st2w" check that the address is aligned.
1999-12-30 Chandra Chavva <cchavva@cygnus.com>
* d10v_sim.h (INC_ADDR): Added code to assign
proper address for loads with predec operations.
@ -508,7 +508,7 @@ Sat Oct 23 20:06:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
* d10v_sim.h (DEBUG_MEMORY): Define.
(IMAP0, IMAP1, DMAP, SET_IMAP0, SET_IMAP1, SET_DMAP): Delete.
Sat Oct 23 18:41:18 1999 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_open): Allow a debug value to be passed to the -t
@ -552,9 +552,9 @@ Wed Sep 8 19:34:55 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
* simops.c (OP_6601): Do not write back decremented address if
either of the destination registers was the same as the address
register.
register.
(OP_6201): Do not write back incremented address if either of the
destination registers was the same as the address register.
destination registers was the same as the address register.
Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
@ -563,7 +563,7 @@ Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-04-02 Keith Seitz <keiths@cygnus.com>
* interp.c (ui_loop_hook_counter): New global (when NEED_UI_LOOP_HOOK
@ -588,14 +588,14 @@ Wed Mar 10 19:32:13 1999 Martin M. Hunt <hunt@cygnus.com>
1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com)
* simops.c (OP_5607): Correct saturation comparison/assignment.
(OP_1201, OP_1203, OP_17001200, OP_17001202,
OP_2A00, OP_2800, OP_2C00, OP_3200, OP_3201,
OP_1001, OP_1003, OP_17001000, OP_17001002): Ditto.
(OP_1201, OP_1203, OP_17001200, OP_17001202,
OP_2A00, OP_2800, OP_2C00, OP_3200, OP_3201,
OP_1001, OP_1003, OP_17001000, OP_17001002): Ditto.
1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com)
* simops.c (OP_5605): Sign extend MIN32 and MAX32 before saturation
comparison.
comparison.
(OP_5607): Ditto.
(OP_2A00): Ditto.
(OP_2800): Ditto.
@ -626,7 +626,7 @@ Wed Sep 30 10:14:18 1998 Nick Clifton <nickc@cygnus.com>
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
@ -652,7 +652,7 @@ Fri Apr 24 11:04:46 1998 Andrew Cagney <cagney@chook.cygnus.com>
* interp.c (struct hash_entry): OPCODE and MASK are unsigned.
* d10v_sim.h (remote-sim.h, sim-config.h): Include.
Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
@ -665,7 +665,7 @@ Wed Apr 1 12:59:17 1998 Andrew Cagney <cagney@b1.cygnus.com>
(OP_5F00, <*>): Trace input registers before making system call.
(OP_5F00, <kill>): Trace R0, R1 not REGn.
(OP_5F00, <getpid>): Always return 47.
* d10v_sim.h (SLOT, SLOT_NR, SLOT_PEND_MASK, SLOT_PEND,
SLOT_DISCARD, SLOT_FLUSH): Define. An implementation of write
back slots.
@ -690,7 +690,7 @@ Wed Apr 1 12:59:17 1998 Andrew Cagney <cagney@b1.cygnus.com>
After scheduling updates to registers using SET_*, flush updates.
(sim_resume): Re-order handling of RPT/repeat and IBA/hbreak so
that each sets pc using SET_* and last SET_* eventually winds out.
* simops.c: Use new SET_* et.al. macros to fetch / store
registers.
(move_to_cr): Add MASK argument for selective update of CREG bits.
@ -703,7 +703,7 @@ Wed Apr 1 12:59:17 1998 Andrew Cagney <cagney@b1.cygnus.com>
(OP_*): Re-write to use new SET_* et.al. macros.
(FUNC, PARM[1-4], RETVAL, RETVAL32): Redo definition.
(RETVAL_HIGH, RETVAL_LOW): Delete, use RETVAL32.
Wed Apr 1 12:55:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (SIM_AC_OPTION_WARNINGS): Add.
@ -731,7 +731,7 @@ Mon Oct 27 14:43:33 1997 Fred Fish <fnf@cygnus.com>
* (dmem_addr): If address is illegal or in I/O space, signal a bus
error. Allocate unified memory on demand. Fix DMEM address
calculations.
Mon Feb 16 10:27:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (OP_5F20): Implement "dbt".
@ -844,7 +844,7 @@ Tue Dec 9 10:28:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
(BPSW): Ditto for BPSW_CR and not PSW_CR.
* simops.c (OP_5F40): JMP to BPC instead of assigning PC directly.
Mon Dec 8 12:58:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (OP_5F00): From Martin Hunt <hunt@cygnus.com>. Change
@ -855,7 +855,7 @@ Mon Dec 8 12:58:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
* d10v_sim.h (AE_VECTOR_START, RIE_VECTOR_START,
SDBT_VECTOR_START, TRAP_VECTOR_START): Define.
* simops.c (OP_5F00): For "trap", mask out all but SM bit in PSW,
use move_to_cr.
(OP_5F00): For "trap", update BPSW with move_to_cr.
@ -867,7 +867,7 @@ Fri Dec 5 15:31:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
(PSW): Obtain value uing move_from_cr.
(MOD_S, MOD_E, BPSW): Make r-values.
(move_from_cr, move_to_cr): Declare functions.
* interp.c (sim_fetch_register, sim_store_register): Use
move_from_cr and move_to_cr for CR register transfers.
@ -946,7 +946,7 @@ Mon Nov 10 17:50:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign
extend bit 44 all constants.
(OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
Fri Oct 24 10:26:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
* d10v_sim.h: Include sim-types.h.
@ -959,7 +959,7 @@ Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_write_phys): New function, write to physical
instead of virtual memory.
* interp.c (sim_load): Pass lma_p and sim_write_phys to
sim_load_file.
@ -1075,7 +1075,7 @@ Wed Apr 16 16:12:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (OP_5F00): Only provide system calls SYS_execv,
SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host.
Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
@ -1193,7 +1193,7 @@ Fri Nov 8 16:19:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
(JMP): New macro. Sets the PC and the pc_changed flag.
* gencode.c (write_opcodes): Add is_long field.
* interp.c (lookup_hash): If we blindly apply a short opcode's mask
to a long opcode we could get a false match. Check the opcode size.
(hash): Add a size field to the hash table.
@ -1207,7 +1207,7 @@ Fri Nov 8 16:19:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* simops.c: Changed all branch and jump instructions to use new JMP macro.
(OP_20000000): Corrected trace information to show this is a ldi.l, not
a ldi.s instruction.
Thu Oct 31 19:13:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (sim_fetch_register, sim_store_register): Fix bug where
@ -1252,11 +1252,11 @@ Tue Oct 29 12:13:52 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* simops.c (MEMPTR): Redefine to use dmem_addr().
(OP_5F00): Replace references to STate.imem with dmem_addr().
* d10v-sim.h (State): Remove mem_min and mem_max. Add umem[128].
(RB,SW,RW,SLW,RLW): Redefine to use dmem_addr().
(IMAP0,IMAP1,DMAP,SET_IMAP,SET_IMAP1,SET_DMAP): Define.
Tue Oct 22 15:22:33 1996 Michael Meissner <meissner@tiktok.cygnus.com>
* d10v_sim.h (_ins_type): Reorganize, so that we can provide
@ -1317,7 +1317,7 @@ Wed Oct 16 13:50:06 1996 Michael Meissner <meissner@tiktok.cygnus.com>
independent endian functions. If compiling with GCC and
optimizing, include endian.c so the endian functions are inlined.
* simops.c (OP_5F00): Correct tracing of accumulators.
* simops.c (OP_5F00): Correct tracing of accumulators.
Tue Oct 15 10:57:50 1996 Michael Meissner <meissner@tiktok.cygnus.com>
@ -1363,7 +1363,7 @@ Mon Sep 23 17:55:30 1996 Michael Meissner <meissner@tiktok.cygnus.com>
Fri Sep 20 15:36:45 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (sim_create_inferior): Reinitialize State every time
* interp.c (sim_create_inferior): Reinitialize State every time
sim_create_inferior() is called.
Thu Sep 19 21:38:20 1996 Michael Meissner <meissner@wogglebug.ziplink.net>
@ -1388,7 +1388,7 @@ Wed Sep 18 09:13:25 1996 Michael Meissner <meissner@tiktok.cygnus.com>
* d10v_sim.h (DEBUG_INSTRUCTION): New debug value to include line
numbers and function names in debug trace.
(DEBUG): If not defined, set to DEBUG_TRACE, DEBUG_VALUES, and
DEBUG_LINE_NUMBER.
DEBUG_LINE_NUMBER.
(SIG_D10V_{STOP,EXIT}): Values to represent the stop instruction
and exit system call trap being executed.
@ -1414,7 +1414,7 @@ Wed Sep 18 09:13:25 1996 Michael Meissner <meissner@tiktok.cygnus.com>
available and if desired.
(OP_4E09): Don't print out DBT message.
(OP_5FE0): Set exception field to SIG_D10V_STOP.
(OP_5F00): Set exception field to SIG_D10V_EXIT.
(OP_5F00): Set exception field to SIG_D10V_EXIT.
Sat Sep 14 22:18:43 1996 Michael Meissner <meissner@tiktok.cygnus.com>
@ -1539,7 +1539,7 @@ Mon Aug 26 18:30:28 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v_sim.h (SEXT32): Added.
* interp.c: Commented out printfs.
* simops.c: Fixed error in sb and st2w.
* simops.c: Fixed error in sb and st2w.
Thu Aug 15 13:30:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
@ -1556,6 +1556,6 @@ Fri Aug 2 17:44:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
Thu Aug 1 17:05:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h,
* ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h,
gencode.c, interp.c, simops.c: Created.

46
sim/erc32/ChangeLog
View File

@ -235,7 +235,7 @@
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
2012-03-24 Mike Frysinger <vapier@gentoo.org>
@ -322,8 +322,8 @@
* sis.c: Correct spelling error.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -449,19 +449,19 @@ Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-03-03 DJ Delorie <dj@cygnus.com>
* configure.in: add termcap and -luser32 for host=cygwin
* configure: regenerate
1999-02-11 Hugo Tyson <hmt@cygnus.co.uk>
* exec.c (dispatch_instruction):
* exec.c (dispatch_instruction):
Correct the sense of the
if (!sparclite) {
sregs->trap = TRAP_UNIMP;
break;
break;
}
clause that has been pasted around: it's correct in the SCAN and
DIVScc (divide step) cases (where it was probably originally
@ -560,7 +560,7 @@ Tue Jun 2 15:20:35 1998 Mark Alexander <marka@cygnus.com>
(get_regi): Handle little-endian data.
(bfd_load): Recognize little-endian SPARClite as having
little-endian data.
Fri May 22 14:23:16 1998 Mark Alexander <marka@cygnus.com>
* erc32.c (port_init): Print messages only if sis_verbose is true.
@ -575,7 +575,7 @@ Thu May 14 23:10:48 1998 Mark Alexander <marka@cygnus.com>
* (div64): New helper function for 64-bit division.
* (dispatch_instruction): Add emulation of SDIV, SDIVCC, UDIV,
and UDIVCC.
Wed May 13 14:59:54 1998 Mark Alexander <marka@cygnus.com>
* erc32.c (close_port): Don't close stdin; it kills GDB.
@ -586,7 +586,7 @@ Wed May 13 14:59:54 1998 Mark Alexander <marka@cygnus.com>
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
@ -894,12 +894,12 @@ Wed Jul 3 16:05:23 1996 Stu Grossman (grossman@critters.cygnus.com)
Wed Jun 26 12:19:11 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
(docdir, oldincludedir): Removed.
* configure.in (AC_PREREQ): autoconf 2.5 or higher.
(AC_PROG_INSTALL): Added.
* configure: Rebuilt.
* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
(docdir, oldincludedir): Removed.
* configure.in (AC_PREREQ): autoconf 2.5 or higher.
(AC_PROG_INSTALL): Added.
* configure: Rebuilt.
Mon Jun 24 14:19:07 1996 Ian Lance Taylor <ian@cygnus.com>
@ -924,9 +924,9 @@ Sun May 19 21:05:31 1996 Rob Savoye <rob@chinadoll.cygnus.com>
Version 2.1 26-02-96
--------------------
* Fixed bug in "go" command.
version 2.0 05-02-96
--------------------
@ -964,22 +964,22 @@ version 1.6.2 25-10-95
--------------------
* Added -DFAST_UART to Makefile
version 1.6.1 24-10-95
--------------------
* Fixed bug in STDFQ which caused bus error
version 1.6 02-10-95
--------------------
* Modified srt0.s to include code that initiates registers in IU and FPU
and initializes the data segment. The simulator 'load' command does not
longer initialize the data segment!
* Corrected MEC timer operation; scalers now divide the frequency by
* Corrected MEC timer operation; scalers now divide the frequency by
(scaler_value + 1).
* MEC breakpoints are not checked during store operation
@ -1003,7 +1003,7 @@ version 1.4 22-08-95
* Added a '-g' switch to enable/disable the GNU readline(), which cause
some problems on solaris 2.x machines.
* Enabled MEC watchpoint and breakpoint function to mem.c. Performance
* Enabled MEC watchpoint and breakpoint function to mem.c. Performance
may suffer a bit ...
NOTE: The UARTs are now connected to /dev/ttypc and /dev/ttypd.

42
sim/frv/ChangeLog
View File

@ -237,8 +237,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -261,7 +261,7 @@
2005-10-28 Dave Brolley <brolley@redhat.com>
* cpu.c,cpu.h,decode.c,decode.h,model.c,sem.c: Regenerate.
Contribute the following changes:
2003-09-29 Dave Brolley <brolley@redhat.com>
@ -879,7 +879,7 @@
2000-09-01 Dave Brolley <brolley@redhat.com>
* interrupts.c (frv_queue_break_interrupt): Call sim_handle_breakpoint
* interrupts.c (frv_queue_break_interrupt): Call sim_handle_breakpoint
before queuing an interrupt in order to allow 'break' to be used as
the breakpoint insn.
@ -932,7 +932,7 @@ Thu Jul 6 13:51:12 2000 Dave Brolley <brolley@topaz>
(@cpu@_simulate_insn_prefetch): Monitoring of fetch buffer moved to
run_caches. Use cache directly if not counting cycles. Don't use
cache at all if not counting cycles and cache not enabled.
* frv.c (frv_insn_fetch_buffer): New global variable.
* frv.c (frv_insn_fetch_buffer): New global variable.
(run_caches): Monitor the status of insn prefetch requests.
* frv-sim.h (FRV_INSN_FETCH_BUFFER): New struct type.
(frv_insn_fetch_buffer): New global variable.
@ -1857,24 +1857,24 @@ Wed May 24 14:40:34 2000 Andrew Cagney <cagney@b1.cygnus.com>
Call sim_queue_fn_mem_xi_write.
(frvbf_load_quad_CPR): Call frvbf_read_mem_SI.
Call sim_queue_fn_mem_xi_write.
(frvbf_insn_cache_preload): New function.
(frvbf_data_cache_preload): New function.
(frvbf_insn_cache_unlock): New function.
(frvbf_data_cache_unlock): New function.
(frvbf_insn_cache_invalidate): New function.
(frvbf_data_cache_invalidate): New function.
(frvbf_data_cache_flush): New function.
(frvbf_insn_cache_preload): New function.
(frvbf_data_cache_preload): New function.
(frvbf_insn_cache_unlock): New function.
(frvbf_data_cache_unlock): New function.
(frvbf_insn_cache_invalidate): New function.
(frvbf_data_cache_invalidate): New function.
(frvbf_data_cache_flush): New function.
* frv-sim.h (sim-options.h): Include it.
(GET_HSR0): New macro.
(SET_HSR0): New macro.
(GET_HSR0_ICE): New macro.
(SET_HSR0_ICE): New macro.
(GET_HSR0_DCE): New macro.
(SET_HSR0_DCE): New macro.
(GET_HSR0_CBM): New macro.
(GET_HSR0_RME): New macro.
(GET_IHSR8): New macro.
(GET_IHSR8_NBC): New macro.
(SET_HSR0): New macro.
(GET_HSR0_ICE): New macro.
(SET_HSR0_ICE): New macro.
(GET_HSR0_DCE): New macro.
(SET_HSR0_DCE): New macro.
(GET_HSR0_CBM): New macro.
(GET_HSR0_RME): New macro.
(GET_IHSR8): New macro.
(GET_IHSR8_NBC): New macro.
(frvbf_insn_cache_preload): New function.
(frvbf_data_cache_preload): New function.
(frvbf_insn_cache_unlock): New function.

44
sim/h8300/ChangeLog
View File

@ -180,8 +180,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -267,7 +267,7 @@
2003-12-11 Dhananjay Deshpande <dhananjayd@kpitcummins.com>
* compile.c (set_h8300h): Initialize globals to zero.
* compile.c (set_h8300h): Initialize globals to zero.
2003-10-17 Shrinivas Atre <shrinivasa@KPITCummins.com>
@ -355,13 +355,13 @@
2003-03-20 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
* compile.c (cmdline_location): Added function to
* compile.c (cmdline_location): Added function to
return the location of 8-bit (256 locations) where the
Command Line arguments would be stored.
(decode): Added a TRAP to 0xcc for Commandline
(decode): Added a TRAP to 0xcc for Commandline
processing using pseudo opcode O_SYS_CMDLINE.
(sim_resume): Added handling of O_SYS_CMDLINE Trap.
(sim_create_inferior): Setting a pointer to
(sim_create_inferior): Setting a pointer to
Commandline Args array.
* inst.h: Added a new variable ptr_command_line for
storing pointer to Commandline array.
@ -423,24 +423,24 @@
2002-05-17 Andrey Volkov (avolkov@transas.com)
* compile.c: Add absented opcodes: LDC, STC, EEPMOV, TAS.
2002-05-17 Andrey Volkov (avolkov@transas.com)
* compile.c: Add support of EXR register
* inst.h: Ditto.
2002-05-17 Andrey Volkov (avolkov@transas.com)
* compile.c: Made h8300s as new target, not h8300h alias.
* inst.h: Ditto.
2002-05-17 Andrey Volkov (avolkov@transas.com)
* compile.c: Add additional CCR flags (I,UI,H,U)
* compile.c: Add additional CCR flags (I,UI,H,U)
2002-05-17 Andrey Volkov (avolkov@transas.com)
* compile.c: Change literal regnumbers to REGNUMS.
* compile.c: Change literal regnumbers to REGNUMS.
Fix instruction and cycles counting
2001-12-20 Kazu Hirata <kazu@hxi.com>
@ -485,7 +485,7 @@ Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-04-02 Keith Seitz <keiths@cygnus.com>
* compile.c (POLL_QUIT_INTERVAL): Define. Used to tweak the
@ -494,7 +494,7 @@ Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
@ -767,18 +767,18 @@ Wed Jun 26 08:58:53 1996 Jeffrey A Law (law@cygnus.com)
Wed Jun 26 12:20:56 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
(docdir): Removed.
* configure.in (AC_PREREQ): autoconf 2.5 or higher.
(AC_PROG_INSTALL): Added.
* configure: Rebuilt.
* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
(docdir): Removed.
* configure.in (AC_PREREQ): autoconf 2.5 or higher.
(AC_PROG_INSTALL): Added.
* configure: Rebuilt.
Tue Jun 18 16:31:10 1996 Jeffrey A. Law <law@rtl.cygnus.com>
* compile.c (sim_load): Treat the H8/S like the H8/300H for now.
* run.c (main): Treat the H8/S like the H8/300H for now.
Fri May 24 10:35:25 1996 Jeffrey A Law (law@cygnus.com)
* compile.c (SEXTCHAR): Clear upper bits when sign
@ -1030,7 +1030,7 @@ Fri Jul 9 14:36:48 1993 Doug Evans (dje@canuck.cygnus.com)
(sim_resume): Add support for extu,exts insns.
(sim_resume): Fix logical right shifting.
(sim_resume, label alu32): Fix setting of carry flag.
Sun Jul 4 00:35:41 1993 Doug Evans (dje@canuck.cygnus.com)
* compile.c (sim_csize): Initialize cpu.cache.
@ -1081,5 +1081,5 @@ Sun Jan 3 14:15:07 1993 Steve Chamberlain (sac@thepub.cygnus.com)
Tue Dec 22 13:56:48 1992 Steve Chamberlain (sac@thepub.cygnus.com)
* new
* new

80
sim/igen/ChangeLog
View File

@ -141,7 +141,7 @@
* gen.c, gen.h, igen.c, igen.h, ld-cache.c, ld-cache.h: Ditto.
* ld-decode.c, ld-decode.h, ld-insn.c, ld-insn.h, lf.c: Ditto.
* lf.h, misc.c, misc.h, table.c, table.h: Ditto.
2002-11-21 Andrew Cagney <ac131313@redhat.com>
* Makefile.in: Update copyright. IGEN contributed to the FSF.
@ -225,7 +225,7 @@ Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Dec 4 15:14:09 1998 Andrew Cagney <cagney@b1.cygnus.com>
* igen.c (main): Fix -Pitable=.
@ -263,7 +263,7 @@ Tue Jul 28 11:19:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
(insn_list_insert): Add sort key of instructions where
their operand fields have different conditionals.
(insn_field_cmp): New function.
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
* configure: Regenerated to track ../common/aclocal.m4 changes.
@ -287,7 +287,7 @@ Fri Apr 24 19:45:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
* gen-icache.c (print_icache_extraction): Do not type cast
pointers.
* ld-insn.c (load_insn_table): Terminate error with NL.
* gen.c (insns_bit_useless): Perform unsigned bit comparisons.
@ -335,7 +335,7 @@ Tue Apr 14 08:44:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
selected for expansion.
(gen_entry_expand_opcode): Trace each expanded instruction as it
is inserted into the table.
Mon Apr 13 19:21:47 1998 Andrew Cagney <cagney@b1.cygnus.com>
* ld-insn.c (parse_insn_word): Parse conditional operators.
@ -367,7 +367,7 @@ Fri Apr 3 18:08:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
print_includes): New functions. Generate include list. For for
semantics et.al. generate CPP code to inline when
C_REVEALS_MODULE_P.
* igen.c (gen_semantics_c): Call print_includes.
* gen-engine.c (gen_engine_c): Ditto.
@ -376,7 +376,7 @@ Sat Apr 4 21:09:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
* igen.h: (struct _igen_name_option): Replace with struct
igen_module_option. Contains both module prefix and suffix.
(INIT_OPTIONS): Initialize.
* igen.c (main): Update -P option to fill in full module info.
(gen-engine.c, gen-icache.c, gen-itable.c, gen-semantics.c,
gen-support.c): Update.
@ -428,7 +428,7 @@ Fri Feb 20 16:22:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
instruction style function model records
* ld-insn.h (nr_function_model_fields): Define.
Tue Feb 17 16:36:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
* igen.c (print_itrace_prefix): Generate call to trace_prefix
@ -452,12 +452,12 @@ Tue Feb 3 14:00:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
* igen.h: Add flag for warning about invalid instruction widths.
* igen.c: Parse -Wwidth option.
* gen-support.c (gen_support_h): Map instruction_word onto
<PREFIX>_instruction_word when needed.
(print_support_function_name): Use support prefix.
(gen_support_h): Ditto for <PREFIX>_idecode_issue.
Sun Feb 1 11:08:48 1998 Andrew Cagney <cagney@b1.cygnus.com>
* gen-support.c (gen_support_h): Generate new macro CPU_.
@ -471,7 +471,7 @@ Sat Jan 31 14:50:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
* gen-engine.c (print_run_body): Use CIA_GET & CIA_SET instead of
CPU_CIA. Parameterize with CPU argument.
Fri Jan 30 09:09:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
* gen.h (struct _gen_list): Replace processor with model.
@ -587,13 +587,13 @@ Mon Oct 27 15:14:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
* igen.c (main): Change -I option to -I<directory>. Add optional
size to -Ggen-icache option. Add -Gno-... support.
* igen.h (struct _igen_options): Add include field.
* ld-insn.c (enum insn_record_type, insn_type_map): Add
include_record.
(load_insn_table): Call table_push when include record.
* table.c (struct _open table, struct table): Make table object an
indirect ptr to the current table file.
(current_line, new_table_entry, next_line): Make file arg type
@ -657,7 +657,7 @@ Mon Sep 22 18:49:07 1997 Felix Lee <flee@cygnus.com>
* configure.in: i386-windows is a cross, so don't expect
libiberty to be there.
* configure: updated.
Fri Sep 19 10:36:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
* igen.c (print_function_name): Put the format name after the
@ -681,7 +681,7 @@ Thu Sep 11 10:27:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
* gen-semantics.c (print_semantic_body): Trace the instruction
after it has been validated.
(print_semantic_body): Count the instruction using sim-profile.
Wed Sep 10 13:35:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
* gen-itable.c (gen_itable_h): Collect summary info on instruction
@ -696,7 +696,7 @@ Tue Sep 9 03:30:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
* gen-engine.c, gen-idecode.c: Add multi-sim support - generate
one engine per model.
* gen-semantics.c, gen-icache.c gen-support.c:
Update.
@ -711,10 +711,10 @@ Tue Sep 9 03:30:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
filter_is_common, filter_is_member, filter_next): New filter
operations.
(dump_filter): Ditto.
* gen.h, gen.c: New file. Takes the insn table and turns it into
a set of decode tables and semantic functions.
* ld-insn.c: Copy generator code from here.
* gen.c: To here.
@ -727,10 +727,10 @@ Fri Aug 8 11:43:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
(table_read): Parse '{' ... '}' as a code block.
(table_print_code): New function, print out a code block to file.
(main): Add suport for standalone testing.
* ld-insn.h, ld-insn.c:
Mon Sep 1 11:41:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
* gen-idecode.c (error_leaf_contains_multiple_insn): Make static.
@ -751,18 +751,18 @@ Wed Aug 6 12:31:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in: Include simulator common/aclocal.m4.
* configure.in: Add --enable-sim-warnings option.
* configure: Re-generate.
* Makefile.in: Use.
* Makefile.in (tmp-filter): New rule.
(igen.o, tmp-table, tmp-ld-decode, tmp-ld-cache, tmp-ld-insn,
ld-decode.o, ld-cache.o, ld-insn.o): Fix dependencies.
* gen.h, gen.c: New files.
* Makefile.in (gen.o, tmp-gen): New rules, update all
dependencies.
Tue Jun 24 11:46:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
* ld-insn.c (load_insn_table): Accept %s as a function type.
@ -787,14 +787,14 @@ Fri May 30 11:27:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
table.h (table_line_entry): New structure. Exactly specifies a
source file/line-nr.
(table_*_entry): Add this to all.
table.c (table_entry_print_cpp_line_nr): Change to use values from
a table_line_entry struct.
(table_entry_read): Save table_line_entry in all structures read.
gen-icache.c, gen-support.c, gen-idecode.c, gen-semantics.c,
gen-model.c: Update all references.
Thu May 29 10:29:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
* igen.c (print_my_defines): Define MY_NAME - a string. For
@ -811,7 +811,7 @@ Thu May 29 10:29:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
print_one_insn.
(print_itrace_format): New function, print fmt argument for
print_one_insn.
* table.c (table_entry_read): Save any assembler lines instead of
discarding them.
@ -953,7 +953,7 @@ Tue Apr 22 21:46:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
* igen.c (print_itrace): For delayed branch case, print just the
current instruction.
Thu Apr 17 07:02:33 1997 Doug Evans <dje@canuck.cygnus.com>
* igen.c (print_itrace): Use TRACE_FOO_P and trace_printf.
@ -1004,7 +1004,7 @@ Tue Mar 18 15:52:24 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* gen-support.c (gen_support_c): Update for renaming of engine to
sim-state.
* igen.c: Ditto.
* gen-idecode.c (gen_idecode_c): Ditto.
@ -1046,7 +1046,7 @@ Fri Mar 7 18:07:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* gen-idecode.c (print_idecode_validate): Wrap each of the checks
- reserved bits, floating point and slot validation - with a
#ifdef so that they are optional.
Fri Mar 7 16:35:13 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* gen-idecode.c (error_leaf_contains_multiple_insn): New function
@ -1066,7 +1066,7 @@ Fri Mar 7 16:35:13 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* gen-idecode.c (print_idecode_validate): New check, generate code
to verify that the instruction slot is correct.
* igen.c (main): Simplify options.
Wed Mar 5 09:55:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
@ -1091,7 +1091,7 @@ Mon Mar 3 17:11:21 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* ld-insn.c (parse_insn_format): Make the width field optional.
If missing assume that the number of characters in the value
determines the number of bits in the field.
Thu Feb 27 11:27:48 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
* ld-insn.c (insn_table_expand_opcode): Replace assertion with
@ -1115,7 +1115,7 @@ Wed Feb 19 12:30:28 1997 Andrew Cagney <cagney@critters.cygnus.com>
* Makefile.in: Create using ../ppc/Makefile.in as a starting
point.
* configure.in: Ditto vis ../ppc/configure.in
Mon Feb 17 10:44:18 1997 Andrew Cagney <cagney@critters.cygnus.com>
* gen-support.c (gen_support_c): Always include engine.h instead
@ -1125,10 +1125,10 @@ Mon Feb 17 10:44:18 1997 Andrew Cagney <cagney@critters.cygnus.com>
* words.h (instruction_word): Remove instruction_word - now
generated by igen.
(address_word): New. Used by igen.
* lf.c (lf_print_function_type_function): New, pass a function to
print out the type instead of a constant string.
* igen.h, igen.c (print_semantic_function_formal,
SEMANTIC_FUNCTION_FORMAL): Relace macro with function.
(print_semantic_function_actual, SEMANTIC_FUNCTION_ACTUAL): Ditto.
@ -1161,10 +1161,10 @@ Mon Feb 17 10:44:18 1997 Andrew Cagney <cagney@critters.cygnus.com>
* gen-engine.h, gen-engine.c: Copies of gen-idecode.*. Will need
to clean these up so that that call upon the updated gen-idecode
code.
* gen-idecode.h, gen-idecode.c: Prune out any code not relevant to
generating a decode table.
* Makefile.in (igen): Add dependencies for new gen-engine.* files.
* igen.h, igen.c (main): New option -M - Control what is returned
@ -1172,7 +1172,7 @@ Mon Feb 17 10:44:18 1997 Andrew Cagney <cagney@critters.cygnus.com>
generate_semantic_returning_modified_nia_only to igen_code enum.
* gen-semantics.c (print_semantic_body): As an alternative, make
NIA == -1 instead of CIA+insn_size by default.
* igen.h, igen.c (main, global_name_prefix, global_uname_prefix):
New option -P <prefix> - Prepend all generated functions with the
specified prefix.

6
sim/iq2000/ChangeLog
View File

@ -216,8 +216,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -347,7 +347,7 @@
* iq2000/{cpu.c, cpu.h, decode.c, decode.h, model.c, sem-switch.c,
sem.c}: Regen'd.
* iq2000.c (do_syscall): Support system traps.
2001-07-05 Ben Elliston <bje@redhat.com>
* Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR).

50
sim/lm32/ChangeLog
View File

@ -217,28 +217,28 @@
2009-05-18 Jon Beniston <jon@beniston.com>
* Makefile.in: New file.
* arch.c: New file.
* arch.h: New file.
* config.in: New file.
* configure: New file.
* configure.ac: New file.
* cpu.c: New file.
* cpu.h: New file.
* cpuall.h: New file.
* decode.c: New file.
* decode.h: New file.
* dv-lm32cpu.c: New file.
* dv-lm32timer.c: New file.
* dv-lm32uart.c: New file.
* lm32.c: New file.
* lm32-sim.h: New file.
* mloop.in: New file.
* model.c: New file.
* sem.c: New file.
* sem-switch.c: New file.
* sim-if.c: New file.
* sim-main.c: New file.
* tconfig.in: New file.
* traps.c: New file.
* user.c: New file.
* Makefile.in: New file.
* arch.c: New file.
* arch.h: New file.
* config.in: New file.
* configure: New file.
* configure.ac: New file.
* cpu.c: New file.
* cpu.h: New file.
* cpuall.h: New file.
* decode.c: New file.
* decode.h: New file.
* dv-lm32cpu.c: New file.
* dv-lm32timer.c: New file.
* dv-lm32uart.c: New file.
* lm32.c: New file.
* lm32-sim.h: New file.
* mloop.in: New file.
* model.c: New file.
* sem.c: New file.
* sem-switch.c: New file.
* sim-if.c: New file.
* sim-main.c: New file.
* tconfig.in: New file.
* traps.c: New file.
* user.c: New file.

12
sim/m32c/ChangeLog
View File

@ -92,7 +92,7 @@
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
2012-05-18 Nick Clifton <nickc@redhat.com>
@ -186,7 +186,7 @@
(stdin_ready): Disable if no termios.
(m32c_sim_restore_console): Disable if no termios.
(mem_get_byte): Disable console input if no termios.
2009-01-06 Joel Sherrill <joel.sherrill@oarcorp.com>
* r8c.opc, m32c.opc: Add parentheses to remove warnings.
@ -212,8 +212,8 @@
(mem_get_byte): Set raw console if m32c_use_raw_console is set.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -252,7 +252,7 @@
(trace_register_changes): Use it.
(m32c_dump_all_registers): New.
* timer_a.h: New.
* load.c: Fix indentation.
* trace.c: Fix indentation.
* trace.h: Fix indentation.
@ -291,7 +291,7 @@
Simulator for Renesas M32C and M16C, by DJ Delorie <dj@redhat.com>,
with further work from Jim Blandy <jimb@redhat.com> and
Kevin Buettner <kevinb@redhat.com>.
* ChangeLog: New.
* Makefile.in: New.
* blinky.S: New.

28
sim/m32r/ChangeLog
View File

@ -281,8 +281,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -361,15 +361,15 @@
2003-12-19 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* configure.in: Changed for dummy simulator of m32r-linux.
* configure.in: Changed for dummy simulator of m32r-linux.
* configure: Regenerate.
* Makefile.in: Added traps-linux.o for dummy simulator of m32r-linux.
* traps-linux.c: Added for dummy simulator of m32r-linux.
* syscall.h: Ditto.
* sim-if.c (sim_create_inferior): Changed to setup SP for dummy
simulator for m32r-linux.
* sim-main.h (M32R_DEFAULT_MEM_SIZE): Changed for dummy simulator of
m32r-linux.
* Makefile.in: Added traps-linux.o for dummy simulator of m32r-linux.
* traps-linux.c: Added for dummy simulator of m32r-linux.
* syscall.h: Ditto.
* sim-if.c (sim_create_inferior): Changed to setup SP for dummy
simulator for m32r-linux.
* sim-main.h (M32R_DEFAULT_MEM_SIZE): Changed for dummy simulator of
m32r-linux.
2003-12-11 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
@ -555,7 +555,7 @@ Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Fri Apr 16 16:47:43 1999 Doug Evans <devans@charmed.cygnus.com>
* devices.c (device_io_read_buffer): New arg `sd'.
@ -1025,7 +1025,7 @@ Wed May 6 14:51:39 1998 Doug Evans <devans@seba.cygnus.com>
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Apr 28 18:05:53 1998 Nick Clifton <nickc@cygnus.com>
@ -1376,7 +1376,7 @@ Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_SCACHE,
SIM_DEFAULT_MODEL): Delete, moved to common.
(SIM_EXTRA_CFLAGS): Update.
Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (sim_link_links): Configure non-strict memory
@ -1497,7 +1497,7 @@ Sat Apr 12 12:57:33 1997 Felix Lee <flee@yin.cygnus.com>
* Makefile.in, seman-cache.c: new file, for wingdb build.
* sim-alloca.h: fixed for wingdb.
Mon Apr 7 13:33:29 1997 Doug Evans <dje@seba.cygnus.com>
* decode.c (*): m32r_cgen_insn_table renamed to ..._entries.

42
sim/m68hc11/ChangeLog
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@ -191,8 +191,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -320,7 +320,7 @@
2002-08-13 Marko Kohtala <marko.kohtala@luukku.com>
* interp.c (sim_prepare_for_program): Look up the image for the
* interp.c (sim_prepare_for_program): Look up the image for the
reset vector and set cpu_use_elf_start to 1 if not found.
(sim_open): Do not set cpu_use_elf_start.
@ -360,7 +360,7 @@
(phys_to_virt): New function.
(cpu_get_indexed_operand_addr, cpu_return): Declare.
* gencode.c: Identify indirect addressing mode for call and fix daa.
(gen_function_entry): New param to tell if src8/dst8 locals are
(gen_function_entry): New param to tell if src8/dst8 locals are
necessary.
(gen_interpreter): Use it to avoid generation of unused variables.
* interp.c (sim_fetch_register): Allow to read page register; page
@ -382,10 +382,10 @@
(cpu_move16): Likewise.
(sim_memory_error): Use sim_io_printf.
(cpu_option_handler): Fix compilation warning.
* interp.c (sim_hw_configure): Fix compilation warning;
* interp.c (sim_hw_configure): Fix compilation warning;
remove m68hc12sio@2 device.
(sim_open): Likewise.
* dv-m68hc11tim.c (m68hc11tim_port_event): Fix clear of TFLG2
* dv-m68hc11tim.c (m68hc11tim_port_event): Fix clear of TFLG2
flags when reset.
(cycle_to_string): Improve convertion of cpu cycle number.
(m68hc11tim_info): Print info about PACNT.
@ -395,7 +395,7 @@
2002-03-07 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* interp.c (sim_hw_configure): Save the HW cpu pointer in the
* interp.c (sim_hw_configure): Save the HW cpu pointer in the
cpu struct.
(sim_hw_configure): Connect the capture input/output events.
* sim-main.h (_sim_cpu): New member hw_cpu.
@ -439,7 +439,7 @@
(cpu_update_frame): Likewise.
(cpu_return): Likewise.
(cpu_reset): Likewise.
(cpu_initialize): Likewise.
(cpu_initialize): Likewise.
* interp.c (sim_do_command): Remove call to cpu_print_frame.
2002-03-07 Stephane Carrez <Stephane.Carrez@worldnet.fr>
@ -516,7 +516,7 @@
(cpu_get_indexed_operand_addr): Likewise.
(cpu_set_reg, cpu_set_dst_reg, cpu_get_src_reg, cpu_get_reg): Likewise.
(cpu_reset): Setup INIT register according to architecture.
* sim-main.h (M6811_Special): Add 68HC12 specific instructions.
(_sim_cpu): Keep track of the cpu being simulated.
(cpu_get_tmp3, cpu_get_tmp2, cpu_set_tmp3, cpu_set_tmp2): New.
@ -527,7 +527,7 @@
(cpu_exg, cpu_dbcc, cpu_move8, cpu_move16): Likewise,
(cpu_fetch_relbranch16): Likewise.
(cpu_interp_m6811): Rename of cpu_interp.
(cpu_interp_m6812): New function.
(cpu_interp_m6812): New function.
* interp.c (free_state): New function.
(dev_list_68hc12): New table.
(sim_board_reset): Reset depending on the cpu (HC11 or HC12).
@ -548,8 +548,8 @@
of masked insn cycles.
(interrupts_initialize): Clear last number of masked insn cycles.
(interrupts_info): Report them.
(interrupts_update_pending): Compute clear and set masks of
interrupts and clear the interrupt bits before setting them
(interrupts_update_pending): Compute clear and set masks of
interrupts and clear the interrupt bits before setting them
(due to SCI interrupt sharing).
* interrupts.h (struct interrupts): New members last_mask_cycles
and xirq_last_mask_cycles.
@ -596,7 +596,7 @@
2000-09-10 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* sim-main.h: Define cycle_to_string.
* dv-m68hc11tim.c (cycle_to_string): New function to translate
* dv-m68hc11tim.c (cycle_to_string): New function to translate
the cpu cycle into some formatted time string.
(m68hc11tim_print_timer): Use it.
* dv-m68hc11sio.c (m68hc11sio_info): Use cycle_to_string.
@ -621,7 +621,7 @@
(m68hc11spi_info): Clarify the status report
of the SPI when a byte is being sent.
(m68hc11spi_clock): Fix the spi send frame.
2000-08-11 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* sim-main.h (m68hc11_map_level): Define level of address mappings.
@ -683,7 +683,7 @@ Thu Jul 27 21:27:25 2000 Andrew Cagney <cagney@b1.cygnus.com>
(m68hc11cpu_port_event): Move initialization of M6811_HPRIO from here.
* m68hc11_sim.c (cpu_reset): To here.
* dv-m68hc11eepr.c: Fix indentation and comments.
2000-06-17 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* dv-nvram.c: New file, rename from dv-pram.c.
@ -692,7 +692,7 @@ Thu Jul 27 21:27:25 2000 Andrew Cagney <cagney@b1.cygnus.com>
* m68hc11_sim.h: Delete file.
* configure.in: Rename pram into nvram.
* interp.c (sim_open): Likewise in creation of device tree.
2000-05-31 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* interp.c (sim_open): Create the SPI device.
@ -710,7 +710,7 @@ Thu Jul 27 21:27:25 2000 Andrew Cagney <cagney@b1.cygnus.com>
* dv-pram.c (attach_pram_regs): Fix the 'save-modified' mode.
* m68hc11_sim.h (_sim_cpu): Allow configuration of cpu mode.
* dv-m68hc11.c (attach_m68hc11_regs): Get the cpu MODA,MODB
* dv-m68hc11.c (attach_m68hc11_regs): Get the cpu MODA,MODB
configuration from the 'mode' device tree property.
(m68hc11cpu_port_event): Reset M6811_HPRIO to the cpu MODA, MODB
configuration.
@ -749,7 +749,7 @@ Thu Jul 27 21:27:25 2000 Andrew Cagney <cagney@b1.cygnus.com>
(_sim_cpu): New member cpu_page0_reg table.
* interp.c (sim_create_inferior): Fill the cpu_page0_reg table with
addresses of soft registers in .page0.
(sim_fetch_register, sim_store_register): Use cpu_page0_reg table
(sim_fetch_register, sim_store_register): Use cpu_page0_reg table
to get/set soft registers.
1999-12-31 Stephane Carrez <stcarrez@worldnet.fr>
@ -786,11 +786,11 @@ Thu Jul 27 21:27:25 2000 Andrew Cagney <cagney@b1.cygnus.com>
before trying to set the carry for the result.
1999-05-24 John S. Kallal <kallal@voicenet.com>
* interp.c (sim_get_info): Don't crash if the command line is 0.
Define prototype for sim_get_info() and init_system().
(sim_info): Correct call to sim_get_info().
1999-05-16 Stephane Carrez <stcarrez@worldnet.fr>
* configure.in: Recognize m6811-*-*.
@ -822,7 +822,7 @@ Thu Jul 27 21:27:25 2000 Andrew Cagney <cagney@b1.cygnus.com>
* m68hc11_sim.h, m68hc11_sim.c: New files, specific operations
for interpreter.
* interrupts.c, interrupts.h: New files, management of interrupts.
* interp.c, sim-main.h,
* interp.c, sim-main.h,
* dv-m68hc11.c, dv-m68hc11eepr.c, dv-m68hc11sio.c,
dv-m68hc11tim.c, dv-pram.c: New files representing devices for
68HC11 (dv-pram.c is generic and could probably migrate to common).

8
sim/mcore/ChangeLog
View File

@ -286,8 +286,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -366,7 +366,7 @@ Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (target_big_endian): New variable.
(mcore_extract_unsigned_integer, mcore_store_unsigned_integer,
wlat, rlat, sim_resume, sim_load): Add supprot for little
endian targets.
endian targets.
2000-01-13 Nick Clifton <nickc@cygnus.com>
@ -395,7 +395,7 @@ Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-05-10 Nick Clifton <nickc@cygnus.com>
* interp.c (sim_resume): Record PC in case it is needed for error

316
sim/mips/ChangeLog
View File

@ -264,8 +264,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -346,7 +346,7 @@
* dsp2.igen: Fix copyright notice.
2007-02-20 Thiemo Seufer <ths@mips.com>
Chao-Ying Fu <fu@mips.com>
Chao-Ying Fu <fu@mips.com>
* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
@ -364,19 +364,19 @@
* dsp2.igen: New file for MIPS DSP REV 2 ASE.
2007-02-19 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
Nigel Stephens <nigel@mips.com>
* mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
jumps with hazard barrier.
2007-02-19 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
Nigel Stephens <nigel@mips.com>
* interp.c (sim_monitor): Flush stdout and stderr file descriptors
after each call to sim_io_write.
2007-02-19 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
Nigel Stephens <nigel@mips.com>
* interp.c (ColdReset): Set CP0 Config0 to reflect the address size
supported by this simulator.
@ -384,8 +384,8 @@
correctly.
2007-02-19 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* cp1.c (value_fpr): Don't inherit existing FPR_STATE for
uninterpreted formats. If fmt is one of the uninterpreted types
@ -412,7 +412,7 @@
and mips16.
2007-02-19 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
Nigel Stephens <nigel@mips.com>
* interp.c (MEM_SIZE): Increase default memory size from 2 to 8
MBytes.
@ -446,7 +446,7 @@
* dsp.igen (do_w_op): Fix compiler warning.
2006-08-29 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
David Ung <davidu@mips.com>
* configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
sim_igen_machine.
@ -455,12 +455,12 @@
(MADDU): Increment ACX if carry.
(do_mult): Clear ACX.
(ROR,RORV): Add smartmips.
(include): Include smartmips.igen.
(include): Include smartmips.igen.
* sim-main.h (ACX): Set to REGISTERS[89].
* smartmips.igen: New file.
2006-08-29 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
David Ung <davidu@mips.com>
* Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
mips3264r2.igen. Add missing dependency rules.
@ -521,29 +521,29 @@
* tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
2005-06-16 David Ung <davidu@mips.com>
Nigel Stephens <nigel@mips.com>
* mips.igen: New mips16e model and include m16e.igen.
(check_u64): Add mips16e tag.
* m16e.igen: New file for MIPS16e instructions.
* configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
models.
* configure: Regenerate.
Nigel Stephens <nigel@mips.com>
* mips.igen: New mips16e model and include m16e.igen.
(check_u64): Add mips16e tag.
* m16e.igen: New file for MIPS16e instructions.
* configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
models.
* configure: Regenerate.
2005-05-26 David Ung <davidu@mips.com>
* mips.igen (mips32r2, mips64r2): New ISA models. Add new model
tags to all instructions which are applicable to the new ISAs.
(do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
vr.igen.
* mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
instructions.
instructions.
* vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
to mips.igen.
* configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
* configure: Regenerate.
2005-03-23 Mark Kettenis <kettenis@gnu.org>
* configure: Regenerate.
@ -573,7 +573,7 @@
* configure: Regenerate for ../common/aclocal.m4 update.
2004-09-24 Monika Chaddha <monika@acmet.com>
Committed by Andrew Cagney.
* m16.igen (CMP, CMPI): Fix assembler.
@ -589,7 +589,7 @@
2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
* mips/interp.c (decode_coproc): Sign-extend the address retrieved
* mips/interp.c (decode_coproc): Sign-extend the address retrieved
from COP0_BADVADDR.
* mips/sim-main.h (COP0_BADVADDR): Remove a cast.
@ -713,7 +713,7 @@
2002-12-16 Chris Demetriou <cgd@broadcom.com>
* tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
* tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
2002-07-30 Chris Demetriou <cgd@broadcom.com>
@ -743,14 +743,14 @@
* configure: Regenerated to track ../common/aclocal.m4 changes.
2002-06-14 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips3d.igen: New file which contains MIPS-3D ASE instructions.
* Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
* mips.igen: Include mips3d.igen.
(mips3d): New model name for MIPS-3D ASE instructions.
(CVT.W.fmt): Don't use this instruction for word (source) format
instructions.
instructions.
* cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
(fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
(fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
@ -763,7 +763,7 @@
* configure: Regenerate.
2002-06-13 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
(value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
@ -803,7 +803,7 @@
* interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
2002-06-07 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
(fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
@ -822,7 +822,7 @@
(NMSUB.fmt): New instruction.
2002-06-07 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* cp1.c: Fix more comment spelling and formatting.
(value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
@ -847,7 +847,7 @@
(value_fpr): Reformat switch statement.
2002-06-06 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* cp1.h: New file.
* sim-main.h: Include cp1.h.
@ -869,8 +869,8 @@
(CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
(DMxC1): Remove, replace with...
(DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
(MxC1): Remove, replace with...
(MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
(MxC1): Remove, replace with...
(MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
2002-06-04 Chris Demetriou <cgd@broadcom.com>
@ -887,7 +887,7 @@
* cp1.c: Add an FSF Copyright notice to this file.
2002-06-04 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* cp1.c (Infinity): Remove.
* sim-main.h (Infinity): Likewise.
@ -902,7 +902,7 @@
(AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
(Recip, SquareRoot): Replace prototypes with #defines which
invoke the functions above.
2002-06-03 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
@ -933,7 +933,7 @@
(FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
2002-06-03 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* configure.in (mipsisa64sb1*-*-*): New target for supporting
Broadcom SiByte SB-1 processor configurations.
@ -955,7 +955,7 @@
* Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
2002-06-02 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips.igen (mdmx): New (pseudo-)model.
* mdmx.c, mdmx.igen: New files.
@ -1166,12 +1166,12 @@
2002-02-28 Chris Demetriou <cgd@broadcom.com>
* mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
(MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
(MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
LWC1, SWC1): Add "f" to filter, since these are FP instructions.
2002-02-28 Chris Demetriou <cgd@broadcom.com>
@ -1268,11 +1268,11 @@
2002-02-10 Chris Demetriou <cgd@broadcom.com>
* mips.igen (ADDI): Print immediate value.
(BREAK): Print code.
(DADDIU, DSRAV, DSRLV): Print correct instruction name.
(SLL): Print "nop" specially, and don't run the code
that does the shift for the "nop" case.
* mips.igen (ADDI): Print immediate value.
(BREAK): Print code.
(DADDIU, DSRAV, DSRLV): Print correct instruction name.
(SLL): Print "nop" specially, and don't run the code
that does the shift for the "nop" case.
2001-11-17 Fred Fish <fnf@redhat.com>
@ -1404,7 +1404,7 @@ Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
* interp.c (sim_store_register): Handle case where client - GDB -
specifies that a 4 byte register is 8 bytes in size.
(sim_fetch_register): Ditto.
1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
Implement "sim firmware" option, inspired by jimb's version of 1998-01.
@ -1419,7 +1419,7 @@ Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
(sim_open): Allocate memory for idt_monitor region. If "--board"
option was given, add no monitor by default. Add BREAK hooks only if
monitors are also there.
Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
* interp.c (sim_monitor): Flush output before reading input.
@ -1443,7 +1443,7 @@ Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
* mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
@ -1469,35 +1469,35 @@ Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
* dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
CPU, start periodic background I/O polls.
(tx3904sio_poll): New function: periodic I/O poller.
(tx3904sio_poll): New function: periodic I/O poller.
1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
* mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
* configure.in, configure (mips64vr5*-*-*): Added missing ;; in
case statement.
1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
* interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
(load_word): Call SIM_CORE_SIGNAL hook on error.
(signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
starting. For exception dispatching, pass PC instead of NULL_CIA.
(decode_coproc): Use COP0_BADVADDR to store faulting address.
* sim-main.h (COP0_BADVADDR): Define.
* sim-main.h (COP0_BADVADDR): Define.
(SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
(SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
(_sim_cpu): Add exc_* fields to store register value snapshots.
(_sim_cpu): Add exc_* fields to store register value snapshots.
* mips.igen (*): Replace memory-related SignalException* calls
with references to SIM_CORE_SIGNAL hook.
* dv-tx3904irc.c (tx3904irc_port_event): printf format warning
fix.
* sim-main.c (*): Minor warning cleanups.
1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
* m16.igen (DADDIU5): Correct type-o.
@ -1514,15 +1514,15 @@ Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
(interp.o): Add dependency on itable.h
(oengine.c, gencode): Delete remaining references.
(BUILT_SRC_FROM_GEN): Clean up.
1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
* vr4run.c: New.
* Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
tmp-run-hack) : New.
* m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
Drop the "64" qualifier to get the HACK generator working.
Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
* mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
@ -1534,16 +1534,16 @@ Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
(DSRL): Use do_dsrl.
(DSRLV): Use do_dsrlv.
(BC1): Move *vr4100 to get the HACK generator working.
(CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
(CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
get the HACK generator working.
(MACC) Rename to get the HACK generator working.
(DMACC,MACCS,DMACCS): Add the 64.
1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
* mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
* sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
* mips/interp.c (DEBUG): Cleanups.
@ -1552,7 +1552,7 @@ Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
* dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
(tx3904sio_tickle): fflush after a stdout character output.
1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (sim_close): Uninstall modules.
@ -1579,10 +1579,10 @@ Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
sim_gen.
(--enable-sim-igen): Delete config option. Always using IGEN.
* configure: Re-generate.
* Makefile.in (gencode): Kill, kill, kill.
* gencode.c: Ditto.
Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
@ -1628,14 +1628,14 @@ Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
32 & 64.
(pending_tick): Move incrementing of index to FOR statement.
(pending_tick): Only update PENDING_OUT after a write has occured.
* configure.in: Add explicit mips-lsi-* target. Use gencode to
build simulator.
* configure: Re-generate.
* interp.c (sim_engine_run OLD): Delete explicit call to
PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
@ -1667,7 +1667,7 @@ Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
OPERATING_ENVIRONMENT, add tx3904sio devices.
* tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
ROM executables. Install dv-sockser into sim-modules list.
* dv-tx3904irc.c: Compiler warning clean-up.
* dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
frequent hw-trace messages.
@ -1700,26 +1700,26 @@ Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904tmr.c: Deschedule timer event after dispatching.
Reduce unnecessarily high timer event frequency.
Reduce unnecessarily high timer event frequency.
* dv-tx3904cpu.c: Ditto for interrupt event.
Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (decode_coproc): For TX39, add stub COP0 register #7,
to allay warnings.
(interrupt_event): Made non-static.
* dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
interchange of configuration values for external vs. internal
clock dividers.
Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
* mips.igen (BREAK): Moved code to here for
* mips.igen (BREAK): Moved code to here for
simulator-reserved break instructions.
* gencode.c (build_instruction): Ditto.
* interp.c (signal_exception): Code moved from here. Non-
reserved instructions now use exception vector, rather
reserved instructions now use exception vector, rather
than halting sim.
* sim-main.h: Moved magic constants to here.
@ -1736,10 +1736,10 @@ Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
serial I/O and timer module at base address 0xFFFF0000.
Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
* mips.igen (SWC1) : Correct the handling of ReverseEndian
* mips.igen (SWC1) : Correct the handling of ReverseEndian
and BigEndianCPU.
Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
@ -1803,7 +1803,7 @@ Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
* sim-main.h (ALU32_END): Sign extend 32 bit results.
* mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
* configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
@ -1842,7 +1842,7 @@ Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
* mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
Replace check_op_hilo with check_mult_hilo and check_div_hilo.
Add special r3900 version of do_mult_hilo.
Add special r3900 version of do_mult_hilo.
(do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
with calls to check_mult_hilo.
(do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
@ -1863,7 +1863,7 @@ Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
@ -1911,7 +1911,7 @@ Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
(HIACCESS, LOACCESS): Delete, replace with
(HIHISTORY, LOHISTORY): New macros.
(CHECKHILO): Delete all, moved to mips.igen
* gencode.c (build_instruction): Do not generate checks for
correct HI/LO register usage.
@ -1924,7 +1924,7 @@ Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
do_divu, domultx, do_mult, do_multu): Use.
* tx.igen ("madd", "maddu"): Use.
Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
* mips.igen (DSRAV): Use function do_dsrav.
@ -1948,10 +1948,10 @@ Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
* m16.igen (delayslot16): Add NIA argument, could be called by a
32 bit MIPS16 instruction.
* interp.c (ifetch16): Move function from here.
* sim-main.c (ifetch16): To here.
* sim-main.c (ifetch16, ifetch32): Update to match current
implementations of LH, LW.
(signal_exception): Don't print out incorrect hex value of illegal
@ -1963,7 +1963,7 @@ Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
instruction.
* m16.igen: Implement MIPS16 instructions.
* mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
@ -1971,7 +1971,7 @@ Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
bodies of corresponding code from 32 bit insn to these. Also used
by MIPS16 versions of functions.
* sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
(IMEM16): Drop NR argument from macro.
@ -1984,12 +1984,12 @@ Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
as INLINE_SIM_MAIN.
(pr_addr, pr_uword64): Declare.
(sim-main.c): Include when H_REVEALS_MODULE_P.
* interp.c (address_translation, load_memory, store_memory,
cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
from here.
* sim-main.c: To here. Fix compilation problems.
* configure.in: Enable inlining.
* configure: Re-config.
@ -2018,7 +2018,7 @@ Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
configure.in: Let the tx39 use igen again.
configure: Update.
Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
@ -2034,7 +2034,7 @@ Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
* configure.in (mipstx39*-*-*): Use gencode simulator rather
than igen one.
* configure : Rebuild.
Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
@ -2064,9 +2064,9 @@ Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
* Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
configurable settings for stand-alone simulator.
* configure.in: Added X11 search, just in case.
* configure: Regenerated.
Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
@ -2108,11 +2108,11 @@ Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (Max, Min): New functions.
* mips.igen (BC1): Add tracing.
Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
* interp.c Added memory map for stack in vr4100
Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
* interp.c (load_memory): Add missing "break"'s.
@ -2138,9 +2138,9 @@ Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
(IMEM16_IMMED): Define.
(IMEM16): Define.
(DELAY_SLOT): Update.
* m16run.c (sim_engine_run): New file.
* m16.igen: All instructions except LB.
(LB): Call do_load_byte.
* mips.igen (do_load_byte): New function.
@ -2175,7 +2175,7 @@ Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
FGR from correct location.
(sim_open): Set size of FGR's according to
WITH_TARGET_FLOATING_POINT_BITSIZE.
* sim-main.h (FGR): Store floating point registers in a separate
array.
@ -2194,7 +2194,7 @@ Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
* sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
it can handle mixed sized quantites and single bits.
Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (oengine.h): Do not include when building with IGEN.
@ -2230,17 +2230,17 @@ Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
* sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
SD or CPU_.
* sim-main.h (signal_exception): Add sim_cpu arg.
(SignalException*): Pass both SD and CPU to signal_exception.
* interp.c (signal_exception): Update.
* sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
Ditto
(sync_operation, prefetch, cache_op, store_memory, load_memory,
address_translation): Ditto
(decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
@ -2249,7 +2249,7 @@ Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_engine_run): Add `nr_cpus' argument.
* mips.igen (model): Map processor names onto BFD name.
* mips.igen (model): Map processor names onto BFD name.
* sim-main.h (CPU_CIA): Delete.
(SET_CIA, GET_CIA): Define
@ -2262,7 +2262,7 @@ Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (default_endian): Configure a big-endian simulator
by default.
* configure: Re-generate.
Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
* configure: Regenerated to track ../common/aclocal.m4 changes.
@ -2333,11 +2333,11 @@ Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
in IV3.2 spec.
(DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
vr5000 which saves LO in a GPR separatly.
* configure.in (enable-sim-igen): For vr5000, select vr5000
specific instructions.
* configure: Re-generate.
Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (SIM_OBJS): Add sim-fpu module.
@ -2364,7 +2364,7 @@ Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
(BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
a signed value.
(MTHI, MFHI): Disable code checking HI-LO.
* sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
global.
(NULLIFY_NEXT_INSTRUCTION): Call dotrace.
@ -2391,7 +2391,7 @@ Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
(sim_read, sim_write): Call address_translation directly.
(sim_engine_run): Rename variable vaddr to cia.
(signal_exception): Pass cia to sim_monitor
* sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
@ -2399,7 +2399,7 @@ Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-main.h (SignalExceptionSimulatorFault): Delete definition.
* interp.c (sim_open): Replace SignalExceptionSimulatorFault with
SIM_ASSERT.
* interp.c (signal_exception): Pass restart address to
sim_engine_restart.
@ -2421,7 +2421,7 @@ Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (enable-sim-igen): New configuration option.
* configure: Re-generate.
* sim-main.h (MAX_INSNS, INSN_NAME): Define.
* interp.c (load_memory, store_memory): Delete parameter RAW.
@ -2434,7 +2434,7 @@ Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_do_command, sim_commands): Delete mips specific
commands. Handled by module sim-options.
* sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
(WITH_MODULO_MEMORY): Define.
@ -2447,7 +2447,7 @@ Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
memory regions. Use sim-memopts module, via sim_do_commandf, to
manage memory regions.
(load_memory, store_memory): Use sim-core for memory model.
* interp.c (address_translation): Delete all memory map code
except line forcing 32 bit addresses.
@ -2483,7 +2483,7 @@ Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
* mips.igen:
* mips.igen:
* Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
(tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
@ -2495,7 +2495,7 @@ Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
interp.c (sim_engine_run): Do not compile function sim_engine_run
when WITH_IGEN == 1.
@ -2534,7 +2534,7 @@ Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
(SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
SIM_@sim_gen@_*, set by autoconf.
Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
@ -2545,7 +2545,7 @@ Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (ifetch32): New function. Fetch 32 bit instruction.
(address_translation): Raise exception InstructionFetch when
translation fails and isINSTRUCTION.
* interp.c (sim_open, sim_write, sim_monitor, store_word,
sim_engine_run): Change type of of vaddr and paddr to
address_word.
@ -2613,29 +2613,29 @@ Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
(UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
* sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
exception.
(sim-alu.h): Include.
(NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
(sim_cia): Typedef to instruction_address.
Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (interp.o): Rename generated file engine.c to
oengine.c.
* interp.c: Update.
Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
* gencode.c (build_instruction): Use FPR_STATE not fpr_state.
Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
* gencode.c (build_instruction): For "FPSQRT", output correct
number of arguments to Recip.
Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (interp.o): Depends on sim-main.h
@ -2651,9 +2651,9 @@ Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (registers, register_widths, fpr_state, ipc, dspc,
pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
(GPR, FGRIDX, ...): Delete macros.
* interp.c: Update names to match defines from sim-main.h
Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_monitor): Add SD argument.
@ -2686,29 +2686,29 @@ Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
* support.h: Delete
* Makefile.in: Update dependencies
* interp.c: Do not include.
Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (address_translation, load_memory, store_memory,
cache_op): Rename to from AddressTranslation et.al., make global,
add SD argument
* sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
CacheOp): Define.
* interp.c (SignalException): Rename to signal_exception, make
global.
* interp.c (Interrupt, ...): Move definitions to sim-main.h.
* sim-main.h (SignalException, SignalExceptionInterrupt,
SignalExceptionInstructionFetch, SignalExceptionAddressStore,
SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
Define.
* interp.c, support.h: Use.
Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
@ -2717,7 +2717,7 @@ Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
Multiply, Divide, Recip, SquareRoot, Convert): Make global.
* sim-main.h (ValueFPR, StoreFPR): Define.
Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_engine_run): Check consistency between configure
@ -2725,7 +2725,7 @@ Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
and HASFPU.
* configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
(mips_fpu): Configure WITH_FLOATING_POINT.
(mips_fpu): Configure WITH_FLOATING_POINT.
(mips_endian): Configure WITH_TARGET_ENDIAN.
* configure: Update.
@ -2773,7 +2773,7 @@ Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
SIM_RESERVED_BITS): Delete, moved to common.
(SIM_EXTRA_CFLAGS): Update.
Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in: Configure non-strict memory alignment.
@ -2798,12 +2798,12 @@ Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
(sim_engine_run): Use CANCELDELAYSLOT rather than clearing
bits explicitly.
* Makefile.in,configure.in: Add mips subtarget option.
* configure: Update.
* configure: Update.
Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
* gencode.c: Add r3900 (tx39).
Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
@ -2874,10 +2874,10 @@ Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
(sim_open): To here. Check return status.
Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
* gencode.c (build_instruction): Two arg MADD should
not assign result to $0.
Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
* sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
@ -2925,7 +2925,7 @@ Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_info): Only print info when verbose.
(sim_info) Use sim_io_printf for output.
Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (CoProcPresent): Add UNUSED attribute - not used by all
@ -2962,7 +2962,7 @@ Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
* Makefile.in: Ditto.
* configure: Re-generate.
* Makefile.in (SIM_OBJS): Add sim-watch.o module.
Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
@ -3010,7 +3010,7 @@ Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
reason from here.
(SignalException): To here. Signal using sim_engine_halt.
(sim_stop_reason): Delete, moved to common.
Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
* interp.c (sim_open): Add callback argument.
@ -3029,7 +3029,7 @@ Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
(simulate): Convert into.
(sim_engine_run): This function.
(sim_resume): Delete.
* interp.c (simulation): New variable - the simulator object.
(sim_kind): Delete global - merged into simulation.
(sim_load): Cleanup. Move PC assignment from here.
@ -3037,7 +3037,7 @@ Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-main.h: New file.
* interp.c (sim-main.h): Include.
Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
@ -3048,8 +3048,8 @@ Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
* gencode.c (build_instruction): DIV instructions: check
for division by zero and integer overflow before using
* gencode.c (build_instruction): DIV instructions: check
for division by zero and integer overflow before using
host's division operation.
Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
@ -3256,7 +3256,7 @@ Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
(swap_word): Rewrite correctly.
(ColdReset): Delete references to CONFIG. Delete endianness related
code; moved to set_endianness.
Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
* gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
@ -3404,14 +3404,14 @@ Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
(docdir): Removed.
* configure.in (AC_PREREQ): autoconf 2.5 or higher.
(AC_PROG_INSTALL): Added.
* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
(docdir): Removed.
* configure.in (AC_PREREQ): autoconf 2.5 or higher.
(AC_PROG_INSTALL): Added.
(AC_PROG_CC): Moved to before configure.host call.
* configure: Rebuilt.
* configure: Rebuilt.
Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
* configure.in: Define @SIMCONF@ depending on mips target.
@ -3421,7 +3421,7 @@ Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
* gencode.c: Change LOADDRMASK to 64bit memory model only.
* interp.c: Remove some debugging, provide more detailed error
messages, update memory accesses to use LOADDRMASK.
Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
* configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,

62
sim/mn10300/ChangeLog
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@ -273,8 +273,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -459,7 +459,7 @@
2001-05-06 Jim Blandy <jimb@redhat.com>
* mn10300.igen: Doc fixes.
2001-04-26 Alexandre Oliva <aoliva@redhat.com>
* Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o):
@ -519,7 +519,7 @@ Tue Jul 13 13:26:20 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-04-16 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (program_interrupt): Detect undesired recursion using
@ -555,20 +555,20 @@ Tue Feb 16 23:57:17 1999 Jeffrey A Law (law@cygnus.com)
(mn10300_exception_*): New functions to snapshot pre/post exception
state.
* sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal.
(SIM_ENGINE_HALT_HOOK): Do nothing.
(SIM_ENGINE_HALT_HOOK): Do nothing.
(SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*().
(_sim_cpu): Add exc_* fields to store register value snapshots.
(_sim_cpu): Add exc_* fields to store register value snapshots.
* dv-mn103ser.c (*): Support dv-sockser backend for UART I/O.
Various endianness and warning fixes.
* mn10300.igen (illegal): Call program_interrupt on error.
(break): Call program_interrupt on breakpoint
Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com>
merged in:
* dv-mn103int.c (mn103int_ioctl): New function for NMI
generation. (mn103int_finish): Install it as ioctl handler.
* dv-mn103tim.c: Support timer 6 specially. Endianness fixes.
Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com)
* am33.igen: Allow autoincrement stores using the same register
@ -576,7 +576,7 @@ Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com)
Mon Aug 31 10:19:55 1998 Jeffrey A Law (law@cygnus.com)
* am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu".
* am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu".
Fri Aug 28 14:40:49 1998 Joyce Janczyn <janczyn@cygnus.com>
@ -594,7 +594,7 @@ Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com>
Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com)
* am33.igen: Handle case where first DSP operation modifies a
* am33.igen: Handle case where first DSP operation modifies a
register used in the second DSP operation correctly.
Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com)
@ -613,7 +613,7 @@ Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>
(syscall_read_mem, syscall_write_mem): New functions for syscall
callbacks.
* mn10300_sim.h: Add prototypes for syscall_read_mem and
syscall_write_mem.
syscall_write_mem.
* mn10300.igen: Change C++ style comments to C style comments.
Check for divide by zero in div and divu ops.
@ -690,7 +690,7 @@ Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>
serial line and schedule next polling event.
(read_status_reg): schedule events to check for incoming data on
serial line and issue interrupt if necessary.
Fri Jun 19 16:47:27 1998 Joyce Janczyn <janczyn@cygnus.com>
* interp.c (sim_open): hook up serial 1 and 2 ports properly (typo).
@ -712,14 +712,14 @@ Wed Jun 17 18:00:18 1998 Jeffrey A Law (law@cygnus.com)
Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or
reset) are not enabled on reset.
Sun June 14 17:04:00 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103iop.c (write_*_reg): Check for attempt to write r/o
register bits.
* dv-mn103ser.c: Fill in methods for reading and writing to serial
device registers.
* interp.c (sim_open): Make the serial device a polling device.
Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103iop.c: New file for handling am32 io ports.
* configure.in: Add mn103iop to hw_device list.
@ -767,10 +767,10 @@ Wed May 6 13:29:06 1998 Andrew Cagney <cagney@b1.cygnus.com>
Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
* dv-mn103int.c (mn103int_port_event):
(mn103int_port_event):
(mn103int_io_read_buffer):
(mn103int_io_write_buffer):
* dv-mn103int.c (mn103int_port_event):
(mn103int_port_event):
(mn103int_io_read_buffer):
(mn103int_io_write_buffer):
* dv-mn103cpu.c (deliver_mn103cpu_interrupt): Drop CPU/CIA args.
(mn103cpu_port_event): Ditto.
@ -779,7 +779,7 @@ Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
@ -806,7 +806,7 @@ Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
INLINE_SIM_MAIN.
* op_utils.c: Ditto.
* sim-main.c: New file. Include op_utils.c.
* mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to
differentiate between MOV/CMP immediate/register instructions.
@ -847,12 +847,12 @@ Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
* Makefile.in (tmp-igen): Prefix all usage of move-if-change
script with $(SHELL) to make NT native builds happy.
* configure: Regenerate because of change to ../common/aclocal.m4.
Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in: Make --enable-sim-common the default.
* configure: Re-generate.
* sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
address into Sate.regs[REG_PC] instead of common struct.
@ -880,7 +880,7 @@ Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
(mn103int_io_read_buffer): Convert absolute address to register
block offsets.
(read_icr, write_icr): Convert block offset into group offset.
Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_open): Create second 1mb memory region at
@ -896,7 +896,7 @@ Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
* mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM):
Define.
(SP): Define.
Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
@ -912,7 +912,7 @@ Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com>
* mn10300.igen (add): Discard unused variables.
* configure, config.in: Re-generate with autoconf 2.12.1.
Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com>
Add support for --enable-sim-common option.
@ -925,7 +925,7 @@ Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com>
(SIM_EXTRA_CFLAGS): New variable.
(clean-extra): Clean up igen files.
(../igen/igen,clean-igen,tmp-igen): New rules.
* configure.in: Add support for common framework via
* configure.in: Add support for common framework via
--enable-sim-common.
* configure: Regenerate.
* interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h.
@ -956,9 +956,9 @@ Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com)
Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com)
* simops.c (signed multiply instructions): Cast input operands to
signed32 before casting them to signed64 so that the sign bit
is propagated properly.
* simops.c (signed multiply instructions): Cast input operands to
signed32 before casting them to signed64 so that the sign bit
is propagated properly.
Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com>
@ -1059,7 +1059,7 @@ Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument.
(sim_load): Move setting of PC from here.
(sim_create_inferior): To here.
(sim_create_inferior): To here.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
@ -1433,4 +1433,4 @@ Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
* Makefile.in, config.in, configure, configure.in: New files.
* gencode.c, interp.c, mn10300_sim.h, simops.c: New files.

2
sim/moxie/ChangeLog
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@ -210,7 +210,7 @@
2012-09-07 Anthony Green <green@moxielogic.com>
* interp.c (sim_resume): Branches are now relative to the
address of the instruction following the branch.
address of the instruction following the branch.
2012-06-17 Mike Frysinger <vapier@gentoo.org>

908
sim/ppc/ChangeLog
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File diff suppressed because it is too large

2
sim/rl78/ChangeLog
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@ -94,7 +94,7 @@
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
2012-03-24 Mike Frysinger <vapier@gentoo.org>

10
sim/rx/ChangeLog
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@ -84,7 +84,7 @@
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
2012-03-24 Mike Frysinger <vapier@gentoo.org>
@ -258,10 +258,10 @@
2010-01-30 Masaki Muranaka <monaka@monami-software.com>
* configure.in: Check if the host has getopt.h.
* configure: Regenerate.
* config.in: Regenerate.
* main.c: Include config.h.
* configure.in: Check if the host has getopt.h.
* configure: Regenerate.
* config.in: Regenerate.
* main.c: Include config.h.
Use HAVE_STDLIB_H, HAVE_UNISTD_H, HAVE_GETOPT_H.
Include getopt.h in case HAVE_GETOPT_H is defined.

76
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@ -247,8 +247,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -395,7 +395,7 @@
* gencode.c: (op tab): Some refs and defs fixes.
"fsrra" -> "fsrra <FREG_N>".
"sleep": replace array ref with array addr.
"trapa": ditto.
"trapa": ditto.
Comment and whitespace clean-ups.
2004-01-07 Michael Snyder <msnyder@redhat.com>
@ -407,7 +407,7 @@
(op tab): Add new instructions for sh4a, DBR, SBR.
(expand_opcode): Add handling for new movxy combinations.
(gensym_caselist): Ditto.
(expand_ppi_movxy): Remove movx/movy expansions,
(expand_ppi_movxy): Remove movx/movy expansions,
now handled in expand_opcode.
(gensym): Add some helpful macros.
(expand_ppi_code): Flatten loop for simplicity, tweak for 12-bit
@ -418,7 +418,7 @@
(union saved_state_type): Add dbr, sgr, ldst.
(get_loop_bounds_ext): New function.
(init_dsp): Add bfd_mach_sh4al_dsp.
(sim_resume): Handle extended loop bounds.
(sim_resume): Handle extended loop bounds.
2003-12-18 Michael Snyder <msnyder@redhat.com>
@ -443,10 +443,10 @@
* syscall.h (SYS_truncate, SYS_ftruncate): Define.
* interp.c (trap): Add support for SYS_ftruncate and SYS_truncate.
2003-08-11 Shrinivas Atre <shrinivasa@KPITCummins.com>
* sim/sh/gencode.c ( tab[] ): Addition of MAC.L handler and
2003-08-11 Shrinivas Atre <shrinivasa@KPITCummins.com>
* sim/sh/gencode.c ( tab[] ): Addition of MAC.L handler and
correction for MAC.W handler
* sim/sh/interp.c ( macl ): New Function. Implementation of
* sim/sh/interp.c ( macl ): New Function. Implementation of
MAC.L handler.
2003-08-07 Michael Snyder <msnyder@redhat.com>
@ -457,7 +457,7 @@
* gencode.c (pshl): Change < to <= (shift by 16 is allowed).
Cast argument of >> to unsigned to prevent sign extension.
(psha): Change < to <= (shift by 32 is allowed).
(psha): Change < to <= (shift by 32 is allowed).
2003-07-24 Michael Snyder <msnyder@redhat.com>
@ -721,7 +721,7 @@ Wed Aug 25 07:55:23 1999 Brendan Kehoe <brendan@cygnus.com>
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-04-02 Keith Seitz <keiths@cygnus.com>
* interp.c (POLL_QUIT_INTERVAL): Define. Used to tweak the
@ -742,7 +742,7 @@ Mon Jun 29 19:35:24 1998 Jason Molenda (crash@bugshack.cygnus.com)
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
@ -873,20 +873,20 @@ Mon Jun 23 15:49:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (get_dr): Avoid SIGFPE by moving integers instead of
FP's around.
(set_dr): Ditto.
Mon Jun 23 15:02:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (XD, SET_XD): Delete.
(XF, SET_XF, XD_TO_XF): Define, move around registers in either
FP bank.
* gencode.c (fmov): Update.
Sun Jun 22 19:33:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (set_fpscr1): From J"orn Rennecke
<amylaar@cygnus.co.uk>, Fix typo. Ditto for comment.
Tue Aug 12 00:19:11 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
* interp.c (special_address): New function.
@ -918,7 +918,7 @@ Mon Jun 16 14:01:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
endian problems.
* gencode.c (tab): Update.
Sun Jun 15 15:22:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
* gencode.c (main): Perform basic checks on tab entries.
@ -937,7 +937,7 @@ Sat Jun 14 13:45:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
(Delay_Slot): Rename from SL.
* gencode.c (tab): Update/simplify.
* gencode.c (gensim): Better formatting of output code.
(gensim): Replace 10 with constant MAX_NR_STUFF- define as 15.
(tab): Sort alphabetically. Break `stuff' into multiple lines.
@ -959,13 +959,13 @@ Thu Jun 5 12:56:08 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
Wed May 28 23:42:35 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
* gencode.c (swap.b): Fix treatment of high word.
* gencode.c (swap.b): Fix treatment of high word.
Wed May 28 23:42:35 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
* sh/gencode.c,
* interp.c: experimental SH4 support.
DFmode moves are probaly broken for target little endian.
* sh/gencode.c,
* interp.c: experimental SH4 support.
DFmode moves are probaly broken for target little endian.
Tue May 20 10:23:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
@ -1086,7 +1086,7 @@ Wed Nov 20 02:04:32 1996 Doug Evans <dje@canuck.cygnus.com>
* interp.c: #include "config.h". #include <unistd.h> if present.
(trap): Fetch errno value with callback->get_errno.
Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
* interp.c: Don't include windows polling code if inside simluator.
@ -1099,12 +1099,12 @@ Fri Sep 20 14:57:50 1996 Stan Shebs <shebs@andros.cygnus.com>
Wed Jun 26 12:29:22 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
(docdir): Removed.
* configure.in (AC_PREREQ): autoconf 2.5 or higher.
(AC_PROG_INSTALL): Added.
* configure: Rebuilt.
* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
(docdir): Removed.
* configure.in (AC_PREREQ): autoconf 2.5 or higher.
(AC_PROG_INSTALL): Added.
* configure: Rebuilt.
Thu May 16 15:44:29 1996 Ian Lance Taylor <ian@cygnus.com>
@ -1158,7 +1158,7 @@ Sat Oct 21 13:01:18 1995 Jim Wilson <wilson@chestnut.cygnus.com>
* sh/interp.c (sim_stop_reason): Catch SIGQUIT and indicate
program exited.
(sim_get_quit_code): Delete.
* gencode.c (gensim): Indicate SIGILL instead of calling abort for
default case.
@ -1175,10 +1175,10 @@ Fri Oct 6 12:08:18 1995 Jim Wilson <wilson@chestnut.cygnus.com>
* interp.c (trap, case SYS_utime): Cast second arg of utime to
void * to avoid compiler error.
* interp.c (callback): Remove last change. It is initialized by
a sim_set_callbacks call.
Thu Oct 5 14:13:29 1995 steve chamberlain <sac@slash.cygnus.com>
* interp.c (callback): Initialize to default callback.
@ -1281,7 +1281,7 @@ Tue Jul 18 23:33:10 1995 Fred Fish <fnf@fishbowl>
Wed Jul 5 14:32:54 1995 J.T. Conklin <jtc@rtl.cygnus.com>
* Makefile.in (clean): Remove run, libsim.a.
(distclean, mostlyclean, realclean): Remove Makefile and
(distclean, mostlyclean, realclean): Remove Makefile and
autoconf files.
* sh.mt: Removed.
@ -1323,7 +1323,7 @@ Wed May 24 14:07:11 1995 Steve Chamberlain <sac@slash.cygnus.com>
Mon Apr 24 15:09:49 1995 Jason Molenda (crash@cygnus.com)
* configure.in: use ../../bfd/hosts/std-host.h, not
* configure.in: use ../../bfd/hosts/std-host.h, not
../bfd/hosts/std-host.h (which doesn't exist).
Mon Mar 27 10:32:34 1995 J.T. Conklin <jtc@rtl.cygnus.com>
@ -1392,7 +1392,7 @@ Thu Sep 8 17:35:07 1994 Steve Chamberlain (sac@jonny.cygnus.com)
* interp.c (RSBAT): Sign extend the arg.
(ACE_FAST): New macro.
(sim_resume): Remove obsolete test of sim_timeout.
Fri Aug 5 14:12:31 1994 Steve Chamberlain (sac@jonny.cygnus.com)
* interp.c (IOMEM): New function, simulates very basic I/O area of
@ -1424,15 +1424,15 @@ Wed May 18 14:18:53 1994 Doug Evans (dje@canuck.cygnus.com)
Wed Apr 27 12:03:48 1994 Steve Chamberlain (sac@cygnus.com)
* gencode.c (table): Get direction of some opcodes right.
(trapa, rte): Implement fully.
(trapa, rte): Implement fully.
* interp.c (trap): Make stat call more portable.
Fri Feb 11 21:59:38 1994 Steve Chamberlain (sac@sphagnum.cygnus.com)
* gencode.c (main, gendefines): New -d option prints table of defines.
* interp.c (trap): Add a load of system calls.
* interp.c (trap): Add a load of system calls.
(sim_memory_size): Now default to 8Mbyte.
(PARANOID): Keep vector of registers with undefined contents.
(PARANOID): Keep vector of registers with undefined contents.
Mon Nov 15 14:37:18 1993 Steve Chamberlain (sac@jonny.cygnus.com)
@ -1489,7 +1489,7 @@ Tue Jul 6 10:30:46 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
Thu Jun 24 13:29:57 1993 david d `zoo' zuhn (zoo at rtl.cygnus.com)
* Makefile.in: don't run indent everytime; also add a space in the
includes
includes
Thu Jun 17 18:30:42 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
@ -1504,7 +1504,7 @@ Wed May 5 13:17:22 1993 Steve Chamberlain (sac@cygnus.com)
Mon May 3 15:25:33 1993 Steve Chamberlain (sac@thepub.cygnus.com)
* run.c (main): Support for resizing simulated RAM.
* run.c (main): Support for resizing simulated RAM.
* Makefile.in: Support for broken makes.
* interp.c, gencode.c: Lint.

10
sim/sh64/ChangeLog
View File

@ -255,8 +255,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -336,11 +336,11 @@ Fri Feb 21 19:49:45 2003 J"orn Rennecke <joern.rennecke@superh.com>
2002-06-24 Richard Sandiford <rsandifo@redhat.com>
* sh64.c: Update path of "callback.h".
* sh64.c: Update path of "callback.h".
2002-06-20 Elena Zannoni <ezannoni@redhat.com>
* sh64.c: Include correct file for register numbers.
* sh64.c: Include correct file for register numbers.
Fri May 17 14:27:41 2002 J"orn Rennecke <joern.rennecke@superh.com>
@ -607,7 +607,7 @@ Fri May 17 14:27:41 2002 J"orn Rennecke <joern.rennecke@superh.com>
(stamp-all, stamp-mloop, stamp-decode, stamp-defs): New targets.
(stamp-desc, stamp-cpu): Likewise.
(stamp-defs-compact, stamp-defs-media): Likewise.
(stamp-decode-compact, stamp-decode-media): Likewise.
(stamp-decode-compact, stamp-decode-media): Likewise.
* defs-compact.h, defs-media.h: Regenerate.

18
sim/testsuite/ChangeLog
View File

@ -91,7 +91,7 @@
* configure.in: Pass literal subdirectories to AC_CONFIG_SUBDIRS.
* configure: Re-generate.
* fr30-elf, d30v-elf: Delete directory.
2004-11-16 Hans-Peter Nilsson <hp@axis.com>
@ -125,11 +125,11 @@
test passes.
2003-08-20 Michael Snyder <msnyder@redhat.com>
On behalf of Dave Brolley
On behalf of Dave Brolley
* sim/frv: New testsuite.
* frv-elf: New testsuite.
2003-07-09 Michael Snyder <msnyder@redhat.com>
* sim/sh: New directory. Tests for Renesas sh family.
@ -196,7 +196,7 @@ Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
* common/bits-gen.c (main): Add BYTE_ORDER so that it matches
recent sim/common/sim-basics.h changes.
* common/Makefile.in: Update.
Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com>
* lib/sim-defs.exp (sim_run): download target program to remote
@ -227,8 +227,8 @@ Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
* Makefile.in: Take RUNTEST out of FLAG_TO_PASS
so that make check can be invoked recursively.
* Makefile.in: Take RUNTEST out of FLAG_TO_PASS
so that make check can be invoked recursively.
Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com>
@ -240,8 +240,8 @@ Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com>
Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com>
* Makefile.in: Made "check" the target of two
dependencies (test1, test2) so that test2 get a chance to
run even when test1 failed if "make -k check" is used.
dependencies (test1, test2) so that test2 get a chance to
run even when test1 failed if "make -k check" is used.
Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com>

6
sim/testsuite/d10v-elf/ChangeLog
View File

@ -64,7 +64,7 @@ Mon Feb 16 09:20:57 1998 Andrew Cagney <cagney@b1.cygnus.com>
* t-dbt.s (test_dbt): New file.
* Makefile.in (TESTS): Add t-rdt and t-dbt.
Fri Feb 13 16:21:13 1998 Andrew Cagney <cagney@b1.cygnus.com>
@ -103,7 +103,7 @@ Thu Dec 4 16:56:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
Wed Dec 3 16:35:24 1997 Andrew Cagney <cagney@b1.cygnus.com>
* t-rac.s: New files.
* t-macros.i: Add macros for checking psw and 2w quantities.
* Makefile.in (TESTS): Update.
@ -112,7 +112,7 @@ Tue Dec 2 11:01:36 1997 Andrew Cagney <cagney@b1.cygnus.com>
* t-sub2w.s, t-mulxu.s, t-mac.s, t-mvtac.s, t-msbu.s, t-sub.s: New
files.
* Makefile.in: Update.
Mon Nov 17 20:14:48 1997 Andrew Cagney <cagney@b1.cygnus.com>

6
sim/testsuite/sim/cr16/ChangeLog
View File

@ -8,11 +8,11 @@
* cbitb.cgs, cbitw.cgs, sbitb.cgs, sbitw.cgs, tbit.cgs, tbitb.cgs,
tbitw.cgs, hw-trap.ms, uread16.ms, uread32.ms: New testcases.
addb.cgs, addd.cgs, addi.cgs, andb.cgs, andd.cgs, andw.cgs, ashub.cgs,
ashub_i.cgs, ashud.cgs, ashud_i.cgs, ashuw.cgs, ashuw_i.cgs, cmpi.cgs,
ashub_i.cgs, ashud.cgs, ashud_i.cgs, ashuw.cgs, ashuw_i.cgs, cmpi.cgs,
cmpw.cgs, jlt.cgs, jump.cgs, loadd.cgs, loadw.cgs, lshb.cgs, lshb_i.cgs,
lshd.cgs, lshd_i.cgs, lshw.cgs, lshw_i.cgs, movb.cgs, movd.cgs,
movw.cgs, movxb.cgs, movxw.cgs, movzb.cgs, movzw.cgs, mulb.cgs,
muluw.cgs, mulw.cgs, orb.cgs, ord.cgs, orw.cgs, pop1.cgs, pop2.cgs,
movw.cgs, movxb.cgs, movxw.cgs, movzb.cgs, movzw.cgs, mulb.cgs,
muluw.cgs, mulw.cgs, orb.cgs, ord.cgs, orw.cgs, pop1.cgs, pop2.cgs,
pop3.cgs, popret1.cgs, popret2.cgs, popret3.cgs, push1.cgs, push2.cgs,
push3.cgs: Update testcase comment.
bnc8.cgs, bnc24.cgs and ret.cgs: Removed.

2
sim/testsuite/sim/cris/ChangeLog
View File

@ -123,7 +123,7 @@
write return-value; check only that pipemax bytes were
successfully written. For error-case, emit strerror as well.
(main): Add a second read.
2006-04-08 Hans-Peter Nilsson <hp@axis.com>
* hw/rv-n-cris/irq6.ms: New test.

12
sim/testsuite/sim/h8300/ChangeLog
View File

@ -31,9 +31,9 @@
* subs.s: New file.
* subx.s: New file.
* allinsn.exp: Add new subs and subx tests.
* testutils.inc: Simplify (and fix) set_carry_flag.
* testutils.inc: Simplify (and fix) set_carry_flag.
(clear_carry_flag, set_zero_flag, clear_zero_flag...): New macros.
* addx.s: Use simplified set_carry_flag.
* addx.s: Use simplified set_carry_flag.
2003-05-27 Michael Snyder <msnyder@redhat.com>
@ -80,10 +80,10 @@
2003-05-14 Michael Snyder <msnyder@redhat.com>
* addb.s, addw.s, addl.s, addw.s, addx.s, andb.s, andw.s, andl.s,
bfld.s, brabc.s, bra.s, bset.s, cmpb.s, cmpw.s, cmpl.s, daa.s,
das.s, dec.s, extw.s, extl.s, inc.s, jmp.s, ldc.s, ldm.s, mac.s,
mova.s, movb.s, movw.s, movl.s, movmd.s, movsd.s, neg.s, nop.s,
not.s, orb.s, orw.s, orl.s, rotl.s, rotr.s, rotxl.s, rotxr.s,
bfld.s, brabc.s, bra.s, bset.s, cmpb.s, cmpw.s, cmpl.s, daa.s,
das.s, dec.s, extw.s, extl.s, inc.s, jmp.s, ldc.s, ldm.s, mac.s,
mova.s, movb.s, movw.s, movl.s, movmd.s, movsd.s, neg.s, nop.s,
not.s, orb.s, orw.s, orl.s, rotl.s, rotr.s, rotxl.s, rotxr.s,
shal.s, shar.s, shll.s, shlr.s, stc.s, subb.s, subw.s, subl.s,
xorb.s, xorw.s, xorl.s: New files.
* allinsn.exp: New file.

2
sim/testsuite/sim/mips/ChangeLog
View File

@ -22,7 +22,7 @@
* utils-mdmx.inc: Change license to GPL version 3.
2007-02-20 Thiemo Seufer <ths@mips.com>
Chao-Ying Fu <fu@mips.com>
Chao-Ying Fu <fu@mips.com>
* basic.exp: Run the dsp2 test.
* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
* mips32-dsp2.s: New test.

4
sim/testsuite/sim/sh/ChangeLog
View File

@ -65,8 +65,8 @@
* allinsn.exp, testutils.inc, add.s, fabs.s, fadd.s, fcmpeq.s,
fcmpgt.s, fcnvds.s, fcnvsd.s, fdiv.s, fldi0.s, fldi1.s, flds.s,
float.s, fmac.s, fmov.s, fmul.s, fneg.s, frchg.s, fschg.s,
fsqrt.s, fsub.s, ftrc.s, shll16.s, shll2.s, shll8.s, shll.s,
float.s, fmac.s, fmov.s, fmul.s, fneg.s, frchg.s, fschg.s,
fsqrt.s, fsub.s, ftrc.s, shll16.s, shll2.s, shll8.s, shll.s,
shlr16.s, shlr2.s, shlr8.s, shlr.s, swap.s: New files.
Local Variables:

122
sim/v850/ChangeLog
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@ -171,14 +171,14 @@
* interp.c (sim_open): Add support for bfd_arch_v850_rh850
architecture type. Add support for bfd_mach_v850e2 and
bfd_mach_v850e2v3 machine numbers.
* v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG.
(cmpf.d): Correct order of operands.
(cmpf.s): Likewise.
(trncf.dul): New pattern.
(trncf.duw): New pattern.
(trncf.sul): New pattern.
(trncf.suw): New pattern.
* v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW.
* v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG.
(cmpf.d): Correct order of operands.
(cmpf.s): Likewise.
(trncf.dul): New pattern.
(trncf.duw): New pattern.
(trncf.sul): New pattern.
(trncf.suw): New pattern.
* v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW.
2012-09-13 Nick Clifton <nickc@redhat.com>
@ -312,8 +312,8 @@
* config.in: Ditto.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
@ -324,7 +324,7 @@
(OP_2C007E0): Likewise.
(OP_28007E0): Likewise.
* v850.igen (divh): Likewise.
* simops.c (OP_C0): Correct saturation logic.
(OP_220): Likewise.
(OP_A0): Likewise.
@ -346,7 +346,7 @@
(OP_28007E0): Likewise, for divh. Also, sign-extend the correct
operand.
* v850.igen (divh): Likewise, for 2-op divh.
* v850.igen (bsh): Fix carry logic.
2007-02-20 Daniel Jacobowitz <dan@codesourcery.com>
@ -413,7 +413,7 @@
Only generate a trap if the target is not the v850e1.
Otherwise treat it as a special kind of branch.
(break): Mark as v850/v850e specific.
2003-05-16 Ian Lance Taylor <ian@airs.com>
* Makefile.in (SHELL): Make sure this is defined.
@ -476,7 +476,7 @@
(simops.h): New file.
($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h.
* gencode.c: Delete file.
2001-04-15 J.T. Conklin <jtc@redback.com>
* Makefile.in (simops.o): Add simops.h to dependency list.
@ -515,7 +515,7 @@ Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Tue Dec 1 17:25:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (NL_TARGET): Define as -DNL_TARGET_v850.
@ -541,7 +541,7 @@ Wed May 6 19:43:27 1998 Doug Evans <devans@canuck.cygnus.com>
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* configure: Regenerated to track ../common/aclocal.m4 changes.
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
@ -594,7 +594,7 @@ Wed Feb 18 10:47:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
* sim-main.h (trace_module): Change variable decl to integer type.
(TRACE_BRANCH*, TRACE_LD, TRACE_ST): Update.
Tue Feb 17 12:51:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_store_register, sim_fetch_register): Pass in
@ -648,7 +648,7 @@ Sat Nov 22 21:32:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
* v850.igen (BREAK), simops.c (OP_12007E0): Rename SIGTRAP to
SIM_SIGTRAP.
(illegal): Rename SIGILL to SIM_SIGILL.
* sim-main.h, simops.c, interp.c: Do not include signal.h.
* sim-main.h: Include sim-signal.h instead of signal.h.
@ -676,7 +676,7 @@ Fri Sep 26 11:56:02 1997 Felix Lee <flee@cygnus.com>
* sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and
SIM_ENGINE_RESTART_HOOK.
Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
@ -701,7 +701,7 @@ Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
(SIM_EXTRA_CFLAGS): Update.
Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
@ -738,7 +738,7 @@ Fri Sep 19 10:37:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c: Move "mov", "reti", to v850.igen, fix tracing.
* interp.c (hash): Delete.
* v850.igen (nop): Really do nothing.
@ -753,11 +753,11 @@ Wed Sep 17 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
(trace_module): Global, save component/module name across insn.
* simops.c: Move "bsh" to v850.igen, fix.
* v850.igen (callt): Load correct number of bytes. Fix tracing.
(stsr, ldsr): Correct src, dest fields. Fix tracing.
(ctret): Force alignment. Fix tracing.
Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (trace_output): Add result argument.
@ -772,10 +772,10 @@ Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
(trace_values, trace_name, trace_pc, trace_num_values): Make
global.
(GR, SR): Define.
v850.insn (movea, stsr): Use.
(sxb, sxh, zxb, zxh): Ditto.
Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c: Move "movea" from here.
@ -784,12 +784,12 @@ Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
* v850.igen (simm16): Define, sign extend imm16.
(uimm16): Define, no sign extension.
(addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use.
* simops.c: Move "sxh", "switch", "sxb", "callt", "dispose",
"mov32" from here.
* v850.igen: To here.
(switch): Fix off by two error in NIA calc.
Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (trace_pc, trace_name, trace_values, trace_num_values):
@ -798,7 +798,7 @@ Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
(trace_output): Write trace values to a buffer. Use
trace_one_insn to print trace info and buffer.
(SIZE_OPERANDS, SIZE_LOCATION): Delete.
Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits
@ -808,7 +808,7 @@ Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
instructions from here.
* v850.igen (ldsr, stsr): To here. Mask out reserved bits when
setting PSW.
* interp.c (sim_open): Set psw_mask if machine known.
Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
@ -831,12 +831,12 @@ Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US].
* simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn",
"divun", "pushml" code from here to v850.igen.
(divun): Make global.
(type3_regs): Make global
* v850.igen: Move simops.c code to here.
* interp.c (sim_create_inferior): For v850eq set US bit by
@ -865,7 +865,7 @@ Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
* v850.igen (prepare, ...): Add to v850eq architecture.
* interp.c (sim_open): Default to v850eq.
* interp.c (sim_open): Default to v850e.
* sim-main.h (signal.h): Include.
@ -880,7 +880,7 @@ Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_open): Use sim_do_commandf instead of asprintf.
* sim-main.h (INSN_NAME):
* sim-main.h (INSN_NAME):
* Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS.
(SIM_EXTRA_DEPS): Add itable.h
@ -922,7 +922,7 @@ Mon Sep 8 18:33:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
(SEXT32): Delete, used?
(SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL.
(WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian.
* simops.c: Use EXTEND15 from sim-bits instead of SEXT16.
* sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete,
@ -950,7 +950,7 @@ Fri Sep 5 17:04:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-main.h (WITH_WATCHPOINTS): Define.
(WITH_MODULO_MEMORY): Define
* Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop,
sim-reason.
@ -1011,7 +1011,7 @@ Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr.
* interp.c (map): Do not add to a void pointer.
* Makefile.in (INCLUDE): Add sim-main.h
* configure.in: Check for time.h
@ -1039,7 +1039,7 @@ Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
(AC_CHECK_FUNCS): Add utime.
(AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h
configure: Regenerate.
* Makefile.in (SIM_RUN_OBJS): Use nrun.o.
(SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o,
@ -1055,7 +1055,7 @@ Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
* gencode.c (write_template): Generate #include sim-main.h.
(write_opcodes): Ditto.
* interp.c (prog_bfd, prog_bfd_was_opened_p): Delete.
(v850_callback): Ditto.
(sim_kind, myname): Ditto.
@ -1076,7 +1076,7 @@ Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
(sim_set_callbacks): Delete.
(sim_set_interrupt): Pass in SD, use.
(start_time): Delete.
* v850_sim.h: Remove everything except `struct simops' from here.
* sim-main.h: Move most to here.
* gencode.c: Move #includes to here.
@ -1093,7 +1093,7 @@ Mon Sep 1 12:07:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in: Check for time, chmod.
* configure: Regenerate.
* simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD.
* simops.c (../../libgloss/v850/sys/syscall.h): Include instead of
sys/syscall.h.
(OP_10007E0): Check the existance each SYS_* macro independantly.
@ -1125,16 +1125,16 @@ Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com>
* simops.c (bsh): Only set CY flag if either of the bottom
bytes is zero.
* simops.c (prepare, dispose): Lower numbered
registers go to higher numbered address.
* simops.c (unsigned divide instructions): S bit set if result has
top bit set.
* simops.c (pushml, pushmh, popml, popmh): Lower numbered
registers go to higher numbered address.
Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com>
* simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct
@ -1151,22 +1151,22 @@ Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com>
* interp.c (sim_resume): Opcode functions return amount to be
added to PC and all opcodes take a standard format in the OP[]
array.
(do_format_*): Functions removed.
* v850_sim.h (SP, EP): New register mnemonics.
* gencode.c (write_header): Functions prototypes return an
integer.
* simops.c: Opcode functions return amount to be added to PC.
* v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics.
* simops.c: Add support for v850e instructions.
* simops.c: Add support for v850eq instructions.
Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_open): Add callback argument.
@ -1303,12 +1303,12 @@ Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com>
* interp.c: Add support for variable-size allocation of memory,
via simulator command "sim memory-map".
(map): Issue SIGSEGV for references to invalid memory regions.
Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com>
* simops.c: Include <sys/time.h> for struct timeval and
struct timezone.
* simops.c: Include <sys/time.h> for struct timeval and
struct timezone.
Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com)
* simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
@ -1358,11 +1358,11 @@ Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com)
* (sim_size): MEM_SIZE is now bytes, not shift factor.
Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com>
* simops.c (trace_input): Swapped order of operands for output
output of OP_IMM_REG. Changed the fetching of the operands for
OP_LOAD32, and OP_STORE32 to work like op-function.
* simops.c (trace_input): Swapped order of operands for output
output of OP_IMM_REG. Changed the fetching of the operands for
OP_LOAD32, and OP_STORE32 to work like op-function.
Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com)
* interp.c: Move includes of remote-sim.h and callback.h to
@ -1392,7 +1392,7 @@ Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com)
Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com)
* simops.c (trace_input): Fix thinko.
* simops.c (trace_input): Fix thinko.
Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com>
@ -1568,6 +1568,6 @@ Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com)
Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com)
* ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
* ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
gencode.c, interp.c, simops.c: Created.

12
zlib/ChangeLog
View File

@ -1,5 +1,5 @@
ChangeLog file for zlib
ChangeLog file for zlib
Changes in 1.2.7 (2 May 2012)
- Replace use of memmove() with a simple copy for portability
@ -1112,15 +1112,15 @@ Changes in 1.0.6 (19 Jan 1998)
- added Makefile.nt (thanks to Stephen Williams)
- added the unsupported "contrib" directory:
contrib/asm386/ by Gilles Vollant <info@winimage.com>
386 asm code replacing longest_match().
386 asm code replacing longest_match().
contrib/iostream/ by Kevin Ruland <kevin@rodin.wustl.edu>
A C++ I/O streams interface to the zlib gz* functions
A C++ I/O streams interface to the zlib gz* functions
contrib/iostream2/ by Tyge Løvset <Tyge.Lovset@cmr.no>
Another C++ I/O streams interface
Another C++ I/O streams interface
contrib/untgz/ by "Pedro A. Aranda Guti\irrez" <paag@tid.es>
A very simple tar.gz file extractor using zlib
A very simple tar.gz file extractor using zlib
contrib/visual-basic.txt by Carlos Rios <c_rios@sonda.cl>
How to use compress(), uncompress() and the gz* functions from VB.
How to use compress(), uncompress() and the gz* functions from VB.
- pass params -f (filtered data), -h (huffman only), -1 to -9 (compression
level) in minigzip (thanks to Tom Lane)

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