x86: make JumpAbsolute an insn attribute

... instead of an operand one: There's only ever one operand here
anyway.

gas/ChangeLog

@@ -1,3 +1,13 @@
+2019-11-14  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (struct _i386_insn): Add jumpabsolute field.
+	(operand_type_match): Drop jumpabsolute use.
+	(type_names): Remove OPERAND_TYPE_JUMPABSOLUTE entry.
+	(process_suffix, i386_displacement): Adjust jumpabsolute uses.
+	(match_template, i386_att_operand): Adjust jumpabsolute
+	handling.	
+	* config/tc-i386-intel.c (i386_intel_operand): Likewise.
+
 2019-11-14  Jan Beulich  <jbeulich@suse.com>
 
 	* config/tc-i386.c (operand_size_match): Adjust anysize use.

gas/config/tc-i386-intel.c

@@ -743,17 +743,19 @@ i386_intel_operand (char *operand_string, int got_a_float)
       || current_templates->start->opcode_modifier.jumpdword
       || current_templates->start->opcode_modifier.jumpintersegment)
     {
+      bfd_boolean jumpabsolute = FALSE;
+
       if (i.op[this_operand].regs
 	  || intel_state.base
 	  || intel_state.index
 	  || intel_state.is_mem > 1)
-	i.types[this_operand].bitfield.jumpabsolute = 1;
+	jumpabsolute = TRUE;
       else
 	switch (intel_state.op_modifier)
 	  {
 	  case O_near_ptr:
 	    if (intel_state.seg)
-	      i.types[this_operand].bitfield.jumpabsolute = 1;
+	      jumpabsolute = TRUE;
 	    else
 	      intel_state.is_mem = 1;
 	    break;
@@ -765,14 +767,14 @@ i386_intel_operand (char *operand_string, int got_a_float)
 		if (intel_state.op_modifier == O_absent)
 		  {
 		    if (intel_state.is_indirect == 1)
-		      i.types[this_operand].bitfield.jumpabsolute = 1;
+		      jumpabsolute = TRUE;
 		    break;
 		  }
 		as_bad (_("cannot infer the segment part of the operand"));
 		return 0;
 	      }
 	    else if (S_GET_SEGMENT (intel_state.seg) == reg_section)
-	      i.types[this_operand].bitfield.jumpabsolute = 1;
+	      jumpabsolute = TRUE;
 	    else
 	      {
 		i386_operand_type types;
@@ -806,11 +808,14 @@ i386_intel_operand (char *operand_string, int got_a_float)
 	      }
 	    break;
 	  default:
-	    i.types[this_operand].bitfield.jumpabsolute = 1;
+	    jumpabsolute = TRUE;
 	    break;
 	  }
-      if (i.types[this_operand].bitfield.jumpabsolute)
-	intel_state.is_mem |= 1;
+      if (jumpabsolute)
+	{
+	  i.jumpabsolute = TRUE;
+	  intel_state.is_mem |= 1;
+	}
     }
   else if (intel_state.seg)
     intel_state.is_mem |= 1;

gas/config/tc-i386.c

@@ -353,6 +353,9 @@ struct _i386_insn
     unsigned int prefixes;
     unsigned char prefix[MAX_PREFIXES];
 
+    /* The operand to a branch insn indicates an absolute branch.  */
+    bfd_boolean jumpabsolute;
+
     /* Has MMX register operands.  */
     bfd_boolean has_regmmx;
 
@@ -2147,7 +2150,6 @@ operand_type_match (i386_operand_type overlap,
 {
   i386_operand_type temp = overlap;
 
-  temp.bitfield.jumpabsolute = 0;
   temp.bitfield.unspecified = 0;
   temp.bitfield.byte = 0;
   temp.bitfield.word = 0;
@@ -2161,8 +2163,7 @@ operand_type_match (i386_operand_type overlap,
   if (operand_type_all_zero (&temp))
     goto mismatch;
 
-  if (given.bitfield.baseindex == overlap.bitfield.baseindex
-      && given.bitfield.jumpabsolute == overlap.bitfield.jumpabsolute)
+  if (given.bitfield.baseindex == overlap.bitfield.baseindex)
     return 1;
 
 mismatch:
@@ -3155,7 +3156,6 @@ const type_names[] =
   { OPERAND_TYPE_FLOATREG, "FReg" },
   { OPERAND_TYPE_FLOATACC, "FAcc" },
   { OPERAND_TYPE_SREG, "SReg" },
-  { OPERAND_TYPE_JUMPABSOLUTE, "Jump Absolute" },
   { OPERAND_TYPE_REGMMX, "rMMX" },
   { OPERAND_TYPE_REGXMM, "rXMM" },
   { OPERAND_TYPE_REGYMM, "rYMM" },
@@ -5743,6 +5743,18 @@ match_template (char mnem_suffix)
       if (!size_match)
 	continue;
 
+      /* This is intentionally not
+
+	 if (i.jumpabsolute != t->opcode_modifier.jumpabsolute)
+
+	 as the case of a missing * on the operand is accepted (perhaps with
+	 a warning, issued further down).  */
+      if (i.jumpabsolute && !t->opcode_modifier.jumpabsolute)
+	{
+	  i.error = operand_type_mismatch;
+	  continue;
+	}
+
       for (j = 0; j < MAX_OPERANDS; j++)
 	operand_types[j] = t->operand_types[j];
 
@@ -6120,11 +6132,8 @@ check_reverse:
   if (!quiet_warnings)
     {
       if (!intel_syntax
-	  && (i.types[0].bitfield.jumpabsolute
-	      != operand_types[0].bitfield.jumpabsolute))
-	{
-	  as_warn (_("indirect %s without `*'"), t->name);
-	}
+	  && (i.jumpabsolute != t->opcode_modifier.jumpabsolute))
+	as_warn (_("indirect %s without `*'"), t->name);
 
       if (t->opcode_modifier.isprefix
 	  && t->opcode_modifier.ignoresize)
@@ -6322,7 +6331,7 @@ process_suffix (void)
     }
   else if (intel_syntax
 	   && !i.suffix
-	   && (i.tm.operand_types[0].bitfield.jumpabsolute
+	   && (i.tm.opcode_modifier.jumpabsolute
 	       || i.tm.opcode_modifier.jumpbyte
 	       || i.tm.opcode_modifier.jumpintersegment
 	       || (i.tm.base_opcode == 0x0f01 /* [ls][gi]dt */
@@ -9464,7 +9473,7 @@ i386_displacement (char *disp_start, char *disp_end)
     }
 
   operand_type_set (&bigdisp, 0);
-  if ((i.types[this_operand].bitfield.jumpabsolute)
+  if (i.jumpabsolute
       || (!current_templates->start->opcode_modifier.jump
 	  && !current_templates->start->opcode_modifier.jumpdword))
     {
@@ -9995,7 +10004,7 @@ i386_att_operand (char *operand_string)
       ++op_string;
       if (is_space_char (*op_string))
 	++op_string;
-      i.types[this_operand].bitfield.jumpabsolute = 1;
+      i.jumpabsolute = TRUE;
     }
 
   /* Check if operand is a register.  */
@@ -10051,7 +10060,7 @@ i386_att_operand (char *operand_string)
 	      ++op_string;
 	      if (is_space_char (*op_string))
 		++op_string;
-	      i.types[this_operand].bitfield.jumpabsolute = 1;
+	      i.jumpabsolute = TRUE;
 	    }
 	  goto do_memory_reference;
 	}
@@ -10085,7 +10094,7 @@ i386_att_operand (char *operand_string)
   else if (*op_string == IMMEDIATE_PREFIX)
     {
       ++op_string;
-      if (i.types[this_operand].bitfield.jumpabsolute)
+      if (i.jumpabsolute)
 	{
 	  as_bad (_("immediate operand illegal with absolute jump"));
 	  return 0;

opcodes/ChangeLog

@@ -1,3 +1,15 @@
+2019-11-14  Jan Beulich  <jbeulich@suse.com>
+
+	* i386-gen.c (operand_type_init): Remove
+	OPERAND_TYPE_JUMPABSOLUTE entry.
+	(opcode_modifiers): Add JumpAbsolute entry.
+	(operand_types): Remove JumpAbsolute entry.
+	* i386-opc.h (JumpAbsolute): Move between enums.
+	(struct i386_opcode_modifier): Add jumpabsolute field.
+	(union i386_operand_type): Remove jumpabsolute field.
+	* i386-opc.tbl (call, lcall, jmp, ljmp): Move JumpAbsolute.
+	* i386-init.h, i386-tbl.h: Re-generate.
+
 2019-11-14  Jan Beulich  <jbeulich@suse.com>
 
 	* i386-gen.c (opcode_modifiers): Add AnySize entry.

opcodes/i386-gen.c

@@ -437,8 +437,6 @@ static initializer operand_type_init[] =
     "Instance=Accum|Tbyte" },
   { "OPERAND_TYPE_SREG",
     "Class=SReg" },
-  { "OPERAND_TYPE_JUMPABSOLUTE",
-    "JumpAbsolute" },
   { "OPERAND_TYPE_REGMMX",
     "Class=RegMMX" },
   { "OPERAND_TYPE_REGXMM",
@@ -620,6 +618,7 @@ static bitfield opcode_modifiers[] =
   BITFIELD (JumpDword),
   BITFIELD (JumpByte),
   BITFIELD (JumpInterSegment),
+  BITFIELD (JumpAbsolute),
   BITFIELD (FloatMF),
   BITFIELD (FloatR),
   BITFIELD (Size),
@@ -723,7 +722,6 @@ static bitfield operand_types[] =
   BITFIELD (Disp32),
   BITFIELD (Disp32S),
   BITFIELD (Disp64),
-  BITFIELD (JumpAbsolute),
   BITFIELD (Byte),
   BITFIELD (Word),
   BITFIELD (Dword),

opcodes/i386-init.h

@@ -1365,192 +1365,188 @@
 
 #define OPERAND_TYPE_NONE \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_REG8 \
-  { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+  { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_REG16 \
-  { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+  { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_REG32 \
-  { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+  { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_REG64 \
-  { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0, 0, 0, 0 } }
+  { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM1 \
   { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM8 \
   { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM8S \
   { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM16 \
   { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM32 \
   { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM32S \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM64 \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_BASEINDEX \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_DISP8 \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_DISP16 \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_DISP32 \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_DISP32S \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_DISP64 \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_INOUTPORTREG \
-  { { 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+  { { 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_SHIFTCOUNT \
-  { { 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+  { { 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_CONTROL \
   { { 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_TEST \
   { { 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_DEBUG \
   { { 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_FLOATREG \
   { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 1, 0, 0, 0, 0, 0 } }
+      1, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_FLOATACC \
   { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 1, 0, 0, 0, 0, 0 } }
+      1, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_SREG \
   { { 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
-
-#define OPERAND_TYPE_JUMPABSOLUTE \
-  { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_REGMMX \
   { { 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_REGXMM \
   { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 1, 0, 0, 0, 0 } }
+      0, 1, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_REGYMM \
   { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 1, 0, 0, 0 } }
+      0, 0, 1, 0, 0, 0 } }
 
 #define OPERAND_TYPE_REGZMM \
   { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 1, 0, 0 } }
+      0, 0, 0, 1, 0, 0 } }
 
 #define OPERAND_TYPE_REGMASK \
   { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_REGBND \
   { { 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_ACC8 \
-  { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+  { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_ACC16 \
-  { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+  { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_ACC32 \
-  { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+  { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_ACC64 \
-  { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0, 0, 0, 0 } }
+  { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_DISP16_32 \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_ANYDISP \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM16_32 \
   { { 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM16_32S \
   { { 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM16_32_32S \
   { { 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM32_64 \
   { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM32_32S_DISP32 \
   { { 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM64_DISP64 \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM32_32S_64_DISP32 \
   { { 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_IMM32_32S_64_DISP32_64 \
   { { 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }
 
 #define OPERAND_TYPE_ANYIMM \
   { { 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0 } }

opcodes/i386-opc.h

@@ -411,6 +411,8 @@ enum
   JumpByte,
   /* special case for intersegment leaps/calls */
   JumpInterSegment,
+  /* absolute address for jump */
+  JumpAbsolute,
   /* FP insn memory format bit, sized by 0x4 */
   FloatMF,
   /* src/dest swap for floats. */
@@ -654,6 +656,7 @@ typedef struct i386_opcode_modifier
   unsigned int jumpdword:1;
   unsigned int jumpbyte:1;
   unsigned int jumpintersegment:1;
+  unsigned int jumpabsolute:1;
   unsigned int floatmf:1;
   unsigned int floatr:1;
   unsigned int size:2;
@@ -777,8 +780,6 @@ enum
   Disp64,
   /* Register which can be used for base or index in memory operand.  */
   BaseIndex,
-  /* Absolute address for jump.  */
-  JumpAbsolute,
   /* BYTE size. */
   Byte,
   /* WORD size. 2 byte */
@@ -832,7 +833,6 @@ typedef union i386_operand_type
       unsigned int disp32s:1;
       unsigned int disp64:1;
       unsigned int baseindex:1;
-      unsigned int jumpabsolute:1;
       unsigned int byte:1;
       unsigned int word:1;
       unsigned int dword:1;

opcodes/i386-opc.tbl

@@ -371,28 +371,28 @@ shrd, 2, 0xfad, None, 2, Cpu386, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, {
 call, 1, 0xe8, None, 1, CpuNo64, JumpDword|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp16|Disp32 }
 call, 1, 0xe8, None, 1, Cpu64, AMD64|JumpDword|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk, { Disp16|Disp32S }
 call, 1, 0xe8, None, 1, Cpu64, Intel64|JumpDword|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk, { Disp32S }
-call, 1, 0xff, 0x2, 1, CpuNo64, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg32|Word|Dword|Unspecified|BaseIndex|JumpAbsolute }
-call, 1, 0xff, 0x2, 1, Cpu64, AMD64|Modrm|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg64|Word|Qword|Unspecified|BaseIndex|JumpAbsolute }
-call, 1, 0xff, 0x2, 1, Cpu64, Intel64|Modrm|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg64|Qword|Unspecified|BaseIndex|JumpAbsolute }
+call, 1, 0xff, 0x2, 1, CpuNo64, Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg32|Unspecified|BaseIndex }
+call, 1, 0xff, 0x2, 1, Cpu64, AMD64|Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg64|Unspecified|BaseIndex }
+call, 1, 0xff, 0x2, 1, Cpu64, Intel64|Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg64|Unspecified|BaseIndex }
 // Intel Syntax
 call, 2, 0x9a, None, 1, CpuNo64, JumpInterSegment|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16, Imm16|Imm32 }
 // Intel Syntax
-call, 1, 0xff, 0x3, 1, 0, Modrm|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Dword|Fword|Unspecified|BaseIndex|JumpAbsolute }
+call, 1, 0xff, 0x3, 1, 0, Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Dword|Fword|Unspecified|BaseIndex }
 lcall, 2, 0x9a, None, 1, CpuNo64, JumpInterSegment|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16, Imm16|Imm32 }
-lcall, 1, 0xff, 0x3, 1, 0, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|JumpAbsolute }
+lcall, 1, 0xff, 0x3, 1, 0, Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
 
 jmp, 1, 0xeb, None, 1, CpuNo64, Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp8|Disp16|Disp32 }
 jmp, 1, 0xeb, None, 1, Cpu64, AMD64|Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp8|Disp16|Disp32S }
 jmp, 1, 0xeb, None, 1, Cpu64, Intel64|Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp8|Disp32S }
-jmp, 1, 0xff, 0x4, 1, CpuNo64, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg32|Word|Dword|Unspecified|BaseIndex|JumpAbsolute }
-jmp, 1, 0xff, 0x4, 1, Cpu64, AMD64|Modrm|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg64|Word|Qword|Unspecified|BaseIndex|JumpAbsolute }
-jmp, 1, 0xff, 0x4, 1, Cpu64, Intel64|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg64|Qword|Unspecified|BaseIndex|JumpAbsolute }
+jmp, 1, 0xff, 0x4, 1, CpuNo64, Modrm|JumpAbsolute|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg32|Unspecified|BaseIndex }
+jmp, 1, 0xff, 0x4, 1, Cpu64, AMD64|Modrm|JumpAbsolute|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg64|Unspecified|BaseIndex }
+jmp, 1, 0xff, 0x4, 1, Cpu64, Intel64|Modrm|JumpAbsolute|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg64|Unspecified|BaseIndex }
 // Intel Syntax.
 jmp, 2, 0xea, None, 1, CpuNo64, JumpInterSegment|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16, Imm16|Imm32 }
 // Intel Syntax.
-jmp, 1, 0xff, 0x5, 1, 0, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Dword|Fword|Unspecified|BaseIndex|JumpAbsolute }
+jmp, 1, 0xff, 0x5, 1, 0, Modrm|JumpAbsolute|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Dword|Fword|Unspecified|BaseIndex }
 ljmp, 2, 0xea, None, 1, CpuNo64, JumpInterSegment|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16, Imm16|Imm32 }
-ljmp, 1, 0xff, 0x5, 1, 0, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|JumpAbsolute }
+ljmp, 1, 0xff, 0x5, 1, 0, Modrm|JumpAbsolute|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
 
 ret, 0, 0xc3, None, 1, CpuNo64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|RepPrefixOk|BNDPrefixOk, { 0 }
 ret, 1, 0xc2, None, 1, CpuNo64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|RepPrefixOk|BNDPrefixOk, { Imm16 }