2001-03-18 H.J. Lu <hjl@gnu.org>

* gas/i386/intel.s: Move PIC code to ...
	* gas/i386/intelpic.s: New. Here.
	* gas/i386/intel.d: Updated.
	* gas/i386/intelpic.d: New.

	* gas/i386/i386.exp: Check PIC code in Intel syntax for ELF
	targets only.

gas/testsuite/ChangeLog

@@ -1,3 +1,13 @@
+2001-03-18  H.J. Lu  <hjl@gnu.org>
+
+	* gas/i386/intel.s: Move PIC code to ...
+	* gas/i386/intelpic.s: New. Here.
+	* gas/i386/intel.d: Updated.
+	* gas/i386/intelpic.d: New.
+
+	* gas/i386/i386.exp: Check PIC code in Intel syntax for ELF
+	targets only.
+
 2001-03-18  Stephane Carrez  <Stephane.Carrez@worldnet.fr>
 
 	* gas/mri/mri.exp: Fix test of m6811/m6812 targets.

gas/testsuite/gas/i386/i386.exp

@@ -53,6 +53,13 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "ssemmx2"
     run_dump_test "sse2"
 
+    # PIC is only supported on ELF targets.
+    if { ([istarget "*-*-elf*"] || [istarget "*-*-linux*"] )
+	 && ![istarget *-*-linux*aout*]
+	 && ![istarget *-*-linux*oldld*] } then {
+	run_dump_test "intelpic"
+    }
+
     # These tests require support for 8 and 16 bit relocs,
     # so we only run them for ELF and COFF targets.
     if {[istarget "*-*-elf*"] || [istarget "*-*-linux*"] || [istarget "*-*-coff*"]} then {

gas/testsuite/gas/i386/intel.d

@@ -582,44 +582,42 @@ Disassembly of section .text:
 0+9d2 <bar>:
  9d2:	e8 f9 ff ff ff [ 	]*call   9d0 <gs_foo>
  9d7:	e8 f5 ff ff ff [ 	]*call   9d1 <short_foo>
- 9dc:	8d 83 00 00 00 00 [ 	]*lea    0x0\(%ebx\),%eax
- 9e2:	dd 1c d0 [ 	]*fstpl  \(%eax,%edx,8\)
- 9e5:	b9 00 00 00 00 [ 	]*mov    \$0x0,%ecx
- 9ea:	88 04 16 [ 	]*mov    %al,\(%esi,%edx,1\)
- 9ed:	88 04 32 [ 	]*mov    %al,\(%edx,%esi,1\)
- 9f0:	88 04 56 [ 	]*mov    %al,\(%esi,%edx,2\)
- 9f3:	88 04 56 [ 	]*mov    %al,\(%esi,%edx,2\)
- 9f6:	eb 0c [ 	]*jmp    a04 <rot5>
- 9f8:	6c [ 	]*insb   \(%dx\),%es:\(%edi\)
- 9f9:	66 0f c1 90 90 90 90 90 [ 	]*xadd   %dx,0x90909090\(%eax\)
- a01:	83 e0 f8 [ 	]*and    \$0xfffffff8,%eax
+ 9dc:	dd 1c d0 [ 	]*fstpl  \(%eax,%edx,8\)
+ 9df:	b9 00 00 00 00 [ 	]*mov    \$0x0,%ecx
+ 9e4:	88 04 16 [ 	]*mov    %al,\(%esi,%edx,1\)
+ 9e7:	88 04 32 [ 	]*mov    %al,\(%edx,%esi,1\)
+ 9ea:	88 04 56 [ 	]*mov    %al,\(%esi,%edx,2\)
+ 9ed:	88 04 56 [ 	]*mov    %al,\(%esi,%edx,2\)
+ 9f0:	eb 0c [ 	]*jmp    9fe <rot5>
+ 9f2:	6c [ 	]*insb   \(%dx\),%es:\(%edi\)
+ 9f3:	66 0f c1 90 90 90 90 90 [ 	]*xadd   %dx,0x90909090\(%eax\)
+ 9fb:	83 e0 f8 [ 	]*and    \$0xfffffff8,%eax
 
-0+a04 <rot5>:
- a04:	8b 44 ce 04 [ 	]*mov    0x4\(%esi,%ecx,8\),%eax
- a08:	6c [ 	]*insb   \(%dx\),%es:\(%edi\)
- a09:	0c 90 [ 	]*or     \$0x90,%al
- a0b:	0d 90 90 90 90 [ 	]*or     \$0x90909090,%eax
- a10:	0e [ 	]*push   %cs
- a11:	8b 04 5d 00 00 00 00 [ 	]*mov    0x0\(,%ebx,2\),%eax
- a18:	10 14 85 90 90 90 90 [ 	]*adc    %dl,0x90909090\(,%eax,4\)
- a1f:	2f [ 	]*das    
- a20:	ea 90 90 90 90 90 90 [ 	]*ljmp   \$0x9090,\$0x90909090
- a27:	66 a5 [ 	]*movsw  %ds:\(%esi\),%es:\(%edi\)
- a29:	70 90 [ 	]*jo     9bb <foo\+0x9bb>
- a2b:	75 fe [ 	]*jne    a2b <rot5\+0x27>
- a2d:	0f 6f 35 28 00 00 00 [ 	]*movq   0x28,%mm6
- a34:	03 3c c3 [ 	]*add    \(%ebx,%eax,8\),%edi
- a37:	0f 6e 44 c3 04 [ 	]*movd   0x4\(%ebx,%eax,8\),%mm0
- a3c:	03 bc cb 00 80 00 00 [ 	]*add    0x8000\(%ebx,%ecx,8\),%edi
- a43:	0f 6e 8c cb 04 80 00 00 [ 	]*movd   0x8004\(%ebx,%ecx,8\),%mm1
- a4b:	0f 6e 94 c3 04 00 01 00 [ 	]*movd   0x10004\(%ebx,%eax,8\),%mm2
- a53:	03 bc c3 00 00 01 00 [ 	]*add    0x10000\(%ebx,%eax,8\),%edi
- a5a:	66 8b 04 43 [ 	]*mov    \(%ebx,%eax,2\),%ax
- a5e:	66 8b 8c 4b 00 20 00 00 [ 	]*mov    0x2000\(%ebx,%ecx,2\),%cx
- a66:	66 8b 84 43 00 40 00 00 [ 	]*mov    0x4000\(%ebx,%eax,2\),%ax
- a6e:	ff e0 [ 	]*jmp    \*%eax
- a70:	ff 20 [ 	]*jmp    \*\(%eax\)
- a72:	ff 25 d2 09 00 00 [ 	]*jmp    \*0x9d2
- a78:	e9 55 ff ff ff [ 	]*jmp    9d2 <bar>
- a7d:	8b 83 (00 00|d0 09) 00 00 [ 	]*mov    (0x0|0x9d0)\(%ebx\),%eax
+0+9fe <rot5>:
+ 9fe:	8b 44 ce 04 [ 	]*mov    0x4\(%esi,%ecx,8\),%eax
+ a02:	6c [ 	]*insb   \(%dx\),%es:\(%edi\)
+ a03:	0c 90 [ 	]*or     \$0x90,%al
+ a05:	0d 90 90 90 90 [ 	]*or     \$0x90909090,%eax
+ a0a:	0e [ 	]*push   %cs
+ a0b:	8b 04 5d 00 00 00 00 [ 	]*mov    0x0\(,%ebx,2\),%eax
+ a12:	10 14 85 90 90 90 90 [ 	]*adc    %dl,0x90909090\(,%eax,4\)
+ a19:	2f [ 	]*das    
+ a1a:	ea 90 90 90 90 90 90 [ 	]*ljmp   \$0x9090,\$0x90909090
+ a21:	66 a5 [ 	]*movsw  %ds:\(%esi\),%es:\(%edi\)
+ a23:	70 90 [ 	]*jo     9b5 <foo\+0x9b5>
+ a25:	75 fe [ 	]*jne    a25 <rot5\+0x27>
+ a27:	0f 6f 35 28 00 00 00 [ 	]*movq   0x28,%mm6
+ a2e:	03 3c c3 [ 	]*add    \(%ebx,%eax,8\),%edi
+ a31:	0f 6e 44 c3 04 [ 	]*movd   0x4\(%ebx,%eax,8\),%mm0
+ a36:	03 bc cb 00 80 00 00 [ 	]*add    0x8000\(%ebx,%ecx,8\),%edi
+ a3d:	0f 6e 8c cb 04 80 00 00 [ 	]*movd   0x8004\(%ebx,%ecx,8\),%mm1
+ a45:	0f 6e 94 c3 04 00 01 00 [ 	]*movd   0x10004\(%ebx,%eax,8\),%mm2
+ a4d:	03 bc c3 00 00 01 00 [ 	]*add    0x10000\(%ebx,%eax,8\),%edi
+ a54:	66 8b 04 43 [ 	]*mov    \(%ebx,%eax,2\),%ax
+ a58:	66 8b 8c 4b 00 20 00 00 [ 	]*mov    0x2000\(%ebx,%ecx,2\),%cx
+ a60:	66 8b 84 43 00 40 00 00 [ 	]*mov    0x4000\(%ebx,%eax,2\),%ax
+ a68:	ff e0 [ 	]*jmp    \*%eax
+ a6a:	ff 20 [ 	]*jmp    \*\(%eax\)
+ a6c:	ff 25 d2 09 00 00 [ 	]*jmp    \*0x9d2
+ a72:	e9 5b ff ff ff [ 	]*jmp    9d2 <bar>
 [ 	]*...

gas/testsuite/gas/i386/intel.s

@@ -576,7 +576,6 @@ short_foo:
 bar:
  call	gs_foo
  call	short_foo
- lea	eax, .LC0@GOTOFF[ebx]
  fstp   QWORD PTR [eax+edx*8]
  mov	ecx, OFFSET FLAT:ss
  mov	BYTE PTR [esi+edx], al
@@ -616,5 +615,4 @@ rot5:
  jmp	[eax]
  jmp	[bar]
  jmp	bar
- mov	eax, DWORD PTR gs_foo@GOT[ebx]
  .p2align 4,0

gas/testsuite/gas/i386/intelpic.d

@@ -0,0 +1,16 @@
+#as: -J
+#objdump: -dw
+#name: i386 intelpic
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <gs_foo>:
+   0:	c3 [ 	]*ret    
+
+0+001 <bar>:
+   1:	8d 83 00 00 00 00 [ 	]*lea    0x0\(%ebx\),%eax
+   7:	8b 83 00 00 00 00 [ 	]*mov    0x0\(%ebx\),%eax
+   d:	90 [ 	]*nop    
+[ 	]*...

gas/testsuite/gas/i386/intelpic.s

@@ -0,0 +1,11 @@
+.text
+.intel_syntax noprefix
+
+gs_foo:
+ ret
+
+bar:
+ lea	eax, .LC0@GOTOFF[ebx]
+ mov	eax, DWORD PTR gs_foo@GOT[ebx]
+ nop
+.p2align 4,0