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@ -55,6 +55,128 @@ |
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#endif |
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#endif |
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/* Prefixes will be emitted in the order defined below.
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WAIT_PREFIX must be the first prefix since FWAIT is really is an |
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instruction, and so must come before any prefixes. |
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The preferred prefix order is SEG_PREFIX, ADDR_PREFIX, DATA_PREFIX, |
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LOCKREP_PREFIX. */ |
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#define WAIT_PREFIX 0 |
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#define SEG_PREFIX 1 |
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#define ADDR_PREFIX 2 |
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#define DATA_PREFIX 3 |
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#define LOCKREP_PREFIX 4 |
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#define REX_PREFIX 5 /* must come last. */ |
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#define MAX_PREFIXES 6 /* max prefixes per opcode */ |
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/* we define the syntax here (modulo base,index,scale syntax) */ |
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#define REGISTER_PREFIX '%' |
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#define IMMEDIATE_PREFIX '$' |
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#define ABSOLUTE_PREFIX '*' |
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/* these are the instruction mnemonic suffixes in AT&T syntax or
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memory operand size in Intel syntax. */ |
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#define WORD_MNEM_SUFFIX 'w' |
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#define BYTE_MNEM_SUFFIX 'b' |
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#define SHORT_MNEM_SUFFIX 's' |
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#define LONG_MNEM_SUFFIX 'l' |
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#define QWORD_MNEM_SUFFIX 'q' |
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#define XMMWORD_MNEM_SUFFIX 'x' |
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/* Intel Syntax. Use a non-ascii letter since since it never appears
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in instructions. */ |
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#define LONG_DOUBLE_MNEM_SUFFIX '\1' |
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#define END_OF_INSN '\0' |
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/*
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'templates' is for grouping together 'template' structures for opcodes |
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of the same name. This is only used for storing the insns in the grand |
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ole hash table of insns. |
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The templates themselves start at START and range up to (but not including) |
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END. |
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*/ |
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typedef struct |
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{ |
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const template *start; |
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const template *end; |
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} |
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templates; |
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/* 386 operand encoding bytes: see 386 book for details of this. */ |
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typedef struct |
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{ |
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unsigned int regmem; /* codes register or memory operand */ |
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unsigned int reg; /* codes register operand (or extended opcode) */ |
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unsigned int mode; /* how to interpret regmem & reg */ |
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} |
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modrm_byte; |
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/* x86-64 extension prefix. */ |
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typedef int rex_byte; |
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/* The SSE5 instructions have a two bit instruction modifier (OC) that
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is stored in two separate bytes in the instruction. Pick apart OC |
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into the 2 separate bits for instruction. */ |
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#define DREX_OC0(x) (((x) & 1) != 0) |
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#define DREX_OC1(x) (((x) & 2) != 0) |
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#define DREX_OC0_MASK (1 << 3) /* set OC0 in byte 4 */ |
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#define DREX_OC1_MASK (1 << 2) /* set OC1 in byte 3 */ |
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/* OC mappings */ |
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#define DREX_XMEM_X1_X2_X2 0 /* 4 op insn, dest = src3, src1 = reg/mem */ |
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#define DREX_X1_XMEM_X2_X2 1 /* 4 op insn, dest = src3, src2 = reg/mem */ |
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#define DREX_X1_XMEM_X2_X1 2 /* 4 op insn, dest = src1, src2 = reg/mem */ |
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#define DREX_X1_X2_XMEM_X1 3 /* 4 op insn, dest = src1, src3 = reg/mem */ |
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#define DREX_XMEM_X1_X2 0 /* 3 op insn, src1 = reg/mem */ |
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#define DREX_X1_XMEM_X2 1 /* 3 op insn, src1 = reg/mem */ |
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/* Information needed to create the DREX byte in SSE5 instructions. */ |
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typedef struct |
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{ |
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unsigned int reg; /* register */ |
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unsigned int rex; /* REX flags */ |
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unsigned int modrm_reg; /* which arg goes in the modrm.reg field */ |
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unsigned int modrm_regmem; /* which arg goes in the modrm.regmem field */ |
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} drex_byte; |
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/* 386 opcode byte to code indirect addressing. */ |
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typedef struct |
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{ |
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unsigned base; |
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unsigned index; |
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unsigned scale; |
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} |
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sib_byte; |
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enum processor_type |
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{ |
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PROCESSOR_UNKNOWN, |
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PROCESSOR_I386, |
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PROCESSOR_I486, |
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PROCESSOR_PENTIUM, |
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PROCESSOR_PENTIUMPRO, |
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PROCESSOR_PENTIUM4, |
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PROCESSOR_NOCONA, |
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PROCESSOR_CORE, |
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PROCESSOR_CORE2, |
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PROCESSOR_K6, |
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PROCESSOR_ATHLON, |
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PROCESSOR_K8, |
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PROCESSOR_GENERIC32, |
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PROCESSOR_GENERIC64, |
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PROCESSOR_AMDFAM10 |
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}; |
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/* x86 arch names, types and features */ |
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typedef struct |
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{ |
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const char *name; /* arch name */ |
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enum processor_type type; /* arch type */ |
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i386_cpu_flags flags; /* cpu feature flags */ |
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} |
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arch_entry; |
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static void set_code_flag (int); |
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static void set_16bit_gcc_code_flag (int); |
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static void set_intel_syntax (int); |
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@ -313,7 +435,7 @@ static int quiet_warnings = 0; |
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/* CPU name. */ |
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static const char *cpu_arch_name = NULL; |
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static const char *cpu_sub_arch_name = NULL; |
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static char *cpu_sub_arch_name = NULL; |
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/* CPU feature flags. */ |
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static i386_cpu_flags cpu_arch_flags = CPU_UNKNOWN_FLAGS; |
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@ -427,92 +549,96 @@ const relax_typeS md_relax_table[] = |
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static const arch_entry cpu_arch[] = |
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{ |
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{"generic32", PROCESSOR_GENERIC32, |
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CPU_GENERIC32_FLAGS }, |
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{"generic64", PROCESSOR_GENERIC64, |
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CPU_GENERIC64_FLAGS }, |
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{"i8086", PROCESSOR_UNKNOWN, |
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CPU_NONE_FLAGS }, |
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{"i186", PROCESSOR_UNKNOWN, |
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CPU_I186_FLAGS }, |
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{"i286", PROCESSOR_UNKNOWN, |
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CPU_I286_FLAGS }, |
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{"i386", PROCESSOR_I386, |
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CPU_I386_FLAGS }, |
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{"i486", PROCESSOR_I486, |
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CPU_I486_FLAGS }, |
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{"i586", PROCESSOR_PENTIUM, |
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CPU_I586_FLAGS }, |
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{"i686", PROCESSOR_PENTIUMPRO, |
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CPU_I686_FLAGS }, |
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{"pentium", PROCESSOR_PENTIUM, |
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CPU_I586_FLAGS }, |
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{"pentiumpro",PROCESSOR_PENTIUMPRO, |
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CPU_I686_FLAGS }, |
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{"pentiumii", PROCESSOR_PENTIUMPRO, |
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CPU_P2_FLAGS }, |
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{"pentiumiii",PROCESSOR_PENTIUMPRO, |
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CPU_P3_FLAGS }, |
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{"pentium4", PROCESSOR_PENTIUM4, |
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CPU_P4_FLAGS }, |
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{"prescott", PROCESSOR_NOCONA, |
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CPU_CORE_FLAGS }, |
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{"nocona", PROCESSOR_NOCONA, |
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CPU_NOCONA_FLAGS }, |
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{"yonah", PROCESSOR_CORE, |
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CPU_CORE_FLAGS }, |
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{"core", PROCESSOR_CORE, |
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CPU_CORE_FLAGS }, |
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{"merom", PROCESSOR_CORE2, |
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CPU_CORE2_FLAGS }, |
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{"core2", PROCESSOR_CORE2, |
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CPU_CORE2_FLAGS }, |
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{"k6", PROCESSOR_K6, |
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CPU_K6_FLAGS }, |
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{"k6_2", PROCESSOR_K6, |
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CPU_K6_2_FLAGS }, |
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{"athlon", PROCESSOR_ATHLON, |
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CPU_ATHLON_FLAGS }, |
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{"sledgehammer", PROCESSOR_K8, |
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CPU_K8_FLAGS }, |
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{"opteron", PROCESSOR_K8, |
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CPU_K8_FLAGS }, |
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{"k8", PROCESSOR_K8, |
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CPU_K8_FLAGS }, |
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{"amdfam10", PROCESSOR_AMDFAM10, |
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CPU_AMDFAM10_FLAGS }, |
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{".mmx", PROCESSOR_UNKNOWN, |
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CPU_MMX_FLAGS }, |
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{".sse", PROCESSOR_UNKNOWN, |
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CPU_SSE_FLAGS }, |
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{".sse2", PROCESSOR_UNKNOWN, |
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CPU_SSE2_FLAGS }, |
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{".sse3", PROCESSOR_UNKNOWN, |
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CPU_SSE3_FLAGS }, |
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{".ssse3", PROCESSOR_UNKNOWN, |
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CPU_SSSE3_FLAGS }, |
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{".sse4.1", PROCESSOR_UNKNOWN, |
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CPU_SSE4_1_FLAGS }, |
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{".sse4.2", PROCESSOR_UNKNOWN, |
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CPU_SSE4_2_FLAGS }, |
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{".sse4", PROCESSOR_UNKNOWN, |
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CPU_SSE4_2_FLAGS }, |
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{".3dnow", PROCESSOR_UNKNOWN, |
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CPU_3DNOW_FLAGS }, |
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{".3dnowa", PROCESSOR_UNKNOWN, |
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CPU_3DNOWA_FLAGS }, |
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{".padlock", PROCESSOR_UNKNOWN, |
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CPU_PADLOCK_FLAGS }, |
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{".pacifica", PROCESSOR_UNKNOWN, |
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CPU_SVME_FLAGS }, |
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{".svme", PROCESSOR_UNKNOWN, |
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CPU_SVME_FLAGS }, |
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{".sse4a", PROCESSOR_UNKNOWN, |
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CPU_SSE4A_FLAGS }, |
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{".abm", PROCESSOR_UNKNOWN, |
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CPU_ABM_FLAGS }, |
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{".sse5", PROCESSOR_UNKNOWN, |
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CPU_SSE5_FLAGS }, |
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{ "generic32", PROCESSOR_GENERIC32, |
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CPU_GENERIC32_FLAGS }, |
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{ "generic64", PROCESSOR_GENERIC64, |
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CPU_GENERIC64_FLAGS }, |
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{ "i8086", PROCESSOR_UNKNOWN, |
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CPU_NONE_FLAGS }, |
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{ "i186", PROCESSOR_UNKNOWN, |
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CPU_I186_FLAGS }, |
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{ "i286", PROCESSOR_UNKNOWN, |
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CPU_I286_FLAGS }, |
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{ "i386", PROCESSOR_I386, |
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CPU_I386_FLAGS }, |
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{ "i486", PROCESSOR_I486, |
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CPU_I486_FLAGS }, |
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{ "i586", PROCESSOR_PENTIUM, |
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CPU_I586_FLAGS }, |
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{ "i686", PROCESSOR_PENTIUMPRO, |
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CPU_I686_FLAGS }, |
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{ "pentium", PROCESSOR_PENTIUM, |
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CPU_I586_FLAGS }, |
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{ "pentiumpro", PROCESSOR_PENTIUMPRO, |
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CPU_I686_FLAGS }, |
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{ "pentiumii", PROCESSOR_PENTIUMPRO, |
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CPU_P2_FLAGS }, |
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{ "pentiumiii",PROCESSOR_PENTIUMPRO, |
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CPU_P3_FLAGS }, |
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{ "pentium4", PROCESSOR_PENTIUM4, |
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CPU_P4_FLAGS }, |
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{ "prescott", PROCESSOR_NOCONA, |
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CPU_CORE_FLAGS }, |
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{ "nocona", PROCESSOR_NOCONA, |
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CPU_NOCONA_FLAGS }, |
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{ "yonah", PROCESSOR_CORE, |
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CPU_CORE_FLAGS }, |
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{ "core", PROCESSOR_CORE, |
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CPU_CORE_FLAGS }, |
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{ "merom", PROCESSOR_CORE2, |
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CPU_CORE2_FLAGS }, |
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{ "core2", PROCESSOR_CORE2, |
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CPU_CORE2_FLAGS }, |
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{ "k6", PROCESSOR_K6, |
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CPU_K6_FLAGS }, |
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{ "k6_2", PROCESSOR_K6, |
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CPU_K6_2_FLAGS }, |
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{ "athlon", PROCESSOR_ATHLON, |
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CPU_ATHLON_FLAGS }, |
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{ "sledgehammer", PROCESSOR_K8, |
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CPU_K8_FLAGS }, |
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{ "opteron", PROCESSOR_K8, |
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CPU_K8_FLAGS }, |
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{ "k8", PROCESSOR_K8, |
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CPU_K8_FLAGS }, |
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{ "amdfam10", PROCESSOR_AMDFAM10, |
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CPU_AMDFAM10_FLAGS }, |
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{ ".mmx", PROCESSOR_UNKNOWN, |
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CPU_MMX_FLAGS }, |
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{ ".sse", PROCESSOR_UNKNOWN, |
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CPU_SSE_FLAGS }, |
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{ ".sse2", PROCESSOR_UNKNOWN, |
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CPU_SSE2_FLAGS }, |
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{ ".sse3", PROCESSOR_UNKNOWN, |
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CPU_SSE3_FLAGS }, |
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{ ".ssse3", PROCESSOR_UNKNOWN, |
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CPU_SSSE3_FLAGS }, |
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{ ".sse4.1", PROCESSOR_UNKNOWN, |
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CPU_SSE4_1_FLAGS }, |
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{ ".sse4.2", PROCESSOR_UNKNOWN, |
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CPU_SSE4_2_FLAGS }, |
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{ ".sse4", PROCESSOR_UNKNOWN, |
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CPU_SSE4_2_FLAGS }, |
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{ ".vmx", PROCESSOR_UNKNOWN, |
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CPU_VMX_FLAGS }, |
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{ ".smx", PROCESSOR_UNKNOWN, |
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CPU_SMX_FLAGS }, |
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{ ".3dnow", PROCESSOR_UNKNOWN, |
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CPU_3DNOW_FLAGS }, |
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{ ".3dnowa", PROCESSOR_UNKNOWN, |
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CPU_3DNOWA_FLAGS }, |
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{ ".padlock", PROCESSOR_UNKNOWN, |
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CPU_PADLOCK_FLAGS }, |
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{ ".pacifica", PROCESSOR_UNKNOWN, |
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CPU_SVME_FLAGS }, |
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{ ".svme", PROCESSOR_UNKNOWN, |
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CPU_SVME_FLAGS }, |
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{ ".sse4a", PROCESSOR_UNKNOWN, |
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CPU_SSE4A_FLAGS }, |
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{ ".abm", PROCESSOR_UNKNOWN, |
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CPU_ABM_FLAGS }, |
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{ ".sse5", PROCESSOR_UNKNOWN, |
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CPU_SSE5_FLAGS }, |
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}; |
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const pseudo_typeS md_pseudo_table[] = |
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@ -1653,7 +1779,16 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED) |
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cpu_arch[i].flags); |
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if (!UINTS_EQUAL (flags, cpu_arch_flags)) |
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{ |
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cpu_sub_arch_name = cpu_arch[i].name; |
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if (cpu_sub_arch_name) |
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{ |
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char *name = cpu_sub_arch_name; |
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cpu_sub_arch_name = concat (name, |
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cpu_arch[i].name, |
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NULL); |
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free (name); |
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} |
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else |
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cpu_sub_arch_name = xstrdup (cpu_arch[i].name); |
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cpu_arch_flags = flags; |
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} |
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*input_line_pointer = e; |
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@ -7049,6 +7184,7 @@ int |
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md_parse_option (int c, char *arg) |
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{ |
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unsigned int i; |
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char *arch, *next; |
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switch (c) |
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{ |
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@ -7124,24 +7260,62 @@ md_parse_option (int c, char *arg) |
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break; |
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case OPTION_MARCH: |
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if (*arg == '.') |
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as_fatal (_("Invalid -march= option: `%s'"), arg); |
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for (i = 0; i < ARRAY_SIZE (cpu_arch); i++) |
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{ |
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if (strcmp (arg, cpu_arch [i].name) == 0) |
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arch = xstrdup (arg); |
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do |
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{ |
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if (*arch == '.') |
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as_fatal (_("Invalid -march= option: `%s'"), arg); |
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next = strchr (arch, '+'); |
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if (next) |
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*next++ = '\0'; |
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for (i = 0; i < ARRAY_SIZE (cpu_arch); i++) |
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{ |
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cpu_arch_isa = cpu_arch[i].type; |
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cpu_arch_isa_flags = cpu_arch[i].flags; |
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if (!cpu_arch_tune_set) |
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if (strcmp (arch, cpu_arch [i].name) == 0) |
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{ |
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/* Processor. */ |
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cpu_arch_name = cpu_arch[i].name; |
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cpu_sub_arch_name = NULL; |
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cpu_arch_flags = cpu_arch[i].flags; |
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cpu_arch_isa = cpu_arch[i].type; |
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cpu_arch_isa_flags = cpu_arch[i].flags; |
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if (!cpu_arch_tune_set) |
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{ |
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cpu_arch_tune = cpu_arch_isa; |
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|
|
cpu_arch_tune_flags = cpu_arch_isa_flags; |
|
|
|
} |
|
|
|
break; |
|
|
|
} |
|
|
|
else if (*cpu_arch [i].name == '.' |
|
|
|
&& strcmp (arch, cpu_arch [i].name + 1) == 0) |
|
|
|
{ |
|
|
|
cpu_arch_tune = cpu_arch_isa; |
|
|
|
cpu_arch_tune_flags = cpu_arch_isa_flags; |
|
|
|
/* ISA entension. */ |
|
|
|
i386_cpu_flags flags; |
|
|
|
flags = cpu_flags_or (cpu_arch_flags, |
|
|
|
cpu_arch[i].flags); |
|
|
|
if (!UINTS_EQUAL (flags, cpu_arch_flags)) |
|
|
|
{ |
|
|
|
if (cpu_sub_arch_name) |
|
|
|
{ |
|
|
|
char *name = cpu_sub_arch_name; |
|
|
|
cpu_sub_arch_name = concat (name, |
|
|
|
cpu_arch[i].name, |
|
|
|
NULL); |
|
|
|
free (name); |
|
|
|
} |
|
|
|
else |
|
|
|
cpu_sub_arch_name = xstrdup (cpu_arch[i].name); |
|
|
|
cpu_arch_flags = flags; |
|
|
|
} |
|
|
|
break; |
|
|
|
} |
|
|
|
break; |
|
|
|
} |
|
|
|
|
|
|
|
if (i >= ARRAY_SIZE (cpu_arch)) |
|
|
|
as_fatal (_("Invalid -march= option: `%s'"), arg); |
|
|
|
|
|
|
|
arch = next; |
|
|
|
} |
|
|
|
if (i >= ARRAY_SIZE (cpu_arch)) |
|
|
|
as_fatal (_("Invalid -march= option: `%s'"), arg); |
|
|
|
while (next != NULL ); |
|
|
|
break; |
|
|
|
|
|
|
|
case OPTION_MTUNE: |
|
|
|
@ -7226,7 +7400,16 @@ md_show_usage (stream) |
|
|
|
--divide ignored\n")); |
|
|
|
#endif |
|
|
|
fprintf (stream, _("\
|
|
|
|
-march=CPU/-mtune=CPU generate code/optimize for CPU, where CPU is one of:\n\ |
|
|
|
-march=CPU[,+EXTENSION...]\n\ |
|
|
|
generate code for CPU and EXTENSION, CPU is one of:\n\ |
|
|
|
i386, i486, pentium, pentiumpro, pentium4, nocona,\n\ |
|
|
|
core, core2, k6, athlon, k8, generic32, generic64\n\ |
|
|
|
EXTENSION is combination of:\n\ |
|
|
|
mmx, sse, sse2, sse3, ssse3, sse4.1, sse4.2, sse4,\n\ |
|
|
|
vmx, smx, 3dnow, 3dnowa, sse4a, sse5, svme, abm,\n\ |
|
|
|
padlock\n")); |
|
|
|
fprintf (stream, _("\
|
|
|
|
-mtune=CPU optimize for CPU, where CPU is one of:\n\ |
|
|
|
i386, i486, pentium, pentiumpro, pentium4, nocona,\n\ |
|
|
|
core, core2, k6, athlon, k8, generic32, generic64\n")); |
|
|
|
fprintf (stream, _("\
|
|
|
|
|
H.J. Lu
18 years ago