PR binutils/12329

* avr-dis.c (avr_operand): Fix disassembly of ELPM, LPM and SPM
	insns using post-increment addressing.

	* avr.h (AVR_ISA_AVR6): Fix typo, adding AVR_ISA_SPMX.

include/opcode/ChangeLog

@@ -1,3 +1,7 @@
+2011-07-01  Nick Clifton  <nickc@redhat.com>
+
+	* avr.h (AVR_ISA_AVR6): Fix typo, adding AVR_ISA_SPMX.
+
 2011-06-18  Robin Getz  <robin.getz@analog.com>
 
 	* bfin.h (is_macmod_signed): New func

include/opcode/avr.h

@@ -68,7 +68,7 @@
 #define AVR_ISA_AVR6   (AVR_ISA_1200 | AVR_ISA_LPM | AVR_ISA_LPMX | \
                         AVR_ISA_SRAM | AVR_ISA_MEGA | AVR_ISA_MUL | \
                         AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \
-                        AVR_ISA_SPM | AVR_ISA_BRK | AVR_ISA_EIND | \
+                        AVR_ISA_SPMX | AVR_ISA_BRK | AVR_ISA_EIND | \
                         AVR_ISA_MOVW)
 
 #define REGISTER_P(x) ((x) == 'r'		\

opcodes/ChangeLog

@@ -1,3 +1,9 @@
+2011-07-01  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/12329
+	* avr-dis.c (avr_operand): Fix disassembly of ELPM, LPM and SPM
+	insns using post-increment addressing.
+
 2011-06-30  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* i386-dis.c (vex_len_table): Update rorxS.

opcodes/arm-dis.c

@@ -2997,6 +2997,9 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
                           /* PC relative with immediate offset.  */
 			  bfd_vma offset = ((given & 0xf00) >> 4) | (given & 0xf);
 
+			  if (NEGATIVE_BIT_SET)
+			    offset = - offset;
+
 			  if (PRE_BIT_SET)
 			    {
 			      /* Elide positive zero offset.  */

opcodes/avr-dis.c

@@ -125,7 +125,8 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra
         {
           if (*s == '+')
             {
-	*buf++ = '+';
+	      if (insn & (1 << (15 - (s - opcode_str))))
+		*buf++ = '+';
               break;
             }
         }