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@ -510,6 +510,10 @@ const struct powerpc_operand powerpc_operands[] = |
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#define WS_MASK (0x7 << 11) |
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{ 3, 11, 0, 0, 0 }, |
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/* The L field in an mtmsrd instruction */ |
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#define MTMSRD_L WS + 1 |
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{ 1, 16, 0, 0, PPC_OPERAND_OPTIONAL }, |
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}; |
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/* The functions used to insert and extract complicated operands. */ |
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@ -1412,6 +1416,9 @@ extract_tbr (insn, dialect, invalid) |
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/* An X_MASK with the RA and RB fields fixed. */ |
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#define XRARB_MASK (X_MASK | RA_MASK | RB_MASK) |
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/* An XRARB_MASK, but with the L bit clear. */ |
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#define XRLARB_MASK (XRARB_MASK & ~((unsigned long) 1 << 16)) |
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/* An X_MASK with the RT and RA fields fixed. */ |
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#define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK) |
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@ -2950,7 +2957,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { |
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{ "wrteei", X(31,163), XE_MASK, PPC403, { E } }, |
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{ "wrteei", X(31,163), XE_MASK, BOOKE, { E } }, |
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{ "mtmsrd", X(31,178), XRARB_MASK, PPC64, { RS } }, |
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{ "mtmsrd", X(31,178), XRLARB_MASK, PPC64, { RS , MTMSRD_L } }, |
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{ "stdux", X(31,181), X_MASK, PPC64, { RS, RAS, RB } }, |
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