Browse Source
2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.gdb-csl-arm-20051020-branch
Jim Blandy
21 years ago
70 changed files with 172780 additions and 3197 deletions
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/* BFD support for the M16C/M32C processors.
|
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Copyright (C) 2004 Free Software Foundation, Inc. |
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|
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This file is part of BFD, the Binary File Descriptor library. |
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|
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This program is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 2 of the License, or |
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(at your option) any later version. |
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|
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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|
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You should have received a copy of the GNU General Public License |
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along with this program; if not, write to the Free Software |
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ |
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|
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#include "bfd.h" |
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#include "sysdep.h" |
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#include "libbfd.h" |
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|
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static const bfd_arch_info_type arch_info_struct[] = |
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{ |
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{ |
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32, /* bits per word */ |
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32, /* bits per address */ |
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8, /* bits per byte */ |
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bfd_arch_m32c, /* architecture */ |
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bfd_mach_m32c, /* machine */ |
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"m32c", /* architecture name */ |
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"m32c", /* printable name */ |
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3, /* section align power */ |
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FALSE, /* the default ? */ |
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bfd_default_compatible, /* architecture comparison fn */ |
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bfd_default_scan, /* string to architecture convert fn */ |
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NULL /* next in list */ |
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}, |
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}; |
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|
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const bfd_arch_info_type bfd_m32c_arch = |
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{ |
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32, /* Bits per word. */ |
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32, /* Bits per address. */ |
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8, /* Bits per byte. */ |
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bfd_arch_m32c, /* Architecture. */ |
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bfd_mach_m16c, /* Machine. */ |
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"m32c", /* Architecture name. */ |
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"m16c", /* Printable name. */ |
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4, /* Section align power. */ |
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TRUE, /* The default ? */ |
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bfd_default_compatible, /* Architecture comparison fn. */ |
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bfd_default_scan, /* String to architecture convert fn. */ |
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&arch_info_struct[0], /* Next in list. */ |
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}; |
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/* tc-m32c.h -- Header file for tc-m32c.c.
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Copyright (C) 2004 Free Software Foundation, Inc. |
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This file is part of GAS, the GNU Assembler. |
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|
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GAS is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 2, or (at your option) |
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any later version. |
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|
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GAS is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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|
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You should have received a copy of the GNU General Public License |
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along with GAS; see the file COPYING. If not, write to |
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the Free Software Foundation, 59 Temple Place - Suite 330, |
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Boston, MA 02111-1307, USA. */ |
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|
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#define TC_M32C |
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|
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#ifndef BFD_ASSEMBLER |
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#error M32C support requires BFD_ASSEMBLER |
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#endif |
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|
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#define LISTING_HEADER "M16C/M32C GAS " |
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|
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/* The target BFD architecture. */ |
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#define TARGET_ARCH bfd_arch_m32c |
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|
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#define TARGET_FORMAT "elf32-m32c" |
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|
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#define TARGET_BYTES_BIG_ENDIAN 1 |
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|
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#define md_end m32c_md_end |
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extern void m32c_md_end (void); |
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|
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#define md_start_line_hook m32c_start_line_hook |
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extern void m32c_start_line_hook (void); |
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|
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/* call md_pcrel_from_section, not md_pcrel_from */ |
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long md_pcrel_from_section PARAMS ((struct fix *, segT)); |
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#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC) |
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|
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/* Permit temporary numeric labels. */ |
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#define LOCAL_LABELS_FB 1 |
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|
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#define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs */ |
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|
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/* We don't need to handle .word strangely. */ |
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#define WORKING_DOT_WORD |
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|
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#define md_apply_fix gas_cgen_md_apply_fix |
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|
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#define tc_fix_adjustable(fixP) m32c_fix_adjustable (fixP) |
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extern bfd_boolean m32c_fix_adjustable PARAMS ((struct fix *)); |
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|
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/* When relaxing, we need to emit various relocs we otherwise wouldn't. */ |
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#define TC_FORCE_RELOCATION(fix) m32c_force_relocation (fix) |
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extern int m32c_force_relocation PARAMS ((struct fix *)); |
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extern const struct relax_type md_relax_table[]; |
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#define TC_GENERIC_RELAX_TABLE md_relax_table |
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extern void m32c_prepare_relax_scan PARAMS ((fragS *, offsetT *, relax_substateT state)); |
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#define md_prepare_relax_scan(FRAGP, ADDR, AIM, STATE, TYPE) \ |
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m32c_prepare_relax_scan(FRAGP, &AIM, STATE) |
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/* Values passed to md_apply_fix don't include the symbol value. */ |
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#define MD_APPLY_SYM_VALUE(FIX) 0 |
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|
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#define tc_gen_reloc gas_cgen_tc_gen_reloc |
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|
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/* Call md_pcrel_from_section(), not md_pcrel_from(). */ |
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#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC) |
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extern long md_pcrel_from_section PARAMS ((struct fix *, segT)); |
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|
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/* We need a special version of the TC_START_LABEL macro so that we
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allow the :Z, :S, :Q and :G suffixes to be |
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parsed as such. Note - in a HORRIBLE HACK, we make use of the |
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knowledge that this marco is only ever evaluated in one place |
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(read_a_source_file in read.c) where we can access the local |
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variable 's' - the start of the symbol that was terminated by |
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'character'. Also we need to be able to change the contents of |
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the local variable 'c' which is passed to this macro as 'character'. */ |
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#define TC_START_LABEL(character, i_l_p) \ |
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((character) != ':' ? 0 : (character = m32c_is_colon_insn (s)) ? 0 : ((character = ':'), 1)) |
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extern char m32c_is_colon_insn PARAMS ((char *)); |
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@ -0,0 +1,48 @@ |
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@c Copyright 2005 |
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@c Free Software Foundation, Inc. |
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@c This is part of the GAS manual. |
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@c For copying conditions, see the file as.texinfo. |
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@ifset GENERIC |
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@page |
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@node M32C-Dependent |
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@chapter M32C Dependent Features |
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@end ifset |
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@ifclear GENERIC |
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@node Machine Dependencies |
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@chapter M32C Dependent Features |
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@end ifclear |
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@cindex M32C support |
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@code{@value{AS}} can assemble code for several different members of |
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the Renesas M32C family. Normally the default is to assemble code for |
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the M16C microprocessor. The @code{-m32c} option may be used to |
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change the default to the M32C microprocessor. |
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|
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@menu |
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* M32C-Opts:: M32C Options |
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@end menu |
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@node M32C-Opts |
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@section M32C Options |
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@cindex options, M32C |
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@cindex M32C options |
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The Renesas M32C version of @code{@value{AS}} has two |
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machine-dependent options: |
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@table @code |
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@item -m32c |
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@cindex @samp{-m32c} option, M32C |
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@cindex architecture options, M32C |
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@cindex M32C architecture option |
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Assemble M32C instructions. |
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@item -m16c |
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@cindex @samp{-m16c} option, M16C |
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@cindex architecture options, M16C |
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@cindex M16C architecture option |
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Assemble M16C instructions (default). |
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@end table |
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/* M32C ELF support for BFD.
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Copyright (C) 2004 Free Software Foundation, Inc. |
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|
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This file is part of BFD, the Binary File Descriptor library. |
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|
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This program is free software; you can redistribute it and/or modify |
|||
it under the terms of the GNU General Public License as published by |
|||
the Free Software Foundation; either version 2 of the License, or |
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(at your option) any later version. |
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|
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
GNU General Public License for more details. |
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|
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You should have received a copy of the GNU General Public License |
|||
along with this program; if not, write to the Free Software Foundation, Inc., |
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
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|
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#ifndef _ELF_M32C_H |
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#define _ELF_M32C_H |
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#include "elf/reloc-macros.h" |
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|
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/* Relocations. */ |
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START_RELOC_NUMBERS (elf_m32c_reloc_type) |
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RELOC_NUMBER (R_M32C_NONE, 0) |
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RELOC_NUMBER (R_M32C_16, 1) |
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RELOC_NUMBER (R_M32C_24, 2) |
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RELOC_NUMBER (R_M32C_32, 3) |
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RELOC_NUMBER (R_M32C_8_PCREL, 4) |
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RELOC_NUMBER (R_M32C_16_PCREL, 5) |
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END_RELOC_NUMBERS (R_M32C_max) |
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|
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#define EF_M32C_CPU_M16C 0x00000075 /* default */ |
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#define EF_M32C_CPU_M32C 0x00000078 /* m32c */ |
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#define EF_M32C_CPU_MASK 0x0000007F /* specific cpu bits */ |
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#define EF_M32C_ALL_FLAGS (EF_M32C_CPU_MASK) |
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|
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/* Define the data & instruction memory discriminator. In a linked
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executable, an symbol should be deemed to point to an instruction |
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if ((address & M16C_INSN_MASK) == M16C_INSN_VALUE), and similarly |
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for the data space. See also `ld/emulparams/elf32m32c.sh'. */ |
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#define M32C_DATA_MASK 0xffc00000 |
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#define M32C_DATA_VALUE 0x00000000 |
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#define M32C_INSN_MASK 0xffc00000 |
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#define M32C_INSN_VALUE 0x00400000 |
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|
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#endif /* _ELF_M32C_H */ |
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@ -0,0 +1,63 @@ |
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/* This file defines the interface between the m32c simulator and gdb.
|
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Copyright (C) 2005 Free Software Foundation, Inc. |
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|
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This file is part of GDB. |
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|
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This program is free software; you can redistribute it and/or modify |
|||
it under the terms of the GNU General Public License as published by |
|||
the Free Software Foundation; either version 2 of the License, or |
|||
(at your option) any later version. |
|||
|
|||
This program is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
GNU General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU General Public License |
|||
along with this program; if not, write to the Free Software |
|||
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
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|
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#ifndef SIM_M32C_H |
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#define SIM_M32C_H |
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|
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enum m32c_sim_reg { |
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m32c_sim_reg_r0_bank0, |
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m32c_sim_reg_r1_bank0, |
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m32c_sim_reg_r2_bank0, |
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m32c_sim_reg_r3_bank0, |
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m32c_sim_reg_a0_bank0, |
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m32c_sim_reg_a1_bank0, |
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m32c_sim_reg_fb_bank0, |
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m32c_sim_reg_sb_bank0, |
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m32c_sim_reg_r0_bank1, |
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m32c_sim_reg_r1_bank1, |
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m32c_sim_reg_r2_bank1, |
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m32c_sim_reg_r3_bank1, |
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m32c_sim_reg_a0_bank1, |
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m32c_sim_reg_a1_bank1, |
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m32c_sim_reg_fb_bank1, |
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m32c_sim_reg_sb_bank1, |
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m32c_sim_reg_usp, |
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m32c_sim_reg_isp, |
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m32c_sim_reg_pc, |
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m32c_sim_reg_intb, |
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m32c_sim_reg_flg, |
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m32c_sim_reg_svf, |
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m32c_sim_reg_svp, |
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m32c_sim_reg_vct, |
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m32c_sim_reg_dmd0, |
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m32c_sim_reg_dmd1, |
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m32c_sim_reg_dct0, |
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m32c_sim_reg_dct1, |
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m32c_sim_reg_drc0, |
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m32c_sim_reg_drc1, |
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m32c_sim_reg_dma0, |
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m32c_sim_reg_dma1, |
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m32c_sim_reg_dsa0, |
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m32c_sim_reg_dsa1, |
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m32c_sim_reg_dra0, |
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m32c_sim_reg_dra1, |
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m32c_sim_reg_num_regs |
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}; |
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|
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#endif /* SIM_M32C_H */ |
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@ -0,0 +1,24 @@ |
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MACHINE= |
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SCRIPT_NAME=elf |
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OUTPUT_FORMAT="elf32-m32c" |
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# See also `include/elf/m32c.h' |
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TEXT_START_ADDR=0x2000 |
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ARCH=m32c |
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ENTRY=_start |
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EMBEDDED=yes |
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ELFSIZE=32 |
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MAXPAGESIZE=256 |
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# This is like setting STACK_ADDR to 0x0073FFFF0, except that the setting can |
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# be overridden, e.g. --defsym _stack=0x0f00, and that we put an extra |
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# sentinal value at the bottom. |
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# N.B. We can't use PROVIDE to set the default value in a symbol because |
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# the address is needed to place the .stack section, which in turn is needed |
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# to hold the sentinel value(s). |
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test -z "$CREATE_SHLIB" && OTHER_SECTIONS=" .stack ${RELOCATING-0}${RELOCATING+(DEFINED(__stack) ? __stack : 0x7fc)} : |
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{ |
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${RELOCATING+__stack = .;} |
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*(.stack) |
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LONG(0xdeaddead) |
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}" |
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# We do not need .stack for shared library. |
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test -n "$CREATE_SHLIB" && OTHER_SECTIONS="" |
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@ -0,0 +1,434 @@ |
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/* Semantics ops support for CGEN-based opcode libraries.
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Copyright (C) 2005 Free Software Foundation, Inc. |
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Contributed by Red Hat. |
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|
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This file is part of the GNU opcodes library. |
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|
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This program is free software; you can redistribute it and/or modify |
|||
it under the terms of the GNU General Public License as published by |
|||
the Free Software Foundation; either version 2, or (at your option) |
|||
any later version. |
|||
|
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This program is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
GNU General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU General Public License along |
|||
with this program; if not, write to the Free Software Foundation, Inc., |
|||
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
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|
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*/ |
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|
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#ifndef CGEN_SEM_OPS_H |
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#define CGEN_SEM_OPS_H |
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#include <assert.h> |
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|
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#if defined (__GNUC__) && ! defined (SEMOPS_DEFINE_INLINE) |
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#define SEMOPS_DEFINE_INLINE |
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#define SEMOPS_INLINE extern inline |
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#else |
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#define SEMOPS_INLINE |
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#endif |
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|
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/* TODO: Lazy encoding/decoding of fp values. */ |
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|
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/* These don't really have a mode. */ |
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#define ANDIF(x, y) ((x) && (y)) |
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#define ORIF(x, y) ((x) || (y)) |
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|
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#define SUBBI(x, y) ((x) - (y)) |
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#define ANDBI(x, y) ((x) & (y)) |
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#define ORBI(x, y) ((x) | (y)) |
|||
#define XORBI(x, y) ((x) ^ (y)) |
|||
#define NEGBI(x) (- (x)) |
|||
#define NOTBI(x) (! (BI) (x)) |
|||
#define INVBI(x) (~ (x)) |
|||
#define EQBI(x, y) ((BI) (x) == (BI) (y)) |
|||
#define NEBI(x, y) ((BI) (x) != (BI) (y)) |
|||
#define LTBI(x, y) ((BI) (x) < (BI) (y)) |
|||
#define LEBI(x, y) ((BI) (x) <= (BI) (y)) |
|||
#define GTBI(x, y) ((BI) (x) > (BI) (y)) |
|||
#define GEBI(x, y) ((BI) (x) >= (BI) (y)) |
|||
#define LTUBI(x, y) ((BI) (x) < (BI) (y)) |
|||
#define LEUBI(x, y) ((BI) (x) <= (BI) (y)) |
|||
#define GTUBI(x, y) ((BI) (x) > (BI) (y)) |
|||
#define GEUBI(x, y) ((BI) (x) >= (BI) (y)) |
|||
|
|||
#define ADDQI(x, y) ((x) + (y)) |
|||
#define SUBQI(x, y) ((x) - (y)) |
|||
#define MULQI(x, y) ((x) * (y)) |
|||
#define DIVQI(x, y) ((QI) (x) / (QI) (y)) |
|||
#define UDIVQI(x, y) ((UQI) (x) / (UQI) (y)) |
|||
#define MODQI(x, y) ((QI) (x) % (QI) (y)) |
|||
#define UMODQI(x, y) ((UQI) (x) % (UQI) (y)) |
|||
#define SRAQI(x, y) ((QI) (x) >> (y)) |
|||
#define SRLQI(x, y) ((UQI) (x) >> (y)) |
|||
#define SLLQI(x, y) ((UQI) (x) << (y)) |
|||
extern QI RORQI (QI, int); |
|||
extern QI ROLQI (QI, int); |
|||
#define ANDQI(x, y) ((x) & (y)) |
|||
#define ORQI(x, y) ((x) | (y)) |
|||
#define XORQI(x, y) ((x) ^ (y)) |
|||
#define NEGQI(x) (- (x)) |
|||
#define NOTQI(x) (! (QI) (x)) |
|||
#define INVQI(x) (~ (x)) |
|||
#define ABSQI(x) ((x) < 0 ? -(x) : (x)) |
|||
#define EQQI(x, y) ((QI) (x) == (QI) (y)) |
|||
#define NEQI(x, y) ((QI) (x) != (QI) (y)) |
|||
#define LTQI(x, y) ((QI) (x) < (QI) (y)) |
|||
#define LEQI(x, y) ((QI) (x) <= (QI) (y)) |
|||
#define GTQI(x, y) ((QI) (x) > (QI) (y)) |
|||
#define GEQI(x, y) ((QI) (x) >= (QI) (y)) |
|||
#define LTUQI(x, y) ((UQI) (x) < (UQI) (y)) |
|||
#define LEUQI(x, y) ((UQI) (x) <= (UQI) (y)) |
|||
#define GTUQI(x, y) ((UQI) (x) > (UQI) (y)) |
|||
#define GEUQI(x, y) ((UQI) (x) >= (UQI) (y)) |
|||
|
|||
#define ADDHI(x, y) ((x) + (y)) |
|||
#define SUBHI(x, y) ((x) - (y)) |
|||
#define MULHI(x, y) ((x) * (y)) |
|||
#define DIVHI(x, y) ((HI) (x) / (HI) (y)) |
|||
#define UDIVHI(x, y) ((UHI) (x) / (UHI) (y)) |
|||
#define MODHI(x, y) ((HI) (x) % (HI) (y)) |
|||
#define UMODHI(x, y) ((UHI) (x) % (UHI) (y)) |
|||
#define SRAHI(x, y) ((HI) (x) >> (y)) |
|||
#define SRLHI(x, y) ((UHI) (x) >> (y)) |
|||
#define SLLHI(x, y) ((UHI) (x) << (y)) |
|||
extern HI RORHI (HI, int); |
|||
extern HI ROLHI (HI, int); |
|||
#define ANDHI(x, y) ((x) & (y)) |
|||
#define ORHI(x, y) ((x) | (y)) |
|||
#define XORHI(x, y) ((x) ^ (y)) |
|||
#define NEGHI(x) (- (x)) |
|||
#define NOTHI(x) (! (HI) (x)) |
|||
#define INVHI(x) (~ (x)) |
|||
#define ABSHI(x) ((x) < 0 ? -(x) : (x)) |
|||
#define EQHI(x, y) ((HI) (x) == (HI) (y)) |
|||
#define NEHI(x, y) ((HI) (x) != (HI) (y)) |
|||
#define LTHI(x, y) ((HI) (x) < (HI) (y)) |
|||
#define LEHI(x, y) ((HI) (x) <= (HI) (y)) |
|||
#define GTHI(x, y) ((HI) (x) > (HI) (y)) |
|||
#define GEHI(x, y) ((HI) (x) >= (HI) (y)) |
|||
#define LTUHI(x, y) ((UHI) (x) < (UHI) (y)) |
|||
#define LEUHI(x, y) ((UHI) (x) <= (UHI) (y)) |
|||
#define GTUHI(x, y) ((UHI) (x) > (UHI) (y)) |
|||
#define GEUHI(x, y) ((UHI) (x) >= (UHI) (y)) |
|||
|
|||
#define ADDSI(x, y) ((x) + (y)) |
|||
#define SUBSI(x, y) ((x) - (y)) |
|||
#define MULSI(x, y) ((x) * (y)) |
|||
#define DIVSI(x, y) ((SI) (x) / (SI) (y)) |
|||
#define UDIVSI(x, y) ((USI) (x) / (USI) (y)) |
|||
#define MODSI(x, y) ((SI) (x) % (SI) (y)) |
|||
#define UMODSI(x, y) ((USI) (x) % (USI) (y)) |
|||
#define SRASI(x, y) ((SI) (x) >> (y)) |
|||
#define SRLSI(x, y) ((USI) (x) >> (y)) |
|||
#define SLLSI(x, y) ((USI) (x) << (y)) |
|||
extern SI RORSI (SI, int); |
|||
extern SI ROLSI (SI, int); |
|||
#define ANDSI(x, y) ((x) & (y)) |
|||
#define ORSI(x, y) ((x) | (y)) |
|||
#define XORSI(x, y) ((x) ^ (y)) |
|||
#define NEGSI(x) (- (x)) |
|||
#define NOTSI(x) (! (SI) (x)) |
|||
#define INVSI(x) (~ (x)) |
|||
#define ABSSI(x) ((x) < 0 ? -(x) : (x)) |
|||
#define EQSI(x, y) ((SI) (x) == (SI) (y)) |
|||
#define NESI(x, y) ((SI) (x) != (SI) (y)) |
|||
#define LTSI(x, y) ((SI) (x) < (SI) (y)) |
|||
#define LESI(x, y) ((SI) (x) <= (SI) (y)) |
|||
#define GTSI(x, y) ((SI) (x) > (SI) (y)) |
|||
#define GESI(x, y) ((SI) (x) >= (SI) (y)) |
|||
#define LTUSI(x, y) ((USI) (x) < (USI) (y)) |
|||
#define LEUSI(x, y) ((USI) (x) <= (USI) (y)) |
|||
#define GTUSI(x, y) ((USI) (x) > (USI) (y)) |
|||
#define GEUSI(x, y) ((USI) (x) >= (USI) (y)) |
|||
|
|||
#ifdef DI_FN_SUPPORT |
|||
extern DI ADDDI (DI, DI); |
|||
extern DI SUBDI (DI, DI); |
|||
extern DI MULDI (DI, DI); |
|||
extern DI DIVDI (DI, DI); |
|||
extern DI UDIVDI (DI, DI); |
|||
extern DI MODDI (DI, DI); |
|||
extern DI UMODDI (DI, DI); |
|||
extern DI SRADI (DI, int); |
|||
extern UDI SRLDI (UDI, int); |
|||
extern UDI SLLDI (UDI, int); |
|||
extern DI RORDI (DI, int); |
|||
extern DI ROLDI (DI, int); |
|||
extern DI ANDDI (DI, DI); |
|||
extern DI ORDI (DI, DI); |
|||
extern DI XORDI (DI, DI); |
|||
extern DI NEGDI (DI); |
|||
extern int NOTDI (DI); |
|||
extern DI INVDI (DI); |
|||
extern int EQDI (DI, DI); |
|||
extern int NEDI (DI, DI); |
|||
extern int LTDI (DI, DI); |
|||
extern int LEDI (DI, DI); |
|||
extern int GTDI (DI, DI); |
|||
extern int GEDI (DI, DI); |
|||
extern int LTUDI (UDI, UDI); |
|||
extern int LEUDI (UDI, UDI); |
|||
extern int GTUDI (UDI, UDI); |
|||
extern int GEUDI (UDI, UDI); |
|||
#else /* ! DI_FN_SUPPORT */ |
|||
#define ADDDI(x, y) ((x) + (y)) |
|||
#define SUBDI(x, y) ((x) - (y)) |
|||
#define MULDI(x, y) ((x) * (y)) |
|||
#define DIVDI(x, y) ((DI) (x) / (DI) (y)) |
|||
#define UDIVDI(x, y) ((UDI) (x) / (UDI) (y)) |
|||
#define MODDI(x, y) ((DI) (x) % (DI) (y)) |
|||
#define UMODDI(x, y) ((UDI) (x) % (UDI) (y)) |
|||
#define SRADI(x, y) ((DI) (x) >> (y)) |
|||
#define SRLDI(x, y) ((UDI) (x) >> (y)) |
|||
#define SLLDI(x, y) ((UDI) (x) << (y)) |
|||
extern DI RORDI (DI, int); |
|||
extern DI ROLDI (DI, int); |
|||
#define ANDDI(x, y) ((x) & (y)) |
|||
#define ORDI(x, y) ((x) | (y)) |
|||
#define XORDI(x, y) ((x) ^ (y)) |
|||
#define NEGDI(x) (- (x)) |
|||
#define NOTDI(x) (! (DI) (x)) |
|||
#define INVDI(x) (~ (x)) |
|||
#define ABSDI(x) ((x) < 0 ? -(x) : (x)) |
|||
#define EQDI(x, y) ((DI) (x) == (DI) (y)) |
|||
#define NEDI(x, y) ((DI) (x) != (DI) (y)) |
|||
#define LTDI(x, y) ((DI) (x) < (DI) (y)) |
|||
#define LEDI(x, y) ((DI) (x) <= (DI) (y)) |
|||
#define GTDI(x, y) ((DI) (x) > (DI) (y)) |
|||
#define GEDI(x, y) ((DI) (x) >= (DI) (y)) |
|||
#define LTUDI(x, y) ((UDI) (x) < (UDI) (y)) |
|||
#define LEUDI(x, y) ((UDI) (x) <= (UDI) (y)) |
|||
#define GTUDI(x, y) ((UDI) (x) > (UDI) (y)) |
|||
#define GEUDI(x, y) ((UDI) (x) >= (UDI) (y)) |
|||
#endif /* DI_FN_SUPPORT */ |
|||
|
|||
#define EXTBIQI(x) ((QI) (BI) (x)) |
|||
#define EXTBIHI(x) ((HI) (BI) (x)) |
|||
#define EXTBISI(x) ((SI) (BI) (x)) |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern DI EXTBIDI (BI); |
|||
#else |
|||
#define EXTBIDI(x) ((DI) (BI) (x)) |
|||
#endif |
|||
#define EXTQIHI(x) ((HI) (QI) (x)) |
|||
#define EXTQISI(x) ((SI) (QI) (x)) |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern DI EXTQIDI (QI); |
|||
#else |
|||
#define EXTQIDI(x) ((DI) (QI) (x)) |
|||
#endif |
|||
#define EXTHIHI(x) ((HI) (HI) (x)) |
|||
#define EXTHISI(x) ((SI) (HI) (x)) |
|||
#define EXTSISI(x) ((SI) (SI) (x)) |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern DI EXTHIDI (HI); |
|||
#else |
|||
#define EXTHIDI(x) ((DI) (HI) (x)) |
|||
#endif |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern DI EXTSIDI (SI); |
|||
#else |
|||
#define EXTSIDI(x) ((DI) (SI) (x)) |
|||
#endif |
|||
|
|||
#define ZEXTBIQI(x) ((QI) (BI) (x)) |
|||
#define ZEXTBIHI(x) ((HI) (BI) (x)) |
|||
#define ZEXTBISI(x) ((SI) (BI) (x)) |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern DI ZEXTBIDI (BI); |
|||
#else |
|||
#define ZEXTBIDI(x) ((DI) (BI) (x)) |
|||
#endif |
|||
#define ZEXTQIHI(x) ((HI) (UQI) (x)) |
|||
#define ZEXTQISI(x) ((SI) (UQI) (x)) |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern DI ZEXTQIDI (QI); |
|||
#else |
|||
#define ZEXTQIDI(x) ((DI) (UQI) (x)) |
|||
#endif |
|||
#define ZEXTHISI(x) ((SI) (UHI) (x)) |
|||
#define ZEXTHIHI(x) ((HI) (UHI) (x)) |
|||
#define ZEXTSISI(x) ((SI) (USI) (x)) |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern DI ZEXTHIDI (HI); |
|||
#else |
|||
#define ZEXTHIDI(x) ((DI) (UHI) (x)) |
|||
#endif |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern DI ZEXTSIDI (SI); |
|||
#else |
|||
#define ZEXTSIDI(x) ((DI) (USI) (x)) |
|||
#endif |
|||
|
|||
#define TRUNCQIBI(x) ((BI) (QI) (x)) |
|||
#define TRUNCHIBI(x) ((BI) (HI) (x)) |
|||
#define TRUNCHIQI(x) ((QI) (HI) (x)) |
|||
#define TRUNCSIBI(x) ((BI) (SI) (x)) |
|||
#define TRUNCSIQI(x) ((QI) (SI) (x)) |
|||
#define TRUNCSIHI(x) ((HI) (SI) (x)) |
|||
#define TRUNCSISI(x) ((SI) (SI) (x)) |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern BI TRUNCDIBI (DI); |
|||
#else |
|||
#define TRUNCDIBI(x) ((BI) (DI) (x)) |
|||
#endif |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern QI TRUNCDIQI (DI); |
|||
#else |
|||
#define TRUNCDIQI(x) ((QI) (DI) (x)) |
|||
#endif |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern HI TRUNCDIHI (DI); |
|||
#else |
|||
#define TRUNCDIHI(x) ((HI) (DI) (x)) |
|||
#endif |
|||
#if defined (DI_FN_SUPPORT) |
|||
extern SI TRUNCDISI (DI); |
|||
#else |
|||
#define TRUNCDISI(x) ((SI) (DI) (x)) |
|||
#endif |
|||
|
|||
/* Composing/decomposing the various types.
|
|||
Word ordering is endian-independent. Words are specified most to least |
|||
significant and word number 0 is the most significant word. |
|||
??? May also wish an endian-dependent version. Later. */ |
|||
|
|||
QI SUBWORDSIQI (SI, int); |
|||
HI SUBWORDSIHI (SI, int); |
|||
SI SUBWORDSFSI (SF); |
|||
SF SUBWORDSISF (SI); |
|||
DI SUBWORDDFDI (DF); |
|||
DF SUBWORDDIDF (DI); |
|||
QI SUBWORDDIQI (DI, int); |
|||
HI SUBWORDDIHI (DI, int); |
|||
SI SUBWORDDISI (DI, int); |
|||
SI SUBWORDDFSI (DF, int); |
|||
SI SUBWORDXFSI (XF, int); |
|||
SI SUBWORDTFSI (TF, int); |
|||
|
|||
UQI SUBWORDSIUQI (SI, int); |
|||
UQI SUBWORDDIUQI (DI, int); |
|||
|
|||
#ifdef SEMOPS_DEFINE_INLINE |
|||
|
|||
SEMOPS_INLINE SF |
|||
SUBWORDSISF (SI in) |
|||
{ |
|||
union { SI in; SF out; } x; |
|||
x.in = in; |
|||
return x.out; |
|||
} |
|||
|
|||
SEMOPS_INLINE DF |
|||
SUBWORDDIDF (DI in) |
|||
{ |
|||
union { DI in; DF out; } x; |
|||
x.in = in; |
|||
return x.out; |
|||
} |
|||
|
|||
SEMOPS_INLINE QI |
|||
SUBWORDSIQI (SI in, int byte) |
|||
{ |
|||
assert (byte >= 0 && byte <= 3); |
|||
return (UQI) (in >> (8 * (3 - byte))) & 0xFF; |
|||
} |
|||
|
|||
SEMOPS_INLINE UQI |
|||
SUBWORDSIUQI (SI in, int byte) |
|||
{ |
|||
assert (byte >= 0 && byte <= 3); |
|||
return (UQI) (in >> (8 * (3 - byte))) & 0xFF; |
|||
} |
|||
|
|||
SEMOPS_INLINE QI |
|||
SUBWORDDIQI (DI in, int byte) |
|||
{ |
|||
assert (byte >= 0 && byte <= 7); |
|||
return (UQI) (in >> (8 * (7 - byte))) & 0xFF; |
|||
} |
|||
|
|||
SEMOPS_INLINE HI |
|||
SUBWORDDIHI (DI in, int word) |
|||
{ |
|||
assert (word >= 0 && word <= 3); |
|||
return (UHI) (in >> (16 * (3 - word))) & 0xFFFF; |
|||
} |
|||
|
|||
SEMOPS_INLINE HI |
|||
SUBWORDSIHI (SI in, int word) |
|||
{ |
|||
if (word == 0) |
|||
return (USI) in >> 16; |
|||
else |
|||
return in; |
|||
} |
|||
|
|||
SEMOPS_INLINE SI |
|||
SUBWORDSFSI (SF in) |
|||
{ |
|||
union { SF in; SI out; } x; |
|||
x.in = in; |
|||
return x.out; |
|||
} |
|||
|
|||
SEMOPS_INLINE DI |
|||
SUBWORDDFDI (DF in) |
|||
{ |
|||
union { DF in; DI out; } x; |
|||
x.in = in; |
|||
return x.out; |
|||
} |
|||
|
|||
SEMOPS_INLINE UQI |
|||
SUBWORDDIUQI (DI in, int byte) |
|||
{ |
|||
assert (byte >= 0 && byte <= 7); |
|||
return (UQI) (in >> (8 * (7 - byte))); |
|||
} |
|||
|
|||
SEMOPS_INLINE SI |
|||
SUBWORDDISI (DI in, int word) |
|||
{ |
|||
if (word == 0) |
|||
return (UDI) in >> 32; |
|||
else |
|||
return in; |
|||
} |
|||
|
|||
SEMOPS_INLINE SI |
|||
SUBWORDDFSI (DF in, int word) |
|||
{ |
|||
/* Note: typedef UDI DF; */ |
|||
if (word == 0) |
|||
return (UDI) in >> 32; |
|||
else |
|||
return in; |
|||
} |
|||
|
|||
SEMOPS_INLINE SI |
|||
SUBWORDXFSI (XF in, int word) |
|||
{ |
|||
/* Note: typedef struct { SI parts[3]; } XF; */ |
|||
union { XF in; SI out[3]; } x; |
|||
x.in = in; |
|||
return x.out[word]; |
|||
} |
|||
|
|||
SEMOPS_INLINE SI |
|||
SUBWORDTFSI (TF in, int word) |
|||
{ |
|||
/* Note: typedef struct { SI parts[4]; } TF; */ |
|||
union { TF in; SI out[4]; } x; |
|||
x.in = in; |
|||
return x.out[word]; |
|||
} |
|||
|
|||
#endif /* SUBWORD,JOIN */ |
|||
|
|||
#endif /* CGEN_SEM_OPS_H */ |
|||
@ -0,0 +1,44 @@ |
|||
/* Type definitions for CGEN-based opcode libraries.
|
|||
Copyright (C) 2005 Free Software Foundation, Inc. |
|||
Contributed by Red Hat. |
|||
|
|||
This file is part of the GNU opcodes library. |
|||
|
|||
This program is free software; you can redistribute it and/or modify |
|||
it under the terms of the GNU General Public License as published by |
|||
the Free Software Foundation; either version 2, or (at your option) |
|||
any later version. |
|||
|
|||
This program is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
GNU General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU General Public License along |
|||
with this program; if not, write to the Free Software Foundation, Inc., |
|||
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
|||
|
|||
*/ |
|||
|
|||
#ifndef CGEN_TYPES_H |
|||
#define CGEN_TYPES_H |
|||
|
|||
#include <stdint.h> |
|||
|
|||
typedef int8_t QI; |
|||
typedef uint8_t UQI; |
|||
typedef int16_t HI; |
|||
typedef uint16_t UHI; |
|||
typedef int32_t SI; |
|||
typedef uint32_t USI; |
|||
typedef int64_t DI; |
|||
typedef uint64_t UDI; |
|||
|
|||
typedef int INT; |
|||
typedef unsigned int UINT; |
|||
|
|||
typedef float SF; |
|||
typedef double DF; |
|||
typedef long double XF, TF; |
|||
|
|||
#endif /* CGEN_TYPES_H */ |
|||
File diff suppressed because it is too large
File diff suppressed because it is too large
@ -0,0 +1,484 @@ |
|||
/* CPU data header for m32c.
|
|||
|
|||
THIS FILE IS MACHINE GENERATED WITH CGEN. |
|||
|
|||
Copyright 1996-2005 Free Software Foundation, Inc. |
|||
|
|||
This file is part of the GNU Binutils and/or GDB, the GNU debugger. |
|||
|
|||
This program is free software; you can redistribute it and/or modify |
|||
it under the terms of the GNU General Public License as published by |
|||
the Free Software Foundation; either version 2, or (at your option) |
|||
any later version. |
|||
|
|||
This program is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
GNU General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU General Public License along |
|||
with this program; if not, write to the Free Software Foundation, Inc., |
|||
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. |
|||
|
|||
*/ |
|||
|
|||
#ifndef M32C_CPU_H |
|||
#define M32C_CPU_H |
|||
|
|||
#define CGEN_ARCH m32c |
|||
|
|||
/* Given symbol S, return m32c_cgen_<S>. */ |
|||
#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) |
|||
#define CGEN_SYM(s) m32c##_cgen_##s |
|||
#else |
|||
#define CGEN_SYM(s) m32c/**/_cgen_/**/s |
|||
#endif |
|||
|
|||
|
|||
/* Selected cpu families. */ |
|||
#define HAVE_CPU_M16CBF |
|||
#define HAVE_CPU_M32CBF |
|||
|
|||
#define CGEN_INSN_LSB0_P 0 |
|||
|
|||
/* Minimum size of any insn (in bytes). */ |
|||
#define CGEN_MIN_INSN_SIZE 1 |
|||
|
|||
/* Maximum size of any insn (in bytes). */ |
|||
#define CGEN_MAX_INSN_SIZE 10 |
|||
|
|||
#define CGEN_INT_INSN_P 0 |
|||
|
|||
/* Maximum number of syntax elements in an instruction. */ |
|||
#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 26 |
|||
|
|||
/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
|
|||
e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands |
|||
we can't hash on everything up to the space. */ |
|||
#define CGEN_MNEMONIC_OPERANDS |
|||
|
|||
/* Maximum number of fields in an instruction. */ |
|||
#define CGEN_ACTUAL_MAX_IFMT_OPERANDS 13 |
|||
|
|||
/* Enums. */ |
|||
|
|||
/* Attributes. */ |
|||
|
|||
/* Enum declaration for machine type selection. */ |
|||
typedef enum mach_attr { |
|||
MACH_BASE, MACH_M16C, MACH_M32C, MACH_MAX |
|||
} MACH_ATTR; |
|||
|
|||
/* Enum declaration for instruction set selection. */ |
|||
typedef enum isa_attr { |
|||
ISA_M16C, ISA_M32C, ISA_MAX |
|||
} ISA_ATTR; |
|||
|
|||
/* Number of architecture variants. */ |
|||
#define MAX_ISAS ((int) ISA_MAX) |
|||
#define MAX_MACHS ((int) MACH_MAX) |
|||
|
|||
/* Ifield support. */ |
|||
|
|||
/* Ifield attribute indices. */ |
|||
|
|||
/* Enum declaration for cgen_ifld attrs. */ |
|||
typedef enum cgen_ifld_attr { |
|||
CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED |
|||
, CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31 |
|||
, CGEN_IFLD_MACH, CGEN_IFLD_ISA, CGEN_IFLD_END_NBOOLS |
|||
} CGEN_IFLD_ATTR; |
|||
|
|||
/* Number of non-boolean elements in cgen_ifld_attr. */ |
|||
#define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) |
|||
|
|||
/* Enum declaration for m32c ifield types. */ |
|||
typedef enum ifield_type { |
|||
M32C_F_NIL, M32C_F_ANYOF, M32C_F_0_1, M32C_F_0_2 |
|||
, M32C_F_0_3, M32C_F_0_4, M32C_F_1_3, M32C_F_2_2 |
|||
, M32C_F_3_4, M32C_F_3_1, M32C_F_4_1, M32C_F_4_3 |
|||
, M32C_F_4_4, M32C_F_4_6, M32C_F_5_1, M32C_F_5_3 |
|||
, M32C_F_6_2, M32C_F_7_1, M32C_F_8_1, M32C_F_8_2 |
|||
, M32C_F_8_3, M32C_F_8_4, M32C_F_8_8, M32C_F_9_3 |
|||
, M32C_F_9_1, M32C_F_10_1, M32C_F_10_2, M32C_F_10_3 |
|||
, M32C_F_11_1, M32C_F_12_1, M32C_F_12_2, M32C_F_12_3 |
|||
, M32C_F_12_4, M32C_F_12_6, M32C_F_13_3, M32C_F_14_1 |
|||
, M32C_F_14_2, M32C_F_15_1, M32C_F_16_1, M32C_F_16_2 |
|||
, M32C_F_16_4, M32C_F_18_1, M32C_F_18_2, M32C_F_18_3 |
|||
, M32C_F_20_1, M32C_F_20_3, M32C_F_20_2, M32C_F_20_4 |
|||
, M32C_F_21_3, M32C_F_24_2, M32C_F_SRC16_RN, M32C_F_SRC16_AN |
|||
, M32C_F_SRC32_AN_UNPREFIXED, M32C_F_SRC32_AN_PREFIXED, M32C_F_SRC32_RN_UNPREFIXED_QI, M32C_F_SRC32_RN_PREFIXED_QI |
|||
, M32C_F_SRC32_RN_UNPREFIXED_HI, M32C_F_SRC32_RN_PREFIXED_HI, M32C_F_SRC32_RN_UNPREFIXED_SI, M32C_F_SRC32_RN_PREFIXED_SI |
|||
, M32C_F_DST32_RN_EXT_UNPREFIXED, M32C_F_DST16_RN, M32C_F_DST16_RN_EXT, M32C_F_DST16_RN_QI_S |
|||
, M32C_F_DST16_AN, M32C_F_DST16_AN_S, M32C_F_DST32_AN_UNPREFIXED, M32C_F_DST32_AN_PREFIXED |
|||
, M32C_F_DST32_RN_UNPREFIXED_QI, M32C_F_DST32_RN_PREFIXED_QI, M32C_F_DST32_RN_UNPREFIXED_HI, M32C_F_DST32_RN_PREFIXED_HI |
|||
, M32C_F_DST32_RN_UNPREFIXED_SI, M32C_F_DST32_RN_PREFIXED_SI, M32C_F_DST16_1_S, M32C_F_IMM_8_S4 |
|||
, M32C_F_IMM_12_S4, M32C_F_IMM_13_U3, M32C_F_IMM_20_S4, M32C_F_IMM1_S |
|||
, M32C_F_IMM3_S, M32C_F_DSP_8_U6, M32C_F_DSP_8_U8, M32C_F_DSP_8_S8 |
|||
, M32C_F_DSP_10_U6, M32C_F_DSP_16_U8, M32C_F_DSP_16_S8, M32C_F_DSP_24_U8 |
|||
, M32C_F_DSP_24_S8, M32C_F_DSP_32_U8, M32C_F_DSP_32_S8, M32C_F_DSP_40_U8 |
|||
, M32C_F_DSP_40_S8, M32C_F_DSP_48_U8, M32C_F_DSP_48_S8, M32C_F_DSP_56_U8 |
|||
, M32C_F_DSP_56_S8, M32C_F_DSP_64_U8, M32C_F_DSP_64_S8, M32C_F_DSP_8_U16 |
|||
, M32C_F_DSP_8_S16, M32C_F_DSP_16_U16, M32C_F_DSP_16_S16, M32C_F_DSP_24_U16 |
|||
, M32C_F_DSP_24_S16, M32C_F_DSP_32_U16, M32C_F_DSP_32_S16, M32C_F_DSP_40_U16 |
|||
, M32C_F_DSP_40_S16, M32C_F_DSP_48_U16, M32C_F_DSP_48_S16, M32C_F_DSP_64_U16 |
|||
, M32C_F_DSP_16_U24, M32C_F_DSP_24_U24, M32C_F_DSP_32_U24, M32C_F_DSP_40_U24 |
|||
, M32C_F_DSP_40_S32, M32C_F_DSP_48_U24, M32C_F_DSP_16_S32, M32C_F_DSP_24_S32 |
|||
, M32C_F_DSP_32_S32, M32C_F_DSP_48_U32, M32C_F_DSP_48_S32, M32C_F_DSP_56_S16 |
|||
, M32C_F_DSP_64_S16, M32C_F_BITNO16_S, M32C_F_BITNO32_PREFIXED, M32C_F_BITNO32_UNPREFIXED |
|||
, M32C_F_BITBASE16_U11_S, M32C_F_BITBASE32_16_U11_UNPREFIXED, M32C_F_BITBASE32_16_S11_UNPREFIXED, M32C_F_BITBASE32_16_U19_UNPREFIXED |
|||
, M32C_F_BITBASE32_16_S19_UNPREFIXED, M32C_F_BITBASE32_16_U27_UNPREFIXED, M32C_F_BITBASE32_24_U11_PREFIXED, M32C_F_BITBASE32_24_S11_PREFIXED |
|||
, M32C_F_BITBASE32_24_U19_PREFIXED, M32C_F_BITBASE32_24_S19_PREFIXED, M32C_F_BITBASE32_24_U27_PREFIXED, M32C_F_LAB_5_3 |
|||
, M32C_F_LAB32_JMP_S, M32C_F_LAB_8_8, M32C_F_LAB_8_16, M32C_F_LAB_8_24 |
|||
, M32C_F_LAB_16_8, M32C_F_LAB_24_8, M32C_F_LAB_32_8, M32C_F_LAB_40_8 |
|||
, M32C_F_COND16, M32C_F_COND16J_5, M32C_F_COND32, M32C_F_COND32J |
|||
, M32C_F_MAX |
|||
} IFIELD_TYPE; |
|||
|
|||
#define MAX_IFLD ((int) M32C_F_MAX) |
|||
|
|||
/* Hardware attribute indices. */ |
|||
|
|||
/* Enum declaration for cgen_hw attrs. */ |
|||
typedef enum cgen_hw_attr { |
|||
CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE |
|||
, CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_ISA |
|||
, CGEN_HW_END_NBOOLS |
|||
} CGEN_HW_ATTR; |
|||
|
|||
/* Number of non-boolean elements in cgen_hw_attr. */ |
|||
#define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) |
|||
|
|||
/* Enum declaration for m32c hardware types. */ |
|||
typedef enum cgen_hw_type { |
|||
HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR |
|||
, HW_H_IADDR, HW_H_PC, HW_H_GR, HW_H_GR_QI |
|||
, HW_H_GR_HI, HW_H_GR_SI, HW_H_GR_EXT_QI, HW_H_GR_EXT_HI |
|||
, HW_H_R0L, HW_H_R0H, HW_H_R1L, HW_H_R1H |
|||
, HW_H_R0, HW_H_R1, HW_H_R2, HW_H_R3 |
|||
, HW_H_R0L_R0H, HW_H_R2R0, HW_H_R3R1, HW_H_R1R2R0 |
|||
, HW_H_AR, HW_H_AR_QI, HW_H_AR_HI, HW_H_AR_SI |
|||
, HW_H_A0, HW_H_A1, HW_H_SB, HW_H_FB |
|||
, HW_H_SP, HW_H_SBIT, HW_H_ZBIT, HW_H_OBIT |
|||
, HW_H_CBIT, HW_H_UBIT, HW_H_IBIT, HW_H_BBIT |
|||
, HW_H_DBIT, HW_H_DCT0, HW_H_DCT1, HW_H_SVF |
|||
, HW_H_DRC0, HW_H_DRC1, HW_H_DMD0, HW_H_DMD1 |
|||
, HW_H_INTB, HW_H_SVP, HW_H_VCT, HW_H_ISP |
|||
, HW_H_DMA0, HW_H_DMA1, HW_H_DRA0, HW_H_DRA1 |
|||
, HW_H_DSA0, HW_H_DSA1, HW_H_COND16, HW_H_COND16C |
|||
, HW_H_COND16J, HW_H_COND16J_5, HW_H_COND32, HW_H_CR1_32 |
|||
, HW_H_CR2_32, HW_H_CR3_32, HW_H_CR_16, HW_H_FLAGS |
|||
, HW_H_SHIMM, HW_H_BIT_INDEX, HW_H_SRC_INDEX, HW_H_DST_INDEX |
|||
, HW_H_SRC_INDIRECT, HW_H_DST_INDIRECT, HW_H_NONE, HW_MAX |
|||
} CGEN_HW_TYPE; |
|||
|
|||
#define MAX_HW ((int) HW_MAX) |
|||
|
|||
/* Operand attribute indices. */ |
|||
|
|||
/* Enum declaration for cgen_operand attrs. */ |
|||
typedef enum cgen_operand_attr { |
|||
CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT |
|||
, CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY |
|||
, CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_ISA |
|||
, CGEN_OPERAND_END_NBOOLS |
|||
} CGEN_OPERAND_ATTR; |
|||
|
|||
/* Number of non-boolean elements in cgen_operand_attr. */ |
|||
#define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) |
|||
|
|||
/* Enum declaration for m32c operand types. */ |
|||
typedef enum cgen_operand_type { |
|||
M32C_OPERAND_PC, M32C_OPERAND_SRC16RNQI, M32C_OPERAND_SRC16RNHI, M32C_OPERAND_SRC32RNUNPREFIXEDQI |
|||
, M32C_OPERAND_SRC32RNUNPREFIXEDHI, M32C_OPERAND_SRC32RNUNPREFIXEDSI, M32C_OPERAND_SRC32RNPREFIXEDQI, M32C_OPERAND_SRC32RNPREFIXEDHI |
|||
, M32C_OPERAND_SRC32RNPREFIXEDSI, M32C_OPERAND_SRC16AN, M32C_OPERAND_SRC16ANQI, M32C_OPERAND_SRC16ANHI |
|||
, M32C_OPERAND_SRC32ANUNPREFIXED, M32C_OPERAND_SRC32ANUNPREFIXEDQI, M32C_OPERAND_SRC32ANUNPREFIXEDHI, M32C_OPERAND_SRC32ANUNPREFIXEDSI |
|||
, M32C_OPERAND_SRC32ANPREFIXED, M32C_OPERAND_SRC32ANPREFIXEDQI, M32C_OPERAND_SRC32ANPREFIXEDHI, M32C_OPERAND_SRC32ANPREFIXEDSI |
|||
, M32C_OPERAND_DST16RNQI, M32C_OPERAND_DST16RNHI, M32C_OPERAND_DST16RNSI, M32C_OPERAND_DST16RNEXTQI |
|||
, M32C_OPERAND_DST32R0QI_S, M32C_OPERAND_DST32R0HI_S, M32C_OPERAND_DST32RNUNPREFIXEDQI, M32C_OPERAND_DST32RNUNPREFIXEDHI |
|||
, M32C_OPERAND_DST32RNUNPREFIXEDSI, M32C_OPERAND_DST32RNEXTUNPREFIXEDQI, M32C_OPERAND_DST32RNEXTUNPREFIXEDHI, M32C_OPERAND_DST32RNPREFIXEDQI |
|||
, M32C_OPERAND_DST32RNPREFIXEDHI, M32C_OPERAND_DST32RNPREFIXEDSI, M32C_OPERAND_DST16RNQI_S, M32C_OPERAND_DST16ANQI_S |
|||
, M32C_OPERAND_BIT16RN, M32C_OPERAND_BIT32RNPREFIXED, M32C_OPERAND_BIT32RNUNPREFIXED, M32C_OPERAND_R0 |
|||
, M32C_OPERAND_R1, M32C_OPERAND_R2, M32C_OPERAND_R3, M32C_OPERAND_R0L |
|||
, M32C_OPERAND_R0H, M32C_OPERAND_R2R0, M32C_OPERAND_R3R1, M32C_OPERAND_R1R2R0 |
|||
, M32C_OPERAND_DST16AN, M32C_OPERAND_DST16ANQI, M32C_OPERAND_DST16ANHI, M32C_OPERAND_DST16ANSI |
|||
, M32C_OPERAND_DST16AN_S, M32C_OPERAND_DST32ANUNPREFIXED, M32C_OPERAND_DST32ANUNPREFIXEDQI, M32C_OPERAND_DST32ANUNPREFIXEDHI |
|||
, M32C_OPERAND_DST32ANUNPREFIXEDSI, M32C_OPERAND_DST32ANEXTUNPREFIXED, M32C_OPERAND_DST32ANPREFIXED, M32C_OPERAND_DST32ANPREFIXEDQI |
|||
, M32C_OPERAND_DST32ANPREFIXEDHI, M32C_OPERAND_DST32ANPREFIXEDSI, M32C_OPERAND_BIT16AN, M32C_OPERAND_BIT32ANPREFIXED |
|||
, M32C_OPERAND_BIT32ANUNPREFIXED, M32C_OPERAND_A0, M32C_OPERAND_A1, M32C_OPERAND_SB |
|||
, M32C_OPERAND_FB, M32C_OPERAND_SP, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, M32C_OPERAND_REGSETPOP |
|||
, M32C_OPERAND_REGSETPUSH, M32C_OPERAND_RN16_PUSH_S, M32C_OPERAND_AN16_PUSH_S, M32C_OPERAND_DSP_8_U6 |
|||
, M32C_OPERAND_DSP_8_U8, M32C_OPERAND_DSP_8_U16, M32C_OPERAND_DSP_8_S8, M32C_OPERAND_DSP_10_U6 |
|||
, M32C_OPERAND_DSP_16_U8, M32C_OPERAND_DSP_16_U16, M32C_OPERAND_DSP_16_U20, M32C_OPERAND_DSP_16_U24 |
|||
, M32C_OPERAND_DSP_16_S8, M32C_OPERAND_DSP_16_S16, M32C_OPERAND_DSP_24_U8, M32C_OPERAND_DSP_24_U16 |
|||
, M32C_OPERAND_DSP_24_U20, M32C_OPERAND_DSP_24_U24, M32C_OPERAND_DSP_24_S8, M32C_OPERAND_DSP_24_S16 |
|||
, M32C_OPERAND_DSP_32_U8, M32C_OPERAND_DSP_32_U16, M32C_OPERAND_DSP_32_U24, M32C_OPERAND_DSP_32_U20 |
|||
, M32C_OPERAND_DSP_32_S8, M32C_OPERAND_DSP_32_S16, M32C_OPERAND_DSP_40_U8, M32C_OPERAND_DSP_40_S8 |
|||
, M32C_OPERAND_DSP_40_U16, M32C_OPERAND_DSP_40_S16, M32C_OPERAND_DSP_40_U24, M32C_OPERAND_DSP_48_U8 |
|||
, M32C_OPERAND_DSP_48_S8, M32C_OPERAND_DSP_48_U16, M32C_OPERAND_DSP_48_S16, M32C_OPERAND_DSP_48_U24 |
|||
, M32C_OPERAND_IMM_8_S4, M32C_OPERAND_IMM_SH_8_S4, M32C_OPERAND_IMM_8_QI, M32C_OPERAND_IMM_8_HI |
|||
, M32C_OPERAND_IMM_12_S4, M32C_OPERAND_IMM_SH_12_S4, M32C_OPERAND_IMM_13_U3, M32C_OPERAND_IMM_20_S4 |
|||
, M32C_OPERAND_IMM_SH_20_S4, M32C_OPERAND_IMM_16_QI, M32C_OPERAND_IMM_16_HI, M32C_OPERAND_IMM_16_SI |
|||
, M32C_OPERAND_IMM_24_QI, M32C_OPERAND_IMM_24_HI, M32C_OPERAND_IMM_24_SI, M32C_OPERAND_IMM_32_QI |
|||
, M32C_OPERAND_IMM_32_SI, M32C_OPERAND_IMM_32_HI, M32C_OPERAND_IMM_40_QI, M32C_OPERAND_IMM_40_HI |
|||
, M32C_OPERAND_IMM_40_SI, M32C_OPERAND_IMM_48_QI, M32C_OPERAND_IMM_48_HI, M32C_OPERAND_IMM_48_SI |
|||
, M32C_OPERAND_IMM_56_QI, M32C_OPERAND_IMM_56_HI, M32C_OPERAND_IMM_64_HI, M32C_OPERAND_IMM1_S |
|||
, M32C_OPERAND_IMM3_S, M32C_OPERAND_BITNO16R, M32C_OPERAND_BITNO32PREFIXED, M32C_OPERAND_BITNO32UNPREFIXED |
|||
, M32C_OPERAND_BITBASE16_16_U8, M32C_OPERAND_BITBASE16_16_S8, M32C_OPERAND_BITBASE16_16_U16, M32C_OPERAND_BITBASE16_8_U11_S |
|||
, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED |
|||
, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, M32C_OPERAND_BITBASE32_24_U19_PREFIXED |
|||
, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, M32C_OPERAND_LAB_5_3, M32C_OPERAND_LAB32_JMP_S |
|||
, M32C_OPERAND_LAB_8_8, M32C_OPERAND_LAB_8_16, M32C_OPERAND_LAB_8_24, M32C_OPERAND_LAB_16_8 |
|||
, M32C_OPERAND_LAB_24_8, M32C_OPERAND_LAB_32_8, M32C_OPERAND_LAB_40_8, M32C_OPERAND_SBIT |
|||
, M32C_OPERAND_OBIT, M32C_OPERAND_ZBIT, M32C_OPERAND_CBIT, M32C_OPERAND_UBIT |
|||
, M32C_OPERAND_IBIT, M32C_OPERAND_BBIT, M32C_OPERAND_DBIT, M32C_OPERAND_COND16_16 |
|||
, M32C_OPERAND_COND16_24, M32C_OPERAND_COND16_32, M32C_OPERAND_COND32_16, M32C_OPERAND_COND32_24 |
|||
, M32C_OPERAND_COND32_32, M32C_OPERAND_COND32_40, M32C_OPERAND_COND16C, M32C_OPERAND_COND16J |
|||
, M32C_OPERAND_COND16J5, M32C_OPERAND_COND32, M32C_OPERAND_COND32J, M32C_OPERAND_SCCOND32 |
|||
, M32C_OPERAND_FLAGS16, M32C_OPERAND_FLAGS32, M32C_OPERAND_CR16, M32C_OPERAND_CR1_UNPREFIXED_32 |
|||
, M32C_OPERAND_CR1_PREFIXED_32, M32C_OPERAND_CR2_32, M32C_OPERAND_CR3_UNPREFIXED_32, M32C_OPERAND_CR3_PREFIXED_32 |
|||
, M32C_OPERAND_Z, M32C_OPERAND_S, M32C_OPERAND_Q, M32C_OPERAND_G |
|||
, M32C_OPERAND_X, M32C_OPERAND_SIZE, M32C_OPERAND_BITINDEX, M32C_OPERAND_SRCINDEX |
|||
, M32C_OPERAND_DSTINDEX, M32C_OPERAND_NOREMAINDER, M32C_OPERAND_SRC16_RN_DIRECT_QI, M32C_OPERAND_SRC16_RN_DIRECT_HI |
|||
, M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_QI, M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_HI |
|||
, M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_AN_DIRECT_QI, M32C_OPERAND_SRC16_AN_DIRECT_HI |
|||
, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_QI |
|||
, M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_AN_INDIRECT_QI, M32C_OPERAND_SRC16_AN_INDIRECT_HI |
|||
, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_SI, M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_QI |
|||
, M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_16_8_SB_RELATIVE_QI, M32C_OPERAND_SRC16_16_16_SB_RELATIVE_QI |
|||
, M32C_OPERAND_SRC16_16_8_FB_RELATIVE_QI, M32C_OPERAND_SRC16_16_8_AN_RELATIVE_QI, M32C_OPERAND_SRC16_16_16_AN_RELATIVE_QI, M32C_OPERAND_SRC16_16_8_SB_RELATIVE_HI |
|||
, M32C_OPERAND_SRC16_16_16_SB_RELATIVE_HI, M32C_OPERAND_SRC16_16_8_FB_RELATIVE_HI, M32C_OPERAND_SRC16_16_8_AN_RELATIVE_HI, M32C_OPERAND_SRC16_16_16_AN_RELATIVE_HI |
|||
, M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI |
|||
, M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI |
|||
, M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI |
|||
, M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI |
|||
, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI |
|||
, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_QI |
|||
, M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_QI |
|||
, M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_HI |
|||
, M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_SI |
|||
, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_SI |
|||
, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC16_16_16_ABSOLUTE_QI, M32C_OPERAND_SRC16_16_16_ABSOLUTE_HI |
|||
, M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI |
|||
, M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_QI |
|||
, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_SI |
|||
, M32C_OPERAND_SRC16_2_S_8_SB_RELATIVE_QI, M32C_OPERAND_SRC16_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_SRC16_2_S_16_ABSOLUTE_QI, M32C_OPERAND_SRC32_2_S_8_SB_RELATIVE_QI |
|||
, M32C_OPERAND_SRC32_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_SRC32_2_S_16_ABSOLUTE_QI, M32C_OPERAND_SRC32_2_S_8_SB_RELATIVE_HI, M32C_OPERAND_SRC32_2_S_8_FB_RELATIVE_HI |
|||
, M32C_OPERAND_SRC32_2_S_16_ABSOLUTE_HI, M32C_OPERAND_DST16_RN_DIRECT_QI, M32C_OPERAND_DST16_RN_DIRECT_HI, M32C_OPERAND_DST16_RN_DIRECT_SI |
|||
, M32C_OPERAND_DST16_RN_DIRECT_EXT_QI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_QI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_HI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_SI, M32C_OPERAND_DST32_RN_DIRECT_EXTUNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_RN_DIRECT_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_R3_DIRECT_UNPREFIXED_HI, M32C_OPERAND_DST16_AN_DIRECT_QI, M32C_OPERAND_DST16_AN_DIRECT_HI |
|||
, M32C_OPERAND_DST16_AN_DIRECT_SI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_QI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_HI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_SI, M32C_OPERAND_DST16_AN_INDIRECT_QI |
|||
, M32C_OPERAND_DST16_AN_INDIRECT_HI, M32C_OPERAND_DST16_AN_INDIRECT_SI, M32C_OPERAND_DST16_AN_INDIRECT_EXT_QI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_HI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_SI, M32C_OPERAND_DST32_AN_INDIRECT_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_EXTUNPREFIXED_HI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_QI |
|||
, M32C_OPERAND_DST16_16_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_QI |
|||
, M32C_OPERAND_DST16_24_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_24_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_24_8_AN_RELATIVE_QI |
|||
, M32C_OPERAND_DST16_24_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_32_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_32_8_FB_RELATIVE_QI |
|||
, M32C_OPERAND_DST16_32_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_40_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_40_16_SB_RELATIVE_QI |
|||
, M32C_OPERAND_DST16_40_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_40_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_48_8_SB_RELATIVE_QI |
|||
, M32C_OPERAND_DST16_48_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_48_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_48_16_AN_RELATIVE_QI |
|||
, M32C_OPERAND_DST16_16_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_HI |
|||
, M32C_OPERAND_DST16_16_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_24_8_FB_RELATIVE_HI |
|||
, M32C_OPERAND_DST16_24_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_32_16_SB_RELATIVE_HI |
|||
, M32C_OPERAND_DST16_32_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_40_8_SB_RELATIVE_HI |
|||
, M32C_OPERAND_DST16_40_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_40_16_AN_RELATIVE_HI |
|||
, M32C_OPERAND_DST16_48_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_48_8_AN_RELATIVE_HI |
|||
, M32C_OPERAND_DST16_48_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_SI |
|||
, M32C_OPERAND_DST16_16_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_SI |
|||
, M32C_OPERAND_DST16_24_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_24_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_SI |
|||
, M32C_OPERAND_DST16_32_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_32_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_SI |
|||
, M32C_OPERAND_DST16_40_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_40_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_SI |
|||
, M32C_OPERAND_DST16_40_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_48_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_SI |
|||
, M32C_OPERAND_DST16_48_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_48_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_EXT_QI |
|||
, M32C_OPERAND_DST16_16_8_FB_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_EXT_QI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_QI |
|||
, M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_QI |
|||
, M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_QI |
|||
, M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_QI |
|||
, M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_QI |
|||
, M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_QI |
|||
, M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_QI |
|||
, M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_HI |
|||
, M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_HI |
|||
, M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_HI |
|||
, M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_HI |
|||
, M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_HI |
|||
, M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_HI |
|||
, M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_HI |
|||
, M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_SI |
|||
, M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_SI |
|||
, M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_SI |
|||
, M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_SI |
|||
, M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_SI |
|||
, M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_SI |
|||
, M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_SI |
|||
, M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST16_16_16_ABSOLUTE_QI, M32C_OPERAND_DST16_24_16_ABSOLUTE_QI, M32C_OPERAND_DST16_32_16_ABSOLUTE_QI |
|||
, M32C_OPERAND_DST16_40_16_ABSOLUTE_QI, M32C_OPERAND_DST16_48_16_ABSOLUTE_QI, M32C_OPERAND_DST16_16_16_ABSOLUTE_HI, M32C_OPERAND_DST16_24_16_ABSOLUTE_HI |
|||
, M32C_OPERAND_DST16_32_16_ABSOLUTE_HI, M32C_OPERAND_DST16_40_16_ABSOLUTE_HI, M32C_OPERAND_DST16_48_16_ABSOLUTE_HI, M32C_OPERAND_DST16_16_16_ABSOLUTE_SI |
|||
, M32C_OPERAND_DST16_24_16_ABSOLUTE_SI, M32C_OPERAND_DST16_32_16_ABSOLUTE_SI, M32C_OPERAND_DST16_40_16_ABSOLUTE_SI, M32C_OPERAND_DST16_48_16_ABSOLUTE_SI |
|||
, M32C_OPERAND_DST16_16_16_ABSOLUTE_EXT_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_QI |
|||
, M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_QI |
|||
, M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_HI |
|||
, M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_HI |
|||
, M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_SI |
|||
, M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_SI |
|||
, M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_HI, M32C_OPERAND_BIT16_RN_DIRECT, M32C_OPERAND_BIT32_RN_DIRECT_UNPREFIXED, M32C_OPERAND_BIT32_RN_DIRECT_PREFIXED |
|||
, M32C_OPERAND_BIT16_AN_DIRECT, M32C_OPERAND_BIT32_AN_DIRECT_UNPREFIXED, M32C_OPERAND_BIT32_AN_DIRECT_PREFIXED, M32C_OPERAND_BIT16_AN_INDIRECT |
|||
, M32C_OPERAND_BIT32_AN_INDIRECT_UNPREFIXED, M32C_OPERAND_BIT32_AN_INDIRECT_PREFIXED, M32C_OPERAND_BIT16_16_8_SB_RELATIVE, M32C_OPERAND_BIT16_16_16_SB_RELATIVE |
|||
, M32C_OPERAND_BIT16_16_8_FB_RELATIVE, M32C_OPERAND_BIT16_16_8_AN_RELATIVE, M32C_OPERAND_BIT16_16_16_AN_RELATIVE, M32C_OPERAND_BIT32_16_11_SB_RELATIVE_UNPREFIXED |
|||
, M32C_OPERAND_BIT32_16_19_SB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_11_FB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_19_FB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_11_AN_RELATIVE_UNPREFIXED |
|||
, M32C_OPERAND_BIT32_16_19_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_27_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_24_11_SB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_19_SB_RELATIVE_PREFIXED |
|||
, M32C_OPERAND_BIT32_24_11_FB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_19_FB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_11_AN_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_19_AN_RELATIVE_PREFIXED |
|||
, M32C_OPERAND_BIT32_24_27_AN_RELATIVE_PREFIXED, M32C_OPERAND_BIT16_11_SB_RELATIVE_S, M32C_OPERAND_RN16_PUSH_S_DERIVED, M32C_OPERAND_AN16_PUSH_S_DERIVED |
|||
, M32C_OPERAND_BIT16_16_16_ABSOLUTE, M32C_OPERAND_BIT32_16_19_ABSOLUTE_UNPREFIXED, M32C_OPERAND_BIT32_16_27_ABSOLUTE_UNPREFIXED, M32C_OPERAND_BIT32_24_19_ABSOLUTE_PREFIXED |
|||
, M32C_OPERAND_BIT32_24_27_ABSOLUTE_PREFIXED, M32C_OPERAND_DST16_3_S_R0L_DIRECT_QI, M32C_OPERAND_DST16_3_S_R0H_DIRECT_QI, M32C_OPERAND_DST16_3_S_8_8_SB_RELATIVE_QI |
|||
, M32C_OPERAND_DST16_3_S_8_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_8_16_ABSOLUTE_QI, M32C_OPERAND_DST16_3_S_16_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_16_8_FB_RELATIVE_QI |
|||
, M32C_OPERAND_DST16_3_S_16_16_ABSOLUTE_QI, M32C_OPERAND_SRCDST16_R0L_R0H_S_DERIVED, M32C_OPERAND_DST32_2_S_R0L_DIRECT_QI, M32C_OPERAND_DST32_2_S_R0_DIRECT_HI |
|||
, M32C_OPERAND_DST32_1_S_A0_DIRECT_HI, M32C_OPERAND_DST32_1_S_A1_DIRECT_HI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_QI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_QI |
|||
, M32C_OPERAND_DST32_2_S_16_ABSOLUTE_QI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_HI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_HI, M32C_OPERAND_DST32_2_S_16_ABSOLUTE_HI |
|||
, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_SI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_SI, M32C_OPERAND_DST32_2_S_16_ABSOLUTE_SI, M32C_OPERAND_SRC16_BASIC_QI |
|||
, M32C_OPERAND_SRC16_BASIC_HI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_QI, M32C_OPERAND_SRC32_BASIC_PREFIXED_QI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_HI |
|||
, M32C_OPERAND_SRC32_BASIC_PREFIXED_HI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_SI, M32C_OPERAND_SRC32_BASIC_PREFIXED_SI, M32C_OPERAND_SRC32_BASIC_EXTPREFIXED_QI |
|||
, M32C_OPERAND_SRC16_16_8_QI, M32C_OPERAND_SRC16_16_16_QI, M32C_OPERAND_SRC16_16_8_HI, M32C_OPERAND_SRC16_16_16_HI |
|||
, M32C_OPERAND_SRC32_16_8_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_UNPREFIXED_HI |
|||
, M32C_OPERAND_SRC32_16_16_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_UNPREFIXED_SI |
|||
, M32C_OPERAND_SRC32_16_24_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_8_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_PREFIXED_QI, M32C_OPERAND_SRC32_24_24_PREFIXED_QI |
|||
, M32C_OPERAND_SRC32_24_8_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_PREFIXED_SI |
|||
, M32C_OPERAND_SRC32_24_16_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_PREFIXED_SI, M32C_OPERAND_DST16_BASIC_QI, M32C_OPERAND_DST16_BASIC_HI |
|||
, M32C_OPERAND_DST16_BASIC_SI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_QI, M32C_OPERAND_DST32_BASIC_PREFIXED_QI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_BASIC_PREFIXED_HI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_SI, M32C_OPERAND_DST32_BASIC_PREFIXED_SI, M32C_OPERAND_DST16_16_QI |
|||
, M32C_OPERAND_DST16_16_8_QI, M32C_OPERAND_DST16_16_16_QI, M32C_OPERAND_DST16_16_HI, M32C_OPERAND_DST16_16_8_HI |
|||
, M32C_OPERAND_DST16_16_16_HI, M32C_OPERAND_DST16_16_SI, M32C_OPERAND_DST16_16_8_SI, M32C_OPERAND_DST16_16_16_SI |
|||
, M32C_OPERAND_DST16_16_EXT_QI, M32C_OPERAND_DST16_AN_INDIRECT_MOVA_HI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_MOVA_HI |
|||
, M32C_OPERAND_DST16_16_8_SB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_16_ABSOLUTE_MOVA_HI |
|||
, M32C_OPERAND_DST16_16_MOVA_HI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_MOVA_SI |
|||
, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_MOVA_SI |
|||
, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_UNPREFIXED_MOVA_SI |
|||
, M32C_OPERAND_DST32_16_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_UNPREFIXED_QI |
|||
, M32C_OPERAND_DST32_16_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_UNPREFIXED_HI |
|||
, M32C_OPERAND_DST32_16_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_16_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_UNPREFIXED_MULEX_HI, M32C_OPERAND_DST16_24_QI |
|||
, M32C_OPERAND_DST16_24_HI, M32C_OPERAND_DST32_24_UNPREFIXED_QI, M32C_OPERAND_DST32_24_PREFIXED_QI, M32C_OPERAND_DST32_24_8_PREFIXED_QI |
|||
, M32C_OPERAND_DST32_24_16_PREFIXED_QI, M32C_OPERAND_DST32_24_24_PREFIXED_QI, M32C_OPERAND_DST32_24_UNPREFIXED_HI, M32C_OPERAND_DST32_24_PREFIXED_HI |
|||
, M32C_OPERAND_DST32_24_8_PREFIXED_HI, M32C_OPERAND_DST32_24_16_PREFIXED_HI, M32C_OPERAND_DST32_24_24_PREFIXED_HI, M32C_OPERAND_DST32_24_UNPREFIXED_SI |
|||
, M32C_OPERAND_DST32_24_PREFIXED_SI, M32C_OPERAND_DST32_24_8_PREFIXED_SI, M32C_OPERAND_DST32_24_16_PREFIXED_SI, M32C_OPERAND_DST32_24_24_PREFIXED_SI |
|||
, M32C_OPERAND_DST16_32_QI, M32C_OPERAND_DST16_32_HI, M32C_OPERAND_DST32_32_UNPREFIXED_QI, M32C_OPERAND_DST32_32_PREFIXED_QI |
|||
, M32C_OPERAND_DST32_32_UNPREFIXED_HI, M32C_OPERAND_DST32_32_PREFIXED_HI, M32C_OPERAND_DST32_32_UNPREFIXED_SI, M32C_OPERAND_DST32_32_PREFIXED_SI |
|||
, M32C_OPERAND_DST32_40_UNPREFIXED_QI, M32C_OPERAND_DST32_40_PREFIXED_QI, M32C_OPERAND_DST32_40_UNPREFIXED_HI, M32C_OPERAND_DST32_40_PREFIXED_HI |
|||
, M32C_OPERAND_DST32_40_UNPREFIXED_SI, M32C_OPERAND_DST32_40_PREFIXED_SI, M32C_OPERAND_DST32_48_PREFIXED_QI, M32C_OPERAND_DST32_48_PREFIXED_HI |
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, M32C_OPERAND_DST32_48_PREFIXED_SI, M32C_OPERAND_BIT16_16, M32C_OPERAND_BIT16_16_BASIC, M32C_OPERAND_BIT16_16_8 |
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, M32C_OPERAND_BIT16_16_16, M32C_OPERAND_BIT32_16_UNPREFIXED, M32C_OPERAND_BIT32_24_PREFIXED, M32C_OPERAND_BIT32_BASIC_UNPREFIXED |
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, M32C_OPERAND_BIT32_16_8_UNPREFIXED, M32C_OPERAND_BIT32_16_16_UNPREFIXED, M32C_OPERAND_BIT32_16_24_UNPREFIXED, M32C_OPERAND_SRC16_2_S |
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, M32C_OPERAND_SRC32_2_S_QI, M32C_OPERAND_SRC32_2_S_HI, M32C_OPERAND_DST16_3_S_8, M32C_OPERAND_DST16_3_S_16 |
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, M32C_OPERAND_SRCDST16_R0L_R0H_S, M32C_OPERAND_DST32_2_S_BASIC_QI, M32C_OPERAND_DST32_2_S_BASIC_HI, M32C_OPERAND_DST32_2_S_8_QI |
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, M32C_OPERAND_DST32_2_S_16_QI, M32C_OPERAND_DST32_2_S_8_HI, M32C_OPERAND_DST32_2_S_16_HI, M32C_OPERAND_DST32_2_S_8_SI |
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, M32C_OPERAND_DST32_2_S_16_SI, M32C_OPERAND_DST32_AN_S, M32C_OPERAND_BIT16_11_S, M32C_OPERAND_RN16_PUSH_S_ANYOF |
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, M32C_OPERAND_AN16_PUSH_S_ANYOF, M32C_OPERAND_MAX |
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} CGEN_OPERAND_TYPE; |
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|
|||
/* Number of operands types. */ |
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#define MAX_OPERANDS 869 |
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|
|||
/* Maximum number of operands referenced by any insn. */ |
|||
#define MAX_OPERAND_INSTANCES 8 |
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|
|||
/* Insn attribute indices. */ |
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|
|||
/* Enum declaration for cgen_insn attrs. */ |
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typedef enum cgen_insn_attr { |
|||
CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI |
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, CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED |
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, CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31 |
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, CGEN_INSN_MACH, CGEN_INSN_ISA, CGEN_INSN_END_NBOOLS |
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} CGEN_INSN_ATTR; |
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|
|||
/* Number of non-boolean elements in cgen_insn_attr. */ |
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#define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) |
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|
|||
/* cgen.h uses things we just defined. */ |
|||
#include "opcode/cgen.h" |
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|
|||
extern const struct cgen_ifld m32c_cgen_ifld_table[]; |
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|
|||
/* Attributes. */ |
|||
extern const CGEN_ATTR_TABLE m32c_cgen_hardware_attr_table[]; |
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extern const CGEN_ATTR_TABLE m32c_cgen_ifield_attr_table[]; |
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extern const CGEN_ATTR_TABLE m32c_cgen_operand_attr_table[]; |
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extern const CGEN_ATTR_TABLE m32c_cgen_insn_attr_table[]; |
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|
|||
/* Hardware decls. */ |
|||
|
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_gr; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_gr_QI; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_gr_HI; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_gr_SI; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_gr_ext_QI; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_gr_ext_HI; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_r0l; |
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extern CGEN_KEYWORD m32c_cgen_opval_h_r0h; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_r1l; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_r1h; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_r0; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_r1; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_r2; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_r3; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_r0l_r0h; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_r2r0; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_r3r1; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_r1r2r0; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_ar; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_ar_QI; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_ar_HI; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_ar_SI; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_a0; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_a1; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_cond16; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_cond16c; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_cond16j; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_cond16j_5; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_cond32; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_cr1_32; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_cr2_32; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_cr3_32; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_cr_16; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_flags; |
|||
extern CGEN_KEYWORD m32c_cgen_opval_h_shimm; |
|||
|
|||
extern const CGEN_HW_ENTRY m32c_cgen_hw_table[]; |
|||
|
|||
|
|||
|
|||
#endif /* M32C_CPU_H */ |
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Reference in new issue