Browse Source

Mark generated cgen files read-only

* cgen.sh: Mark generated files read-only.
	* epiphany-asm.c: Regenerate.
	* epiphany-desc.c: Regenerate.
	* epiphany-desc.h: Regenerate.
	* epiphany-dis.c: Regenerate.
	* epiphany-ibld.c: Regenerate.
	* epiphany-opc.c: Regenerate.
	* epiphany-opc.h: Regenerate.
	* fr30-asm.c: Regenerate.
	* fr30-desc.c: Regenerate.
	* fr30-desc.h: Regenerate.
	* fr30-dis.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* fr30-opc.c: Regenerate.
	* fr30-opc.h: Regenerate.
	* frv-asm.c: Regenerate.
	* frv-desc.c: Regenerate.
	* frv-desc.h: Regenerate.
	* frv-dis.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* frv-opc.c: Regenerate.
	* frv-opc.h: Regenerate.
	* ip2k-asm.c: Regenerate.
	* ip2k-desc.c: Regenerate.
	* ip2k-desc.h: Regenerate.
	* ip2k-dis.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* ip2k-opc.c: Regenerate.
	* ip2k-opc.h: Regenerate.
	* iq2000-asm.c: Regenerate.
	* iq2000-desc.c: Regenerate.
	* iq2000-desc.h: Regenerate.
	* iq2000-dis.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* iq2000-opc.c: Regenerate.
	* iq2000-opc.h: Regenerate.
	* lm32-asm.c: Regenerate.
	* lm32-desc.c: Regenerate.
	* lm32-desc.h: Regenerate.
	* lm32-dis.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* lm32-opc.c: Regenerate.
	* lm32-opc.h: Regenerate.
	* lm32-opinst.c: Regenerate.
	* m32c-asm.c: Regenerate.
	* m32c-desc.c: Regenerate.
	* m32c-desc.h: Regenerate.
	* m32c-dis.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32c-opc.c: Regenerate.
	* m32c-opc.h: Regenerate.
	* m32r-asm.c: Regenerate.
	* m32r-desc.c: Regenerate.
	* m32r-desc.h: Regenerate.
	* m32r-dis.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* m32r-opc.c: Regenerate.
	* m32r-opc.h: Regenerate.
	* m32r-opinst.c: Regenerate.
	* mep-asm.c: Regenerate.
	* mep-desc.c: Regenerate.
	* mep-desc.h: Regenerate.
	* mep-dis.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mep-opc.c: Regenerate.
	* mep-opc.h: Regenerate.
	* mt-asm.c: Regenerate.
	* mt-desc.c: Regenerate.
	* mt-desc.h: Regenerate.
	* mt-dis.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* mt-opc.c: Regenerate.
	* mt-opc.h: Regenerate.
	* or1k-asm.c: Regenerate.
	* or1k-desc.c: Regenerate.
	* or1k-desc.h: Regenerate.
	* or1k-dis.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* or1k-opc.c: Regenerate.
	* or1k-opc.h: Regenerate.
	* or1k-opinst.c: Regenerate.
	* xc16x-asm.c: Regenerate.
	* xc16x-desc.c: Regenerate.
	* xc16x-desc.h: Regenerate.
	* xc16x-dis.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xc16x-opc.c: Regenerate.
	* xc16x-opc.h: Regenerate.
	* xstormy16-asm.c: Regenerate.
	* xstormy16-desc.c: Regenerate.
	* xstormy16-desc.h: Regenerate.
	* xstormy16-dis.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.
	* xstormy16-opc.c: Regenerate.
	* xstormy16-opc.h: Regenerate.
gdb-8.1-branch
Alan Modra 9 years ago
parent
commit
4162bb66c6
  1. 99
      opcodes/ChangeLog
  2. 26
      opcodes/cgen.sh
  3. 1
      opcodes/epiphany-asm.c
  4. 1
      opcodes/epiphany-desc.c
  5. 1
      opcodes/epiphany-desc.h
  6. 1
      opcodes/epiphany-dis.c
  7. 1
      opcodes/epiphany-ibld.c
  8. 1
      opcodes/epiphany-opc.c
  9. 1
      opcodes/epiphany-opc.h
  10. 1
      opcodes/fr30-asm.c
  11. 1
      opcodes/fr30-desc.c
  12. 1
      opcodes/fr30-desc.h
  13. 1
      opcodes/fr30-dis.c
  14. 1
      opcodes/fr30-ibld.c
  15. 1
      opcodes/fr30-opc.c
  16. 1
      opcodes/fr30-opc.h
  17. 1
      opcodes/frv-asm.c
  18. 1
      opcodes/frv-desc.c
  19. 1
      opcodes/frv-desc.h
  20. 1
      opcodes/frv-dis.c
  21. 1
      opcodes/frv-ibld.c
  22. 1
      opcodes/frv-opc.c
  23. 1
      opcodes/frv-opc.h
  24. 1
      opcodes/ip2k-asm.c
  25. 1
      opcodes/ip2k-desc.c
  26. 1
      opcodes/ip2k-desc.h
  27. 1
      opcodes/ip2k-dis.c
  28. 1
      opcodes/ip2k-ibld.c
  29. 1
      opcodes/ip2k-opc.c
  30. 1
      opcodes/ip2k-opc.h
  31. 1
      opcodes/iq2000-asm.c
  32. 1
      opcodes/iq2000-desc.c
  33. 1
      opcodes/iq2000-desc.h
  34. 1
      opcodes/iq2000-dis.c
  35. 1
      opcodes/iq2000-ibld.c
  36. 1
      opcodes/iq2000-opc.c
  37. 1
      opcodes/iq2000-opc.h
  38. 1
      opcodes/lm32-asm.c
  39. 1
      opcodes/lm32-desc.c
  40. 1
      opcodes/lm32-desc.h
  41. 1
      opcodes/lm32-dis.c
  42. 1
      opcodes/lm32-ibld.c
  43. 1
      opcodes/lm32-opc.c
  44. 1
      opcodes/lm32-opc.h
  45. 1
      opcodes/lm32-opinst.c
  46. 1
      opcodes/m32c-asm.c
  47. 1
      opcodes/m32c-desc.c
  48. 1
      opcodes/m32c-desc.h
  49. 1
      opcodes/m32c-dis.c
  50. 1
      opcodes/m32c-ibld.c
  51. 1
      opcodes/m32c-opc.c
  52. 1
      opcodes/m32c-opc.h
  53. 1
      opcodes/m32r-asm.c
  54. 1
      opcodes/m32r-desc.c
  55. 1
      opcodes/m32r-desc.h
  56. 1
      opcodes/m32r-dis.c
  57. 1
      opcodes/m32r-ibld.c
  58. 1
      opcodes/m32r-opc.c
  59. 1
      opcodes/m32r-opc.h
  60. 1
      opcodes/m32r-opinst.c
  61. 1
      opcodes/mep-asm.c
  62. 1
      opcodes/mep-desc.c
  63. 1
      opcodes/mep-desc.h
  64. 1
      opcodes/mep-dis.c
  65. 1
      opcodes/mep-ibld.c
  66. 1
      opcodes/mep-opc.c
  67. 1
      opcodes/mep-opc.h
  68. 1
      opcodes/mt-asm.c
  69. 1
      opcodes/mt-desc.c
  70. 1
      opcodes/mt-desc.h
  71. 1
      opcodes/mt-dis.c
  72. 1
      opcodes/mt-ibld.c
  73. 1
      opcodes/mt-opc.c
  74. 1
      opcodes/mt-opc.h
  75. 1
      opcodes/or1k-asm.c
  76. 1
      opcodes/or1k-desc.c
  77. 1
      opcodes/or1k-desc.h
  78. 1
      opcodes/or1k-dis.c
  79. 1
      opcodes/or1k-ibld.c
  80. 1
      opcodes/or1k-opc.c
  81. 1
      opcodes/or1k-opc.h
  82. 1
      opcodes/or1k-opinst.c
  83. 1
      opcodes/xc16x-asm.c
  84. 1
      opcodes/xc16x-desc.c
  85. 1
      opcodes/xc16x-desc.h
  86. 1
      opcodes/xc16x-dis.c
  87. 1
      opcodes/xc16x-ibld.c
  88. 1
      opcodes/xc16x-opc.c
  89. 1
      opcodes/xc16x-opc.h
  90. 1
      opcodes/xstormy16-asm.c
  91. 1
      opcodes/xstormy16-desc.c
  92. 1
      opcodes/xstormy16-desc.h
  93. 1
      opcodes/xstormy16-dis.c
  94. 1
      opcodes/xstormy16-ibld.c
  95. 1
      opcodes/xstormy16-opc.c
  96. 1
      opcodes/xstormy16-opc.h

99
opcodes/ChangeLog

@ -1,3 +1,102 @@
2017-07-11 Yao Qi <yao.qi@linaro.org>
Alan Modra <amodra@gmail.com>
* cgen.sh: Mark generated files read-only.
* epiphany-asm.c: Regenerate.
* epiphany-desc.c: Regenerate.
* epiphany-desc.h: Regenerate.
* epiphany-dis.c: Regenerate.
* epiphany-ibld.c: Regenerate.
* epiphany-opc.c: Regenerate.
* epiphany-opc.h: Regenerate.
* fr30-asm.c: Regenerate.
* fr30-desc.c: Regenerate.
* fr30-desc.h: Regenerate.
* fr30-dis.c: Regenerate.
* fr30-ibld.c: Regenerate.
* fr30-opc.c: Regenerate.
* fr30-opc.h: Regenerate.
* frv-asm.c: Regenerate.
* frv-desc.c: Regenerate.
* frv-desc.h: Regenerate.
* frv-dis.c: Regenerate.
* frv-ibld.c: Regenerate.
* frv-opc.c: Regenerate.
* frv-opc.h: Regenerate.
* ip2k-asm.c: Regenerate.
* ip2k-desc.c: Regenerate.
* ip2k-desc.h: Regenerate.
* ip2k-dis.c: Regenerate.
* ip2k-ibld.c: Regenerate.
* ip2k-opc.c: Regenerate.
* ip2k-opc.h: Regenerate.
* iq2000-asm.c: Regenerate.
* iq2000-desc.c: Regenerate.
* iq2000-desc.h: Regenerate.
* iq2000-dis.c: Regenerate.
* iq2000-ibld.c: Regenerate.
* iq2000-opc.c: Regenerate.
* iq2000-opc.h: Regenerate.
* lm32-asm.c: Regenerate.
* lm32-desc.c: Regenerate.
* lm32-desc.h: Regenerate.
* lm32-dis.c: Regenerate.
* lm32-ibld.c: Regenerate.
* lm32-opc.c: Regenerate.
* lm32-opc.h: Regenerate.
* lm32-opinst.c: Regenerate.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
* m32r-asm.c: Regenerate.
* m32r-desc.c: Regenerate.
* m32r-desc.h: Regenerate.
* m32r-dis.c: Regenerate.
* m32r-ibld.c: Regenerate.
* m32r-opc.c: Regenerate.
* m32r-opc.h: Regenerate.
* m32r-opinst.c: Regenerate.
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
* mt-asm.c: Regenerate.
* mt-desc.c: Regenerate.
* mt-desc.h: Regenerate.
* mt-dis.c: Regenerate.
* mt-ibld.c: Regenerate.
* mt-opc.c: Regenerate.
* mt-opc.h: Regenerate.
* or1k-asm.c: Regenerate.
* or1k-desc.c: Regenerate.
* or1k-desc.h: Regenerate.
* or1k-dis.c: Regenerate.
* or1k-ibld.c: Regenerate.
* or1k-opc.c: Regenerate.
* or1k-opc.h: Regenerate.
* or1k-opinst.c: Regenerate.
* xc16x-asm.c: Regenerate.
* xc16x-desc.c: Regenerate.
* xc16x-desc.h: Regenerate.
* xc16x-dis.c: Regenerate.
* xc16x-ibld.c: Regenerate.
* xc16x-opc.c: Regenerate.
* xc16x-opc.h: Regenerate.
* xstormy16-asm.c: Regenerate.
* xstormy16-desc.c: Regenerate.
* xstormy16-desc.h: Regenerate.
* xstormy16-dis.c: Regenerate.
* xstormy16-ibld.c: Regenerate.
* xstormy16-opc.c: Regenerate.
* xstormy16-opc.h: Regenerate.
2017-07-07 Alan Modra <amodra@gmail.com>
* cgen-dis.in: Include disassemble.h, not dis-asm.h.

26
opcodes/cgen.sh

@ -82,6 +82,8 @@ do
esac
done
header="/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */"
case $action in
opcodes)
# Remove residual working files.
@ -113,27 +115,32 @@ opcodes)
${extrafile_args}
# Customise generated files for the particular architecture.
sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
sed -e "1i$header" \
-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e 's/[ ][ ]*$//' < ${tmp}-desc.h1 > ${tmp}-desc.h
${rootdir}/move-if-change ${tmp}-desc.h ${srcdir}/${prefix}-desc.h
sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
sed -e "1i$header" \
-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
< ${tmp}-desc.c1 > ${tmp}-desc.c
${rootdir}/move-if-change ${tmp}-desc.c ${srcdir}/${prefix}-desc.c
sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
sed -e "1i$header" \
-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e 's/[ ][ ]*$//' < ${tmp}-opc.h1 > ${tmp}-opc.h
${rootdir}/move-if-change ${tmp}-opc.h ${srcdir}/${prefix}-opc.h
sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
sed -e "1i$header" \
-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
< ${tmp}-opc.c1 > ${tmp}-opc.c
${rootdir}/move-if-change ${tmp}-opc.c ${srcdir}/${prefix}-opc.c
case $extrafiles in
*opinst*)
sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
sed -e "1i$header" \
-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
< ${tmp}-opinst.c1 >${tmp}-opinst.c
${rootdir}/move-if-change ${tmp}-opinst.c ${srcdir}/${prefix}-opinst.c
@ -141,18 +148,21 @@ opcodes)
esac
cat ${srcdir}/cgen-ibld.in ${tmp}-ibld.in1 | \
sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
sed -e "1i$header" \
-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' > ${tmp}-ibld.c
${rootdir}/move-if-change ${tmp}-ibld.c ${srcdir}/${prefix}-ibld.c
sed -e "/ -- assembler routines/ r ${tmp}-asm.in1" ${srcdir}/cgen-asm.in \
| sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
| sed -e "1i$header" \
-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
> ${tmp}-asm.c
${rootdir}/move-if-change ${tmp}-asm.c ${srcdir}/${prefix}-asm.c
sed -e "/ -- disassembler routines/ r ${tmp}-dis.in1" ${srcdir}/cgen-dis.in \
| sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
| sed -e "1i$header" \
-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
> ${tmp}-dis.c
${rootdir}/move-if-change ${tmp}-dis.c ${srcdir}/${prefix}-dis.c

1
opcodes/epiphany-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/epiphany-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for epiphany.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/epiphany-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for epiphany.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/epiphany-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/epiphany-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for epiphany. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/epiphany-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for epiphany.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/epiphany-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for epiphany.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/fr30-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/fr30-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for fr30.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/fr30-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for fr30.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/fr30-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/fr30-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for fr30. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/fr30-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for fr30.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/fr30-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for fr30.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/frv-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/frv-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for frv.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/frv-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for frv.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/frv-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/frv-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for frv. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/frv-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for frv.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/frv-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for frv.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/ip2k-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/ip2k-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for ip2k.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/ip2k-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for ip2k.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/ip2k-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/ip2k-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for ip2k. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/ip2k-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for ip2k.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/ip2k-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for ip2k.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/iq2000-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/iq2000-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for iq2000.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/iq2000-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for iq2000.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/iq2000-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/iq2000-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for iq2000. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/iq2000-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for iq2000.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/iq2000-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for iq2000.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/lm32-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/lm32-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for lm32.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/lm32-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for lm32.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/lm32-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/lm32-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for lm32. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/lm32-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for lm32.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/lm32-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for lm32.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/lm32-opinst.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Semantic operand instances for lm32.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/m32c-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/m32c-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for m32c.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/m32c-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for m32c.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/m32c-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/m32c-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for m32c. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/m32c-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for m32c.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/m32c-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for m32c.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/m32r-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/m32r-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for m32r.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/m32r-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for m32r.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/m32r-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/m32r-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for m32r. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/m32r-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for m32r.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/m32r-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for m32r.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/m32r-opinst.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Semantic operand instances for m32r.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/mep-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/mep-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for mep.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/mep-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for mep.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/mep-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/mep-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for mep. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/mep-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for mep.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/mep-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for mep.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/mt-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/mt-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for mt.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/mt-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for mt.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/mt-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/mt-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for mt. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/mt-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for mt.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/mt-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for mt.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/or1k-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/or1k-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for or1k.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/or1k-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for or1k.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/or1k-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/or1k-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for or1k. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/or1k-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for or1k.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/or1k-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for or1k.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/or1k-opinst.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Semantic operand instances for or1k.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/xc16x-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/xc16x-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for xc16x.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/xc16x-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for xc16x.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/xc16x-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/xc16x-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for xc16x. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/xc16x-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for xc16x.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/xc16x-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for xc16x.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/xstormy16-asm.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/xstormy16-desc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for xstormy16.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/xstormy16-desc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for xstormy16.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/xstormy16-dis.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator

1
opcodes/xstormy16-ibld.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for xstormy16. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.

1
opcodes/xstormy16-opc.c

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for xstormy16.
THIS FILE IS MACHINE GENERATED WITH CGEN.

1
opcodes/xstormy16-opc.h

@ -1,3 +1,4 @@
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for xstormy16.
THIS FILE IS MACHINE GENERATED WITH CGEN.

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