arm: Fix MVE vmla encoding

gas/config/tc-arm.c

@@ -17984,9 +17984,9 @@ do_neon_mac_maybe_scalar (void)
       constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext), BAD_FPU);
 
       enum neon_shape rs = neon_select_shape (NS_QQR, NS_NULL);
-      neon_check_type (3, rs, N_EQK, N_EQK, N_SU_MVE | N_KEY);
+      neon_check_type (3, rs, N_EQK, N_EQK, N_SU_MVE | N_I_MVE | N_KEY);
 
-      neon_dyadic_misc (NT_unsigned, N_SU_MVE, 0);
+      neon_dyadic_misc (NT_untyped, N_SU_MVE | N_I_MVE, 0);
     }
   else
     {

gas/testsuite/gas/arm/mve-vmla.s

@@ -1,6 +1,6 @@
 .syntax unified
 .thumb
-.irp data, s8, u8, s16, u16, s32, u32
+.irp data, s8, u8, s16, u16, s32, u32, i8, i16, i32
 .irp op1, q0, q1, q2, q4, q7
 .irp op2, q0, q1, q2, q4, q7
 .irp op3, r0, r1, r2, r4, r7, r8, r10, r12, r14
@@ -12,3 +12,9 @@ vmla.\data \op1, \op2, \op3
 vpste
 vmlat.u8 q0, q1, r2
 vmlae.s8 q7, q7, r14
+vpste
+vmlat.i8 q0, q1, r2
+vmlae.i8 q7, q7, r14
+
+@ bit 12 is ignored, should decode as vmla.i8 q0, q0, r0
+.inst 0xfe010e40

opcodes/arm-dis.c

@@ -2763,7 +2763,7 @@ static const struct mopcode32 mve_opcodes[] =
   {ARM_FEATURE_CORE_HIGH (ARM_EXT2_MVE),
    MVE_VMLA,
    0xee010e40, 0xef811f70,
-   "vmla%v.%u%20-21s\t%13-15,22Q, %17-19,7Q, %0-3r"},
+   "vmla%v.i%20-21s\t%13-15,22Q, %17-19,7Q, %0-3r"},
 
   /* Vector VMLALDAV.  Note must appear before VMLADAV due to instruction
      opcode aliasing.  */