Browse Source

x86: avoid attaching suffixes to unambiguous insns

"Unambiguous" is is in particular taking as reference the assembler,
which also accepts certain insns - despite them allowing for varying
operand size, and hence in principle being ambiguous - without any
suffix. For example, from the very beginning of the life of x86-64 I had
trouble understanding why a plain and simple RET had to be printed as
RETQ. In case someone really used the 16-bit form, RETW disambiguates
the two quite fine.
gdb-10-branch
Jan Beulich 6 years ago
parent
commit
36938cabf0
  1. 71
      gas/ChangeLog
  2. 16
      gas/testsuite/gas/i386/disassem.d
  3. 60
      gas/testsuite/gas/i386/ilp32/x86-64-branch.d
  4. 2
      gas/testsuite/gas/i386/intel.d
  5. 4
      gas/testsuite/gas/i386/jump16.d
  6. 2
      gas/testsuite/gas/i386/lfence-load.d
  7. 4
      gas/testsuite/gas/i386/noreg16.d
  8. 4
      gas/testsuite/gas/i386/noreg32.d
  9. 12
      gas/testsuite/gas/i386/noreg64-rex64.d
  10. 12
      gas/testsuite/gas/i386/noreg64.d
  11. 22
      gas/testsuite/gas/i386/notrack.d
  12. 2
      gas/testsuite/gas/i386/opcode.d
  13. 4
      gas/testsuite/gas/i386/solaris/x86-64-branch-2.d
  14. 26
      gas/testsuite/gas/i386/solaris/x86-64-jump.d
  15. 20
      gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d
  16. 2
      gas/testsuite/gas/i386/solaris/x86-64-nop-3.d
  17. 2
      gas/testsuite/gas/i386/solaris/x86-64-nop-4.d
  18. 2
      gas/testsuite/gas/i386/solaris/x86-64-nop-5.d
  19. 22
      gas/testsuite/gas/i386/solaris/x86-64-relax-2.d
  20. 20
      gas/testsuite/gas/i386/solaris/x86-64-relax-3.d
  21. 2
      gas/testsuite/gas/i386/x86-64-align-branch-1a.d
  22. 2
      gas/testsuite/gas/i386/x86-64-align-branch-1b.d
  23. 2
      gas/testsuite/gas/i386/x86-64-align-branch-1c.d
  24. 2
      gas/testsuite/gas/i386/x86-64-align-branch-1d.d
  25. 2
      gas/testsuite/gas/i386/x86-64-align-branch-1e.d
  26. 2
      gas/testsuite/gas/i386/x86-64-align-branch-1f.d
  27. 2
      gas/testsuite/gas/i386/x86-64-align-branch-1g.d
  28. 2
      gas/testsuite/gas/i386/x86-64-align-branch-1h.d
  29. 2
      gas/testsuite/gas/i386/x86-64-align-branch-1i.d
  30. 8
      gas/testsuite/gas/i386/x86-64-align-branch-2a.d
  31. 8
      gas/testsuite/gas/i386/x86-64-align-branch-2b.d
  32. 8
      gas/testsuite/gas/i386/x86-64-align-branch-2c.d
  33. 4
      gas/testsuite/gas/i386/x86-64-align-branch-3.d
  34. 4
      gas/testsuite/gas/i386/x86-64-align-branch-4a.d
  35. 4
      gas/testsuite/gas/i386/x86-64-align-branch-4b.d
  36. 2
      gas/testsuite/gas/i386/x86-64-align-branch-5.d
  37. 2
      gas/testsuite/gas/i386/x86-64-align-branch-6.d
  38. 4
      gas/testsuite/gas/i386/x86-64-branch-2.d
  39. 10
      gas/testsuite/gas/i386/x86-64-branch-3.d
  40. 60
      gas/testsuite/gas/i386/x86-64-branch.d
  41. 36
      gas/testsuite/gas/i386/x86-64-disassem.d
  42. 2
      gas/testsuite/gas/i386/x86-64-disp32.d
  43. 17
      gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d
  44. 17
      gas/testsuite/gas/i386/x86-64-gotpcrel.d
  45. 6
      gas/testsuite/gas/i386/x86-64-ifunc.d
  46. 26
      gas/testsuite/gas/i386/x86-64-jump.d
  47. 20
      gas/testsuite/gas/i386/x86-64-lfence-byte.d
  48. 12
      gas/testsuite/gas/i386/x86-64-lfence-indbr-a.d
  49. 12
      gas/testsuite/gas/i386/x86-64-lfence-indbr-b.d
  50. 12
      gas/testsuite/gas/i386/x86-64-lfence-indbr-c.d
  51. 8
      gas/testsuite/gas/i386/x86-64-lfence-load.d
  52. 12
      gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
  53. 12
      gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
  54. 12
      gas/testsuite/gas/i386/x86-64-lfence-ret-c.d
  55. 12
      gas/testsuite/gas/i386/x86-64-lfence-ret-d.d
  56. 12
      gas/testsuite/gas/i386/x86-64-lfence-ret-e.d
  57. 18
      gas/testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d
  58. 20
      gas/testsuite/gas/i386/x86-64-mpx-branch-1.d
  59. 28
      gas/testsuite/gas/i386/x86-64-mpx.d
  60. 2
      gas/testsuite/gas/i386/x86-64-nop-3.d
  61. 2
      gas/testsuite/gas/i386/x86-64-nop-4.d
  62. 2
      gas/testsuite/gas/i386/x86-64-nop-5.d
  63. 4
      gas/testsuite/gas/i386/x86-64-nops-7.d
  64. 126
      gas/testsuite/gas/i386/x86-64-notrack.d
  65. 42
      gas/testsuite/gas/i386/x86-64-opcode.d
  66. 22
      gas/testsuite/gas/i386/x86-64-relax-2.d
  67. 20
      gas/testsuite/gas/i386/x86-64-relax-3.d
  68. 4
      gas/testsuite/gas/i386/x86-64-relax-4.d
  69. 8
      gas/testsuite/gas/i386/x86-64-rtm.d
  70. 64
      gas/testsuite/gas/i386/x86-64-stack.d
  71. 12
      gas/testsuite/gas/i386/x86-64-unique.d
  72. 4
      gas/testsuite/gas/i386/x86_64-intel.d
  73. 106
      ld/ChangeLog
  74. 2
      ld/testsuite/ld-i386/ibt-plt-1.d
  75. 2
      ld/testsuite/ld-i386/ibt-plt-2a.d
  76. 2
      ld/testsuite/ld-i386/ibt-plt-2c.d
  77. 2
      ld/testsuite/ld-i386/ibt-plt-3a.d
  78. 2
      ld/testsuite/ld-i386/ibt-plt-3c.d
  79. 2
      ld/testsuite/ld-i386/plt-pic.pd
  80. 2
      ld/testsuite/ld-i386/plt-pic2.dd
  81. 2
      ld/testsuite/ld-i386/plt.pd
  82. 2
      ld/testsuite/ld-i386/plt2.dd
  83. 2
      ld/testsuite/ld-i386/pr19636-1d.d
  84. 2
      ld/testsuite/ld-i386/pr19636-1l.d
  85. 2
      ld/testsuite/ld-i386/pr19636-2c.d
  86. 2
      ld/testsuite/ld-i386/pr20830.d
  87. 2
      ld/testsuite/ld-i386/vxworks1-lib.dd
  88. 2
      ld/testsuite/ld-i386/vxworks1.dd
  89. 2
      ld/testsuite/ld-ifunc/ifunc-2-i386-now.d
  90. 2
      ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d
  91. 16
      ld/testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d
  92. 16
      ld/testsuite/ld-ifunc/ifunc-2-x86-64-now.d
  93. 8
      ld/testsuite/ld-ifunc/ifunc-21-x86-64.d
  94. 8
      ld/testsuite/ld-ifunc/ifunc-22-x86-64.d
  95. 2
      ld/testsuite/ld-ifunc/pr17154-i386-now.d
  96. 2
      ld/testsuite/ld-ifunc/pr17154-i386.d
  97. 36
      ld/testsuite/ld-ifunc/pr17154-x86-64-now.d
  98. 36
      ld/testsuite/ld-ifunc/pr17154-x86-64.d
  99. 2
      ld/testsuite/ld-x86-64/align-branch-1.d
  100. 40
      ld/testsuite/ld-x86-64/bnd-branch-1-now.d

71
gas/ChangeLog

@ -1,3 +1,74 @@
2020-07-15 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/disassem.d,
testsuite/gas/i386/ilp32/x86-64-branch.d,
testsuite/gas/i386/intel.d, testsuite/gas/i386/jump16.d,
testsuite/gas/i386/lfence-load.d, testsuite/gas/i386/noreg16.d,
testsuite/gas/i386/noreg32.d,
testsuite/gas/i386/noreg64-rex64.d,
testsuite/gas/i386/noreg64.d, testsuite/gas/i386/notrack.d,
testsuite/gas/i386/opcode.d,
testsuite/gas/i386/solaris/x86-64-branch-2.d,
testsuite/gas/i386/solaris/x86-64-jump.d,
testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d,
testsuite/gas/i386/solaris/x86-64-nop-3.d,
testsuite/gas/i386/solaris/x86-64-nop-4.d,
testsuite/gas/i386/solaris/x86-64-nop-5.d,
testsuite/gas/i386/solaris/x86-64-relax-2.d,
testsuite/gas/i386/solaris/x86-64-relax-3.d,
testsuite/gas/i386/x86-64-align-branch-1a.d,
testsuite/gas/i386/x86-64-align-branch-1b.d,
testsuite/gas/i386/x86-64-align-branch-1c.d,
testsuite/gas/i386/x86-64-align-branch-1d.d,
testsuite/gas/i386/x86-64-align-branch-1e.d,
testsuite/gas/i386/x86-64-align-branch-1f.d,
testsuite/gas/i386/x86-64-align-branch-1g.d,
testsuite/gas/i386/x86-64-align-branch-1h.d,
testsuite/gas/i386/x86-64-align-branch-1i.d,
testsuite/gas/i386/x86-64-align-branch-2a.d,
testsuite/gas/i386/x86-64-align-branch-2b.d,
testsuite/gas/i386/x86-64-align-branch-2c.d,
testsuite/gas/i386/x86-64-align-branch-3.d,
testsuite/gas/i386/x86-64-align-branch-4a.d,
testsuite/gas/i386/x86-64-align-branch-4b.d,
testsuite/gas/i386/x86-64-align-branch-5.d,
testsuite/gas/i386/x86-64-align-branch-6.d,
testsuite/gas/i386/x86-64-branch-2.d,
testsuite/gas/i386/x86-64-branch-3.d,
testsuite/gas/i386/x86-64-branch.d,
testsuite/gas/i386/x86-64-disassem.d,
testsuite/gas/i386/x86-64-disp32.d,
testsuite/gas/i386/x86-64-gotpcrel-no-relax.d,
testsuite/gas/i386/x86-64-gotpcrel.d,
testsuite/gas/i386/x86-64-ifunc.d,
testsuite/gas/i386/x86-64-jump.d,
testsuite/gas/i386/x86-64-lfence-byte.d,
testsuite/gas/i386/x86-64-lfence-indbr-a.d,
testsuite/gas/i386/x86-64-lfence-indbr-b.d,
testsuite/gas/i386/x86-64-lfence-indbr-c.d,
testsuite/gas/i386/x86-64-lfence-load.d,
testsuite/gas/i386/x86-64-lfence-ret-a.d,
testsuite/gas/i386/x86-64-lfence-ret-b.d,
testsuite/gas/i386/x86-64-lfence-ret-c.d,
testsuite/gas/i386/x86-64-lfence-ret-d.d,
testsuite/gas/i386/x86-64-lfence-ret-e.d,
testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d,
testsuite/gas/i386/x86-64-mpx-branch-1.d,
testsuite/gas/i386/x86-64-mpx.d,
testsuite/gas/i386/x86-64-nop-3.d,
testsuite/gas/i386/x86-64-nop-4.d,
testsuite/gas/i386/x86-64-nop-5.d,
testsuite/gas/i386/x86-64-nops-7.d,
testsuite/gas/i386/x86-64-notrack.d,
testsuite/gas/i386/x86-64-opcode.d,
testsuite/gas/i386/x86-64-relax-2.d,
testsuite/gas/i386/x86-64-relax-3.d,
testsuite/gas/i386/x86-64-relax-4.d,
testsuite/gas/i386/x86-64-rtm.d,
testsuite/gas/i386/x86-64-stack.d,
testsuite/gas/i386/x86-64-unique.d,
testsuite/gas/i386/x86_64-intel.d: Adjust expectations.
2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/26237

16
gas/testsuite/gas/i386/disassem.d

@ -246,49 +246,49 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl \(%ecx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl \(%ecx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl \(%ecx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl \(%ecx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl \(%ecx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl \(%ecx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl \(%ecx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl \(%ecx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*

60
gas/testsuite/gas/i386/ilp32/x86-64-branch.d

@ -8,35 +8,35 @@
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 callq \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 callq \*%rax
[ ]*[a-f0-9]+: 66 ff 10 data16 callq \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmpq \*%rax
[ ]*[a-f0-9]+: ff e0 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff 20 data16 jmpq \*\(%rax\)
[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x1f 1b: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x24 20: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 callq 0x2a 26: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmpq 0x30 2c: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: ff d0 call \*%rax
[ ]*[a-f0-9]+: ff d0 call \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 call \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 call \*%rax
[ ]*[a-f0-9]+: 66 ff 10 data16 call \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmp \*%rax
[ ]*[a-f0-9]+: ff e0 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff 20 data16 jmp \*\(%rax\)
[ ]*[a-f0-9]+: e8 00 00 00 00 call 0x1f 1b: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 0x24 20: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 call 0x2a 26: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmp 0x30 2c: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb 0x37 33: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 c3 data16 retq *
[ ]*[a-f0-9]+: 66 c2 08 00 data16 retq \$0x8
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 callq \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 callq \*%rax
[ ]*[a-f0-9]+: 66 ff 10 data16 callq \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmpq \*%rax
[ ]*[a-f0-9]+: ff e0 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff 20 data16 jmpq \*\(%rax\)
[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x[0-9a-f]* [0-9a-f]*: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x[0-9a-f]* [0-9a-f]*: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 c3 data16 retq *
[ ]*[a-f0-9]+: 66 c2 08 00 data16 retq \$0x8
[ ]*[a-f0-9]+: 66 c3 data16 ret *
[ ]*[a-f0-9]+: 66 c2 08 00 data16 ret \$0x8
[ ]*[a-f0-9]+: ff d0 call \*%rax
[ ]*[a-f0-9]+: ff d0 call \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 call \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 call \*%rax
[ ]*[a-f0-9]+: 66 ff 10 data16 call \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmp \*%rax
[ ]*[a-f0-9]+: ff e0 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff 20 data16 jmp \*\(%rax\)
[ ]*[a-f0-9]+: e8 00 00 00 00 call 0x[0-9a-f]* [0-9a-f]*: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 0x[0-9a-f]* [0-9a-f]*: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 c3 data16 ret *
[ ]*[a-f0-9]+: 66 c2 08 00 data16 ret \$0x8
#pass

2
gas/testsuite/gas/i386/intel.d

@ -141,7 +141,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8c 90 90 90 90 90 [ ]*mov %ss,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 8d 90 90 90 90 90 [ ]*lea -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 8e 90 90 90 90 90 [ ]*mov -0x6f6f6f70\(%eax\),%ss
[ ]*[a-f0-9]+: 8f 80 90 90 90 90 [ ]*popl -0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 8f 80 90 90 90 90 [ ]*pop -0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 90 [ ]*nop
[ ]*[a-f0-9]+: 91 [ ]*xchg %eax,%ecx
[ ]*[a-f0-9]+: 92 [ ]*xchg %eax,%edx

4
gas/testsuite/gas/i386/jump16.d

@ -10,7 +10,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: eb fe jmp (0x0|0 <.text>)
[ ]*[a-f0-9]+: e9 f(e|b) ff jmp (0x3|0 <.text>) 3: (R_386_PC)?(DISP)?16 xxx
[ ]*[a-f0-9]+: ff 26 00 00 jmp \*0x0 7: (R_386_)?16 xxx
[ ]*[a-f0-9]+: 66 ff e7 jmpl \*%edi
[ ]*[a-f0-9]+: 66 ff e7 jmp \*%edi
[ ]*[a-f0-9]+: 67 ff 27 jmp \*\(%edi\)
[ ]*[a-f0-9]+: 67 ff af 00 00 00 00 ljmp \*0x0\(%edi\) 12: (R_386_)?(dir)?32 xxx
[ ]*[a-f0-9]+: ff 2e 00 00 ljmp \*0x0 18: (R_386_)?16 xxx
@ -18,7 +18,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 e8 db ff ff ff calll (0x0|0 <.text>)
[ ]*[a-f0-9]+: 66 e8 (fc|d5) ff ff ff calll (0x27|0 <.text>) 27: (R_386_PC)?(DISP)?32 xxx
[ ]*[a-f0-9]+: 66 ff 16 00 00 calll \*0x0 2e: (R_386_)?16 xxx
[ ]*[a-f0-9]+: 66 ff d7 calll \*%edi
[ ]*[a-f0-9]+: 66 ff d7 call \*%edi
[ ]*[a-f0-9]+: 67 66 ff 17 calll \*\(%edi\)
[ ]*[a-f0-9]+: 67 66 ff 9f 00 00 00 00 lcalll \*0x0\(%edi\) 3b: (R_386_)?(dir)?32 xxx
[ ]*[a-f0-9]+: 66 ff 1e 00 00 lcalll \*0x0 42: (R_386_)?16 xxx

2
gas/testsuite/gas/i386/lfence-load.d

@ -79,7 +79,7 @@ Disassembly of section .text:
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f 0f 66 02 b0 pfcmpeq 0x2\(%esi\),%mm4
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 8f 00 popl \(%eax\)
+[a-f0-9]+: 8f 00 pop \(%eax\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 58 pop %eax
+[a-f0-9]+: 0f ae e8 lfence

4
gas/testsuite/gas/i386/noreg16.d

@ -90,10 +90,10 @@ Disassembly of section .text:
*[a-f0-9]+: ef out %ax,\(%dx\)
*[a-f0-9]+: 6f outsw %ds:\(%si\),\(%dx\)
*[a-f0-9]+: 6f outsw %ds:\(%si\),\(%dx\)
*[a-f0-9]+: 8f 07 popw \(%bx\)
*[a-f0-9]+: 8f 07 pop \(%bx\)
*[a-f0-9]+: 07 pop %es
*[a-f0-9]+: f3 0f ae 27 ptwrite \(%bx\)
*[a-f0-9]+: ff 37 pushw \(%bx\)
*[a-f0-9]+: ff 37 push \(%bx\)
*[a-f0-9]+: 06 push %es
*[a-f0-9]+: d1 17 rclw \(%bx\)
*[a-f0-9]+: c1 17 02 rclw \$0x2,\(%bx\)

4
gas/testsuite/gas/i386/noreg32.d

@ -96,10 +96,10 @@ Disassembly of section .text:
*[a-f0-9]+: ef out %eax,\(%dx\)
*[a-f0-9]+: 6f outsl %ds:\(%esi\),\(%dx\)
*[a-f0-9]+: 6f outsl %ds:\(%esi\),\(%dx\)
*[a-f0-9]+: 8f 00 popl \(%eax\)
*[a-f0-9]+: 8f 00 pop \(%eax\)
*[a-f0-9]+: 07 pop %es
*[a-f0-9]+: f3 0f ae 20 ptwrite \(%eax\)
*[a-f0-9]+: ff 30 pushl \(%eax\)
*[a-f0-9]+: ff 30 push \(%eax\)
*[a-f0-9]+: 06 push %es
*[a-f0-9]+: d1 10 rcll \(%eax\)
*[a-f0-9]+: c1 10 02 rcll \$0x2,\(%eax\)

12
gas/testsuite/gas/i386/noreg64-rex64.d

@ -24,7 +24,7 @@ Disassembly of section .text:
*[a-f0-9]+: 48 0f ba 38 01 btcq \$0x1,\(%rax\)
*[a-f0-9]+: 48 0f ba 30 01 btrq \$0x1,\(%rax\)
*[a-f0-9]+: 48 0f ba 28 01 btsq \$0x1,\(%rax\)
*[a-f0-9]+: 48 ff 10 rex\.W callq \*\(%rax\)
*[a-f0-9]+: 48 ff 10 rex\.W call \*\(%rax\)
*[a-f0-9]+: 48 83 38 01 cmpq \$0x1,\(%rax\)
*[a-f0-9]+: 48 81 38 89 00 00 00 cmpq \$0x89,\(%rax\)
*[a-f0-9]+: 48 81 38 34 12 00 00 cmpq \$0x1234,\(%rax\)
@ -65,7 +65,7 @@ Disassembly of section .text:
*[a-f0-9]+: 48 6d rex\.W insl \(%dx\),%es:\(%rdi\)
*[a-f0-9]+: 48 6d rex\.W insl \(%dx\),%es:\(%rdi\)
*[a-f0-9]+: 48 cf iretq *
*[a-f0-9]+: 48 ff 20 rex\.W jmpq \*\(%rax\)
*[a-f0-9]+: 48 ff 20 rex\.W jmp \*\(%rax\)
*[a-f0-9]+: 48 ff 18 rex\.W lcall \*\(%rax\)
*[a-f0-9]+: 48 0f 01 10 rex\.W lgdt \(%rax\)
*[a-f0-9]+: 48 0f 01 18 rex\.W lidt \(%rax\)
@ -100,11 +100,11 @@ Disassembly of section .text:
*[a-f0-9]+: 48 ef rex\.W out %eax,\(%dx\)
*[a-f0-9]+: 48 6f rex\.W outsl %ds:\(%rsi\),\(%dx\)
*[a-f0-9]+: 48 6f rex\.W outsl %ds:\(%rsi\),\(%dx\)
*[a-f0-9]+: 48 8f 00 rex\.W popq \(%rax\)
*[a-f0-9]+: 48 0f a1 rex\.W popq %fs
*[a-f0-9]+: 48 8f 00 rex\.W pop \(%rax\)
*[a-f0-9]+: 48 0f a1 rex\.W pop %fs
*[a-f0-9]+: f3 48 0f ae 20 ptwriteq \(%rax\)
*[a-f0-9]+: 48 ff 30 rex\.W pushq \(%rax\)
*[a-f0-9]+: 48 0f a0 rex\.W pushq %fs
*[a-f0-9]+: 48 ff 30 rex\.W push \(%rax\)
*[a-f0-9]+: 48 0f a0 rex\.W push %fs
*[a-f0-9]+: 48 d1 10 rclq \(%rax\)
*[a-f0-9]+: 48 c1 10 02 rclq \$0x2,\(%rax\)
*[a-f0-9]+: 48 d3 10 rclq %cl,\(%rax\)

12
gas/testsuite/gas/i386/noreg64.d

@ -23,7 +23,7 @@ Disassembly of section .text:
*[a-f0-9]+: 0f ba 38 01 btcl \$0x1,\(%rax\)
*[a-f0-9]+: 0f ba 30 01 btrl \$0x1,\(%rax\)
*[a-f0-9]+: 0f ba 28 01 btsl \$0x1,\(%rax\)
*[a-f0-9]+: ff 10 callq \*\(%rax\)
*[a-f0-9]+: ff 10 call \*\(%rax\)
*[a-f0-9]+: 83 38 01 cmpl \$0x1,\(%rax\)
*[a-f0-9]+: 81 38 89 00 00 00 cmpl \$0x89,\(%rax\)
*[a-f0-9]+: 81 38 34 12 00 00 cmpl \$0x1234,\(%rax\)
@ -65,7 +65,7 @@ Disassembly of section .text:
*[a-f0-9]+: 6d insl \(%dx\),%es:\(%rdi\)
*[a-f0-9]+: 6d insl \(%dx\),%es:\(%rdi\)
*[a-f0-9]+: cf iret *
*[a-f0-9]+: ff 20 jmpq \*\(%rax\)
*[a-f0-9]+: ff 20 jmp \*\(%rax\)
*[a-f0-9]+: ff 18 lcall \*\(%rax\)
*[a-f0-9]+: 0f 01 10 lgdt \(%rax\)
*[a-f0-9]+: 0f 01 18 lidt \(%rax\)
@ -102,11 +102,11 @@ Disassembly of section .text:
*[a-f0-9]+: ef out %eax,\(%dx\)
*[a-f0-9]+: 6f outsl %ds:\(%rsi\),\(%dx\)
*[a-f0-9]+: 6f outsl %ds:\(%rsi\),\(%dx\)
*[a-f0-9]+: 8f 00 popq \(%rax\)
*[a-f0-9]+: 0f a1 popq %fs
*[a-f0-9]+: 8f 00 pop \(%rax\)
*[a-f0-9]+: 0f a1 pop %fs
*[a-f0-9]+: f3 0f ae 20 ptwritel \(%rax\)
*[a-f0-9]+: ff 30 pushq \(%rax\)
*[a-f0-9]+: 0f a0 pushq %fs
*[a-f0-9]+: ff 30 push \(%rax\)
*[a-f0-9]+: 0f a0 push %fs
*[a-f0-9]+: d1 10 rcll \(%rax\)
*[a-f0-9]+: c1 10 02 rcll \$0x2,\(%rax\)
*[a-f0-9]+: d3 10 rcll %cl,\(%rax\)

22
gas/testsuite/gas/i386/notrack.d

@ -8,45 +8,45 @@ Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: 3e ff d0 notrack call \*%eax
[ ]*[a-f0-9]+: 3e 66 ff d0 notrack callw \*%ax
[ ]*[a-f0-9]+: 3e 66 ff d0 notrack call \*%ax
[ ]*[a-f0-9]+: 3e ff e0 notrack jmp \*%eax
[ ]*[a-f0-9]+: 3e 66 ff e0 notrack jmpw \*%ax
[ ]*[a-f0-9]+: 3e 66 ff e0 notrack jmp \*%ax
[ ]*[a-f0-9]+: 3e ff 10 notrack call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 66 ff 10 notrack callw \*\(%eax\)
[ ]*[a-f0-9]+: 3e ff 20 notrack jmp \*\(%eax\)
[ ]*[a-f0-9]+: 3e 66 ff 20 notrack jmpw \*\(%eax\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd call \*%eax
[ ]*[a-f0-9]+: 3e 66 f2 ff d0 notrack bnd callw \*%ax
[ ]*[a-f0-9]+: 3e 66 f2 ff d0 notrack bnd call \*%ax
[ ]*[a-f0-9]+: 3e f2 ff e0 notrack bnd jmp \*%eax
[ ]*[a-f0-9]+: 3e 66 f2 ff e0 notrack bnd jmpw \*%ax
[ ]*[a-f0-9]+: 3e 66 f2 ff e0 notrack bnd jmp \*%ax
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 66 f2 ff 10 notrack bnd callw \*\(%eax\)
[ ]*[a-f0-9]+: 3e f2 ff 20 notrack bnd jmp \*\(%eax\)
[ ]*[a-f0-9]+: 3e 66 f2 ff 20 notrack bnd jmpw \*\(%eax\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd call \*%eax
[ ]*[a-f0-9]+: 3e 66 f2 ff d0 notrack bnd callw \*%ax
[ ]*[a-f0-9]+: 3e 66 f2 ff d0 notrack bnd call \*%ax
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 66 f2 ff 10 notrack bnd callw \*\(%eax\)
[ ]*[a-f0-9]+: 3e ff d0 notrack call \*%eax
[ ]*[a-f0-9]+: 3e 66 ff d0 notrack callw \*%ax
[ ]*[a-f0-9]+: 3e 66 ff d0 notrack call \*%ax
[ ]*[a-f0-9]+: 3e ff e0 notrack jmp \*%eax
[ ]*[a-f0-9]+: 3e 66 ff e0 notrack jmpw \*%ax
[ ]*[a-f0-9]+: 3e 66 ff e0 notrack jmp \*%ax
[ ]*[a-f0-9]+: 3e ff 10 notrack call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 66 ff 10 notrack callw \*\(%eax\)
[ ]*[a-f0-9]+: 3e ff 20 notrack jmp \*\(%eax\)
[ ]*[a-f0-9]+: 3e 66 ff 20 notrack jmpw \*\(%eax\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd call \*%eax
[ ]*[a-f0-9]+: 3e 66 f2 ff d0 notrack bnd callw \*%ax
[ ]*[a-f0-9]+: 3e 66 f2 ff d0 notrack bnd call \*%ax
[ ]*[a-f0-9]+: 3e f2 ff e0 notrack bnd jmp \*%eax
[ ]*[a-f0-9]+: 3e 66 f2 ff e0 notrack bnd jmpw \*%ax
[ ]*[a-f0-9]+: 3e 66 f2 ff e0 notrack bnd jmp \*%ax
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 66 f2 ff 10 notrack bnd callw \*\(%eax\)
[ ]*[a-f0-9]+: 3e f2 ff 20 notrack bnd jmp \*\(%eax\)
[ ]*[a-f0-9]+: 3e 66 f2 ff 20 notrack bnd jmpw \*\(%eax\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd call \*%eax
[ ]*[a-f0-9]+: 3e 66 f2 ff d0 notrack bnd callw \*%ax
[ ]*[a-f0-9]+: 3e 66 f2 ff d0 notrack bnd call \*%ax
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 66 f2 ff 10 notrack bnd callw \*\(%eax\)
[ ]*[a-f0-9]+: f2 3e ff d0 bnd notrack call \*%eax
[ ]*[a-f0-9]+: 66 3e ff d0 notrack callw \*%ax
[ ]*[a-f0-9]+: 66 3e ff d0 notrack call \*%ax
#pass

2
gas/testsuite/gas/i386/opcode.d

@ -140,7 +140,7 @@ Disassembly of section .text:
1b5: 8c 90 90 90 90 90 [ ]*mov %ss,-0x6f6f6f70\(%eax\)
1bb: 8d 90 90 90 90 90 [ ]*lea -0x6f6f6f70\(%eax\),%edx
1c1: 8e 90 90 90 90 90 [ ]*mov -0x6f6f6f70\(%eax\),%ss
1c7: 8f 80 90 90 90 90 [ ]*popl -0x6f6f6f70\(%eax\)
1c7: 8f 80 90 90 90 90 [ ]*pop -0x6f6f6f70\(%eax\)
1cd: 90 [ ]*nop
1ce: 91 [ ]*xchg %eax,%ecx
1cf: 92 [ ]*xchg %eax,%edx

4
gas/testsuite/gas/i386/solaris/x86-64-branch-2.d

@ -9,12 +9,12 @@ Disassembly of section .text:
0+ <bar-0xb>:
[ ]*[a-f0-9]+: 66 e9 00 00 jmpw 4 <bar-0x7> 2: R_X86_64_PC16 foo-0x2
[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 jmpq b <bar> 7: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmp b <bar> 7: R_X86_64_PC32 foo-0x4
0+b <bar>:
[ ]*[a-f0-9]+: 89 c3 mov %eax,%ebx
[ ]*[a-f0-9]+: 66 e8 00 00 callw 11 <bar\+0x6> f: R_X86_64_PC16 foo-0x2
[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 callq 18 <bar\+0xd> 14: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W call 18 <bar\+0xd> 14: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: 66 c3 retw *
[ ]*[a-f0-9]+: 66 c2 08 00 retw \$0x8
#pass

26
gas/testsuite/gas/i386/solaris/x86-64-jump.d

@ -9,19 +9,19 @@ Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: eb fe jmp (0x0|0 <.text>)
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x7 3: R_X86_64_PC32 xxx-0x4
[ ]*[a-f0-9]+: ff 24 25 00 00 00 00 jmpq \*0x0 a: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff e7 jmpq \*%rdi
[ ]*[a-f0-9]+: ff 27 jmpq \*\(%rdi\)
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 0x7 3: R_X86_64_PC32 xxx-0x4
[ ]*[a-f0-9]+: ff 24 25 00 00 00 00 jmp \*0x0 a: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff e7 jmp \*%rdi
[ ]*[a-f0-9]+: ff 27 jmp \*\(%rdi\)
[ ]*[a-f0-9]+: ff 2c bd 00 00 00 00 ljmp \*0x0\(,%rdi,4\) 15: R_X86_64_32S xxx
[ ]*[a-f0-9]+: 66 ff 2c bd 00 00 00 00 ljmpw \*0x0\(,%rdi,4\) 1d: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff 2c 25 00 00 00 00 ljmp \*0x0 24: R_X86_64_32S xxx
[ ]*[a-f0-9]+: 66 ff 2c 25 00 00 00 00 ljmpw \*0x0 2c: R_X86_64_32S xxx
[ ]*[a-f0-9]+: e8 cb ff ff ff callq 0x0
[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x3a 36: R_X86_64_PC32 xxx-0x4
[ ]*[a-f0-9]+: ff 14 25 00 00 00 00 callq \*0x0 3d: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff d7 callq \*%rdi
[ ]*[a-f0-9]+: ff 17 callq \*\(%rdi\)
[ ]*[a-f0-9]+: e8 cb ff ff ff call 0x0
[ ]*[a-f0-9]+: e8 00 00 00 00 call 0x3a 36: R_X86_64_PC32 xxx-0x4
[ ]*[a-f0-9]+: ff 14 25 00 00 00 00 call \*0x0 3d: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff d7 call \*%rdi
[ ]*[a-f0-9]+: ff 17 call \*\(%rdi\)
[ ]*[a-f0-9]+: ff 1c bd 00 00 00 00 lcall \*0x0\(,%rdi,4\) 48: R_X86_64_32S xxx
[ ]*[a-f0-9]+: 66 ff 1c bd 00 00 00 00 lcallw \*0x0\(,%rdi,4\) 50: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff 1c 25 00 00 00 00 lcall \*0x0 57: R_X86_64_32S xxx
@ -33,14 +33,14 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 ff 13 callw \*\(%rbx\)
[ ]*[a-f0-9]+: 66 ff 1b lcallw \*\(%rbx\)
[ ]*[a-f0-9]+: ff 1b lcall \*\(%rbx\)
[ ]*[a-f0-9]+: ff 13 callq \*\(%rbx\)
[ ]*[a-f0-9]+: ff 13 callq \*\(%rbx\)
[ ]*[a-f0-9]+: ff 13 call \*\(%rbx\)
[ ]*[a-f0-9]+: ff 13 call \*\(%rbx\)
[ ]*[a-f0-9]+: ff 1b lcall \*\(%rbx\)
[ ]*[a-f0-9]+: 66 ff 23 jmpw \*\(%rbx\)
[ ]*[a-f0-9]+: 66 ff 2b ljmpw \*\(%rbx\)
[ ]*[a-f0-9]+: ff 2b ljmp \*\(%rbx\)
[ ]*[a-f0-9]+: ff 23 jmpq \*\(%rbx\)
[ ]*[a-f0-9]+: ff 23 jmpq \*\(%rbx\)
[ ]*[a-f0-9]+: ff 23 jmp \*\(%rbx\)
[ ]*[a-f0-9]+: ff 23 jmp \*\(%rbx\)
[ ]*[a-f0-9]+: ff 2b ljmp \*\(%rbx\)
[ ]*[a-f0-9]+: eb 00 jmp 0x[0-9a-f]*
[ ]*[a-f0-9]+: 90 nop

20
gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d

@ -9,23 +9,23 @@
Disassembly of section .text:
0+ <foo1-0x1c>:
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x16> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1-0x10> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 f2 48 e8 00 00 00 00 data16 bnd callq 14 <foo1-0x8> 10: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 f2 48 e9 00 00 00 00 data16 bnd jmpq 1c <foo1> 18: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd call 6 <foo1-0x16> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmp c <foo1-0x10> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 f2 48 e8 00 00 00 00 data16 bnd rex\.W call 14 <foo1-0x8> 10: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 f2 48 e9 00 00 00 00 data16 bnd rex\.W jmp 1c <foo1> 18: R_X86_64_PC32 \*ABS\*\+0x10003c
0+1c <foo1>:
[ ]*[a-f0-9]+: f2 eb fd bnd jmp 1c <foo1>
[ ]*[a-f0-9]+: f2 72 fa bnd jb 1c <foo1>
[ ]*[a-f0-9]+: f2 e8 f4 ff ff ff bnd callq 1c <foo1>
[ ]*[a-f0-9]+: f2 e8 f4 ff ff ff bnd call 1c <foo1>
[ ]*[a-f0-9]+: f2 eb 09 bnd jmp 34 <foo2>
[ ]*[a-f0-9]+: f2 72 06 bnd jb 34 <foo2>
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 34 <foo2>
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd call 34 <foo2>
0+34 <foo2>:
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3a <foo2\+0x6> 36: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmp 3a <foo2\+0x6> 36: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 41 <foo2\+0xd> 3d: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 47 <foo2\+0x13> 43: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 4d <foo2\+0x19> 49: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd call 47 <foo2\+0x13> 43: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmp 4d <foo2\+0x19> 49: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 54 <foo2\+0x20> 50: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 5a <foo2\+0x26> 56: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd call 5a <foo2\+0x26> 56: R_X86_64_PLT32 foo-0x4

2
gas/testsuite/gas/i386/solaris/x86-64-nop-3.d

@ -17,5 +17,5 @@ Disassembly of section .text:
Disassembly of section .altinstr_replacement:
0+ <.altinstr_replacement>:
+[a-f0-9]+: e9 00 00 00 00 jmpq 5 <_start\+0x5> 1: R_X86_64_PC32 foo-0x4
+[a-f0-9]+: e9 00 00 00 00 jmp 5 <_start\+0x5> 1: R_X86_64_PC32 foo-0x4
#pass

2
gas/testsuite/gas/i386/solaris/x86-64-nop-4.d

@ -20,5 +20,5 @@ Disassembly of section .altinstr_replacement:
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: e9 00 00 00 00 jmpq b <_start\+0xb> 7: R_X86_64_PC32 foo-0x4
+[a-f0-9]+: e9 00 00 00 00 jmp b <_start\+0xb> 7: R_X86_64_PC32 foo-0x4
#pass

2
gas/testsuite/gas/i386/solaris/x86-64-nop-5.d

@ -23,5 +23,5 @@ Disassembly of section .altinstr_replacement:
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: e9 00 00 00 00 jmpq d <_start\+0xd> 9: R_X86_64_PC32 foo-0x4
+[a-f0-9]+: e9 00 00 00 00 jmp d <_start\+0xd> 9: R_X86_64_PC32 foo-0x4
#pass

22
gas/testsuite/gas/i386/solaris/x86-64-relax-2.d

@ -10,25 +10,25 @@ Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: eb 24 jmp 26 <local>
[ ]*[a-f0-9]+: eb 1e jmp 22 <hidden_def>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 9 <foo\+0x9> 5: R_X86_64_PC32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq e <foo\+0xe> a: R_X86_64_PLT32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 13 <foo\+0x13> f: R_X86_64_PC32 weak_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 18 <foo\+0x18> 14: R_X86_64_PC32 weak_hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1d <foo\+0x1d> 19: R_X86_64_PC32 weak_hidden_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 22 <hidden_def> 1e: R_X86_64_PC32 hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 9 <foo\+0x9> 5: R_X86_64_PC32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp e <foo\+0xe> a: R_X86_64_PLT32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 13 <foo\+0x13> f: R_X86_64_PC32 weak_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 18 <foo\+0x18> 14: R_X86_64_PC32 weak_hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1d <foo\+0x1d> 19: R_X86_64_PC32 weak_hidden_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 22 <hidden_def> 1e: R_X86_64_PC32 hidden_undef-0x4
0+22 <hidden_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+23 <weak_hidden_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+24 <global_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+25 <weak_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+26 <local>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
#pass

20
gas/testsuite/gas/i386/solaris/x86-64-relax-3.d

@ -10,24 +10,24 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: eb 21 jmp 23 <local>
[ ]*[a-f0-9]+: eb 1b jmp 1f <hidden_def>
[ ]*[a-f0-9]+: eb 1b jmp 21 <global_def>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq b <foo\+0xb> 7: R_X86_64_PLT32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 10 <foo\+0x10> c: R_X86_64_PC32 weak_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 15 <foo\+0x15> 11: R_X86_64_PC32 weak_hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1a <foo\+0x1a> 16: R_X86_64_PC32 weak_hidden_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1f <hidden_def> 1b: R_X86_64_PC32 hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp b <foo\+0xb> 7: R_X86_64_PLT32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 10 <foo\+0x10> c: R_X86_64_PC32 weak_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 15 <foo\+0x15> 11: R_X86_64_PC32 weak_hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1a <foo\+0x1a> 16: R_X86_64_PC32 weak_hidden_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1f <hidden_def> 1b: R_X86_64_PC32 hidden_undef-0x4
0+1f <hidden_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+20 <weak_hidden_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+21 <global_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+22 <weak_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+23 <local>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
#pass

2
gas/testsuite/gas/i386/x86-64-align-branch-1a.d

@ -73,5 +73,5 @@ Disassembly of section .text:
be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c4: eb c2 jmp (0x)?88( .*)?
c6: 5d pop %rbp
c7: c3 retq
c7: c3 ret *
#pass

2
gas/testsuite/gas/i386/x86-64-align-branch-1b.d

@ -73,5 +73,5 @@ Disassembly of section .text:
be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c4: eb c2 jmp (0x)?88( .*)?
c6: 5d pop %rbp
c7: c3 retq
c7: c3 ret *
#pass

2
gas/testsuite/gas/i386/x86-64-align-branch-1c.d

@ -73,5 +73,5 @@ Disassembly of section .text:
be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c4: eb c2 jmp (0x)?88( .*)?
c6: 5d pop %rbp
c7: c3 retq
c7: c3 ret *
#pass

2
gas/testsuite/gas/i386/x86-64-align-branch-1d.d

@ -72,5 +72,5 @@ Disassembly of section .text:
bc: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c2: eb c2 jmp (0x)?86( .*)?
c4: 5d pop %rbp
c5: c3 retq
c5: c3 ret *
#pass

2
gas/testsuite/gas/i386/x86-64-align-branch-1e.d

@ -72,5 +72,5 @@ Disassembly of section .text:
b9: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
bf: eb c2 jmp (0x)?83( .*)?
c1: 5d pop %rbp
c2: c3 retq
c2: c3 ret *
#pass

2
gas/testsuite/gas/i386/x86-64-align-branch-1f.d

@ -73,5 +73,5 @@ Disassembly of section .text:
bb: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c1: eb c2 jmp (0x)?85( .*)?
c3: 5d pop %rbp
c4: c3 retq
c4: c3 ret *
#pass

2
gas/testsuite/gas/i386/x86-64-align-branch-1g.d

@ -73,5 +73,5 @@ Disassembly of section .text:
be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c4: eb c2 jmp (0x)?88( .*)?
c6: 5d pop %rbp
c7: c3 retq
c7: c3 ret *
#pass

2
gas/testsuite/gas/i386/x86-64-align-branch-1h.d

@ -72,5 +72,5 @@ Disassembly of section .text:
b8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
be: eb c2 jmp (0x)?82( .*)?
c0: 5d pop %rbp
c1: c3 retq
c1: c3 ret *
#pass

2
gas/testsuite/gas/i386/x86-64-align-branch-1i.d

@ -76,5 +76,5 @@ Disassembly of section .text:
be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c4: eb c2 jmp (0x)?88( .*)?
c6: 5d pop %rbp
c7: c3 retq
c7: c3 ret *
#pass

8
gas/testsuite/gas/i386/x86-64-align-branch-2a.d

@ -18,7 +18,7 @@ Disassembly of section .text:
15: 89 75 f4 mov %esi,-0xc\(%rbp\)
18: 89 75 f4 mov %esi,-0xc\(%rbp\)
1b: 89 75 f4 mov %esi,-0xc\(%rbp\)
1e: ff e0 jmpq \*%rax
1e: ff e0 jmp \*%rax
20: 55 push %rbp
21: 55 push %rbp
22: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1
@ -28,7 +28,7 @@ Disassembly of section .text:
33: 89 75 f4 mov %esi,-0xc\(%rbp\)
36: 89 75 f4 mov %esi,-0xc\(%rbp\)
39: 89 75 f4 mov %esi,-0xc\(%rbp\)
3c: ff d0 callq \*%rax
3c: ff d0 call \*%rax
3e: 89 75 f4 mov %esi,-0xc\(%rbp\)
41: 55 push %rbp
42: 55 push %rbp
@ -37,7 +37,7 @@ Disassembly of section .text:
4e: 89 75 f4 mov %esi,-0xc\(%rbp\)
51: 89 75 f4 mov %esi,-0xc\(%rbp\)
54: 89 75 f4 mov %esi,-0xc\(%rbp\)
57: e8 [0-9a-f ]+ callq .*
57: e8 [0-9a-f ]+ call .*
5c: 89 75 f4 mov %esi,-0xc\(%rbp\)
5f: 55 push %rbp
60: 55 push %rbp
@ -45,6 +45,6 @@ Disassembly of section .text:
62: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1
6a: 48 89 e5 mov %rsp,%rbp
6d: 89 75 f4 mov %esi,-0xc\(%rbp\)
70: ff 14 25 00 00 00 00 callq \*0x0
70: ff 14 25 00 00 00 00 call \*0x0
77: 55 push %rbp
#pass

8
gas/testsuite/gas/i386/x86-64-align-branch-2b.d

@ -18,7 +18,7 @@ Disassembly of section .text:
17: 89 75 f4 mov %esi,-0xc\(%rbp\)
1a: 89 75 f4 mov %esi,-0xc\(%rbp\)
1d: 89 75 f4 mov %esi,-0xc\(%rbp\)
20: ff e0 jmpq \*%rax
20: ff e0 jmp \*%rax
22: 2e 2e 55 cs cs push %rbp
25: 55 push %rbp
26: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1
@ -28,7 +28,7 @@ Disassembly of section .text:
37: 89 75 f4 mov %esi,-0xc\(%rbp\)
3a: 89 75 f4 mov %esi,-0xc\(%rbp\)
3d: 89 75 f4 mov %esi,-0xc\(%rbp\)
40: ff d0 callq \*%rax
40: ff d0 call \*%rax
42: 89 75 f4 mov %esi,-0xc\(%rbp\)
45: 55 push %rbp
46: 55 push %rbp
@ -37,7 +37,7 @@ Disassembly of section .text:
52: 89 75 f4 mov %esi,-0xc\(%rbp\)
55: 89 75 f4 mov %esi,-0xc\(%rbp\)
58: 89 75 f4 mov %esi,-0xc\(%rbp\)
5b: e8 [0-9a-f ]+ callq .*
5b: e8 [0-9a-f ]+ call .*
60: 89 75 f4 mov %esi,-0xc\(%rbp\)
63: 55 push %rbp
64: 55 push %rbp
@ -45,6 +45,6 @@ Disassembly of section .text:
66: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1
6e: 48 89 e5 mov %rsp,%rbp
71: 89 75 f4 mov %esi,-0xc\(%rbp\)
74: ff 14 25 00 00 00 00 callq \*0x0
74: ff 14 25 00 00 00 00 call \*0x0
7b: 55 push %rbp
#pass

8
gas/testsuite/gas/i386/x86-64-align-branch-2c.d

@ -18,7 +18,7 @@ Disassembly of section .text:
17: 89 75 f4 mov %esi,-0xc\(%rbp\)
1a: 89 75 f4 mov %esi,-0xc\(%rbp\)
1d: 89 75 f4 mov %esi,-0xc\(%rbp\)
20: ff e0 jmpq \*%rax
20: ff e0 jmp \*%rax
22: 2e 2e 55 cs cs push %rbp
25: 55 push %rbp
26: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1
@ -28,7 +28,7 @@ Disassembly of section .text:
37: 89 75 f4 mov %esi,-0xc\(%rbp\)
3a: 89 75 f4 mov %esi,-0xc\(%rbp\)
3d: 89 75 f4 mov %esi,-0xc\(%rbp\)
40: ff d0 callq \*%rax
40: ff d0 call \*%rax
42: 2e 2e 2e 2e 2e 89 75 f4 cs cs cs cs mov %esi,%cs:-0xc\(%rbp\)
4a: 55 push %rbp
4b: 55 push %rbp
@ -37,7 +37,7 @@ Disassembly of section .text:
57: 89 75 f4 mov %esi,-0xc\(%rbp\)
5a: 89 75 f4 mov %esi,-0xc\(%rbp\)
5d: 89 75 f4 mov %esi,-0xc\(%rbp\)
60: e8 [0-9a-f ]+ callq .*
60: e8 [0-9a-f ]+ call .*
65: 2e 2e 2e 2e 2e 89 75 f4 cs cs cs cs mov %esi,%cs:-0xc\(%rbp\)
6d: 2e 2e 55 cs cs push %rbp
70: 55 push %rbp
@ -45,6 +45,6 @@ Disassembly of section .text:
72: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1
7a: 48 89 e5 mov %rsp,%rbp
7d: 89 75 f4 mov %esi,-0xc\(%rbp\)
80: ff 14 25 00 00 00 00 callq \*0x0
80: ff 14 25 00 00 00 00 call \*0x0
87: 55 push %rbp
#pass

4
gas/testsuite/gas/i386/x86-64-align-branch-3.d

@ -17,7 +17,7 @@ Disassembly of section .text:
15: 89 75 f4 mov %esi,-0xc\(%rbp\)
18: 89 75 f4 mov %esi,-0xc\(%rbp\)
1b: 89 75 f4 mov %esi,-0xc\(%rbp\)
1e: e8 00 00 00 00 callq 23 <foo\+0x23>
1e: e8 00 00 00 00 call 23 <foo\+0x23>
23: 55 push %rbp
24: 55 push %rbp
25: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1
@ -27,6 +27,6 @@ Disassembly of section .text:
36: 89 75 f4 mov %esi,-0xc\(%rbp\)
39: 89 75 f4 mov %esi,-0xc\(%rbp\)
3c: 89 75 f4 mov %esi,-0xc\(%rbp\)
3f: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 45 <foo\+0x45>
3f: ff 15 00 00 00 00 call \*0x0\(%rip\) # 45 <foo\+0x45>
45: 89 75 f4 mov %esi,-0xc\(%rbp\)
#pass

4
gas/testsuite/gas/i386/x86-64-align-branch-4a.d

@ -17,7 +17,7 @@ Disassembly of section .text:
16: 89 75 f4 mov %esi,-0xc\(%rbp\)
19: 89 75 f4 mov %esi,-0xc\(%rbp\)
1c: 89 75 f4 mov %esi,-0xc\(%rbp\)
1f: c3 retq
1f: c3 ret *
20: 55 push %rbp
21: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1
29: 55 push %rbp
@ -28,6 +28,6 @@ Disassembly of section .text:
34: 89 75 f4 mov %esi,-0xc\(%rbp\)
37: 89 75 f4 mov %esi,-0xc\(%rbp\)
3a: 89 75 f4 mov %esi,-0xc\(%rbp\)
3d: c2 1e 00 retq \$0x1e
3d: c2 1e 00 ret \$0x1e
40: 55 push %rbp
#pass

4
gas/testsuite/gas/i386/x86-64-align-branch-4b.d

@ -17,7 +17,7 @@ Disassembly of section .text:
17: 89 75 f4 mov %esi,-0xc\(%rbp\)
1a: 89 75 f4 mov %esi,-0xc\(%rbp\)
1d: 89 75 f4 mov %esi,-0xc\(%rbp\)
20: c3 retq
20: c3 ret *
21: 2e 2e 55 cs cs push %rbp
24: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1
2c: 55 push %rbp
@ -28,6 +28,6 @@ Disassembly of section .text:
37: 89 75 f4 mov %esi,-0xc\(%rbp\)
3a: 89 75 f4 mov %esi,-0xc\(%rbp\)
3d: 89 75 f4 mov %esi,-0xc\(%rbp\)
40: c2 1e 00 retq \$0x1e
40: c2 1e 00 ret \$0x1e
43: 55 push %rbp
#pass

2
gas/testsuite/gas/i386/x86-64-align-branch-5.d

@ -33,7 +33,7 @@ Disassembly of section .text:
38: c1 e9 02 shr \$0x2,%ecx
3b: c1 e9 02 shr \$0x2,%ecx
3e: f6 c2 02 test \$0x2,%dl
41: e8 00 00 00 00 callq (0x)?46( .*)?
41: e8 00 00 00 00 call (0x)?46( .*)?
46: 75 e3 jne (0x)?2b( .*)?
48: 31 c0 xor %eax,%eax
#pass

2
gas/testsuite/gas/i386/x86-64-align-branch-6.d

@ -15,5 +15,5 @@ Disassembly of section .text:
+[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
+[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[a-f0-9]+: f2 73 bf bnd jae 0 <_start>
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
#pass

4
gas/testsuite/gas/i386/x86-64-branch-2.d

@ -9,12 +9,12 @@ Disassembly of section .text:
0+ <bar-0xb>:
[ ]*[a-f0-9]+: 66 e9 00 00 jmpw 4 <bar-0x7> 2: R_X86_64_PC16 foo-0x2
[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 jmpq b <bar> 7: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmp b <bar> 7: R_X86_64_PLT32 foo-0x4
0+b <bar>:
[ ]*[a-f0-9]+: 89 c3 mov %eax,%ebx
[ ]*[a-f0-9]+: 66 e8 00 00 callw 11 <bar\+0x6> f: R_X86_64_PC16 foo-0x2
[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 callq 18 <bar\+0xd> 14: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W call 18 <bar\+0xd> 14: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 c3 retw *
[ ]*[a-f0-9]+: 66 c2 08 00 retw \$0x8
#pass

10
gas/testsuite/gas/i386/x86-64-branch-3.d

@ -8,15 +8,15 @@
Disassembly of section .text:
0+ <bar-0xd>:
[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmpq 6 <bar-0x7> 2: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmpq d <bar> 9: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmp 6 <bar-0x7> 2: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmp d <bar> 9: R_X86_64_PLT32 foo-0x4
0+d <bar>:
[ ]*[a-f0-9]+: 89 c3 mov %eax,%ebx
[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 callq 15 <bar\+0x8> 11: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W callq 1c <bar\+0xf> 18: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 call 15 <bar\+0x8> 11: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W call 1c <bar\+0xf> 18: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 c7 f8 00 00 xbeginw 21 <bar\+0x14> 1f: R_X86_64_PC16 foo-0x2
[ ]*[a-f0-9]+: 66 48 c7 f8 00 00 00 00 data16 xbeginq 29 <bar\+0x1c> 25: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 48 c7 f8 00 00 00 00 data16 rex\.W xbegin 29 <bar\+0x1c> 25: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 48 ff 18 lcallq \*\(%rax\)
[ ]*[a-f0-9]+: 48 ff 29 ljmpq \*\(%rcx\)
#pass

60
gas/testsuite/gas/i386/x86-64-branch.d

@ -7,35 +7,35 @@
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 callq \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 callq \*%rax
[ ]*[a-f0-9]+: 66 ff 10 data16 callq \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmpq \*%rax
[ ]*[a-f0-9]+: ff e0 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff 20 data16 jmpq \*\(%rax\)
[ ]*[a-f0-9]+: e8 (00|5b) 00 (00|10) 00 callq (0x1f|10007a <.text\+0x10007a>)
[ ]*[a-f0-9]+: e9 (00|60) 00 (00|10) 00 jmpq (0x24|100084 <.text\+0x100084>)
[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 callq (0x2a|2a <.text\+0x2a>)
[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmpq (0x30|30 <.text\+0x30>)
[ ]*[a-f0-9]+: ff d0 call \*%rax
[ ]*[a-f0-9]+: ff d0 call \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 call \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 call \*%rax
[ ]*[a-f0-9]+: 66 ff 10 data16 call \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmp \*%rax
[ ]*[a-f0-9]+: ff e0 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff 20 data16 jmp \*\(%rax\)
[ ]*[a-f0-9]+: e8 (00|5b) 00 (00|10) 00 call (0x1f|10007a <.text\+0x10007a>)
[ ]*[a-f0-9]+: e9 (00|60) 00 (00|10) 00 jmp (0x24|100084 <.text\+0x100084>)
[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 call (0x2a|2a <.text\+0x2a>)
[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmp (0x30|30 <.text\+0x30>)
[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb (0x37|37 <.text\+0x37>)
[ ]*[a-f0-9]+: 66 c3 data16 retq *
[ ]*[a-f0-9]+: 66 c2 08 00 data16 retq \$0x8
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 callq \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 callq \*%rax
[ ]*[a-f0-9]+: 66 ff 10 data16 callq \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmpq \*%rax
[ ]*[a-f0-9]+: ff e0 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff 20 data16 jmpq \*\(%rax\)
[ ]*[a-f0-9]+: e8 .. 00 (00|10) 00 callq (0x[0-9a-f]*|100[0-9a-f]* <.text\+0x100[0-9a-f]*>)
[ ]*[a-f0-9]+: e9 .. 00 (00|10) 00 jmpq (0x[0-9a-f]*|100[0-9a-f]* <.text\+0x100[0-9a-f]*>)
[ ]*[a-f0-9]+: 66 c3 data16 retq *
[ ]*[a-f0-9]+: 66 c2 08 00 data16 retq \$0x8
[ ]*[a-f0-9]+: 66 c3 data16 ret *
[ ]*[a-f0-9]+: 66 c2 08 00 data16 ret \$0x8
[ ]*[a-f0-9]+: ff d0 call \*%rax
[ ]*[a-f0-9]+: ff d0 call \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 call \*%rax
[ ]*[a-f0-9]+: 66 ff d0 data16 call \*%rax
[ ]*[a-f0-9]+: 66 ff 10 data16 call \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmp \*%rax
[ ]*[a-f0-9]+: ff e0 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff e0 data16 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff 20 data16 jmp \*\(%rax\)
[ ]*[a-f0-9]+: e8 .. 00 (00|10) 00 call (0x[0-9a-f]*|100[0-9a-f]* <.text\+0x100[0-9a-f]*>)
[ ]*[a-f0-9]+: e9 .. 00 (00|10) 00 jmp (0x[0-9a-f]*|100[0-9a-f]* <.text\+0x100[0-9a-f]*>)
[ ]*[a-f0-9]+: 66 c3 data16 ret *
[ ]*[a-f0-9]+: 66 c2 08 00 data16 ret \$0x8
#pass

36
gas/testsuite/gas/i386/x86-64-disassem.d

@ -246,51 +246,51 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq \(%rcx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq \$0x1
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq \(%rcx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq \$0x1
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq \(%rcx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq \$0x1
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq \(%rcx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq \$0x1
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq \(%rcx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq \$0x1
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq \(%rcx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq \$0x1
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq \(%rcx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq \$0x1
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq \(%rcx\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq \$0x1
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)[ ]*
@ -346,9 +346,9 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*62 72 ad 08 1c[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*01 01[ ]*add[ ]*%eax,\(%rcx\)
[ ]*[a-f0-9]+:[ ]*62 f3 7d 28 1b[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*c8 25 62 f3[ ]*enterq[ ]*\$0x6225,\$0xf3
[ ]*[a-f0-9]+:[ ]*c8 25 62 f3[ ]*enter *\$0x6225,\$0xf3
[ ]*[a-f0-9]+:[ ]*62 f3 75 08 23[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*c2 25 62[ ]*retq[ ]*\$0x6225
[ ]*[a-f0-9]+:[ ]*c2 25 62[ ]*ret *\$0x6225
[ ]*[a-f0-9]+:[ ]*62 f2 7d 28 5b[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*41 37[ ]*rex.B \(bad\)[ ]*
#pass

2
gas/testsuite/gas/i386/x86-64-disp32.d

@ -18,7 +18,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3
[ ]*[a-f0-9]+: eb 07 jmp 30 <foo>
[ ]*[a-f0-9]+: eb 05 jmp 30 <foo>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 30 <foo>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 30 <foo>
0+30 <foo>:
[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%rax\)

17
gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d

@ -1,4 +1,5 @@
#source: x86-64-gotpcrel.s
#name: x86-64 gotpcrel (no relax)
#as: -mrelax-relocations=no
#objdump: -dwr
@ -12,16 +13,16 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax b: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 16 <_start\+0x16> 12: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 19: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 23 <_start\+0x23> 1f: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0\(%rip\) # 23 <_start\+0x23> 1f: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0\(%rip\) # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmp \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax 38: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax 40: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 4b <_start\+0x4b> 47: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 4e: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 58 <_start\+0x58> 54: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 64 <_start\+0x64> 60: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0\(%rip\) # 58 <_start\+0x58> 54: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0\(%rip\) # 64 <_start\+0x64> 60: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmp \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo
#pass

17
gas/testsuite/gas/i386/x86-64-gotpcrel.d

@ -1,5 +1,6 @@
#as: -mrelax-relocations=yes
#objdump: -dwr
#name: x86-64 gotpcrel
.*: +file format .*
@ -11,16 +12,16 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax b: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 16 <_start\+0x16> 12: R_X86_64_REX_GOTPCRELX foo-0x4
[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 19: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 23 <_start\+0x23> 1f: R_X86_64_GOTPCRELX foo-0x4
[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCRELX foo-0x4
[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0\(%rip\) # 23 <_start\+0x23> 1f: R_X86_64_GOTPCRELX foo-0x4
[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0\(%rip\) # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCRELX foo-0x4
[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmp \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax 38: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax 40: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 4b <_start\+0x4b> 47: R_X86_64_REX_GOTPCRELX foo-0x4
[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 4e: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 58 <_start\+0x58> 54: R_X86_64_GOTPCRELX foo-0x4
[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 64 <_start\+0x64> 60: R_X86_64_GOTPCRELX foo-0x4
[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0\(%rip\) # 58 <_start\+0x58> 54: R_X86_64_GOTPCRELX foo-0x4
[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0\(%rip\) # 64 <_start\+0x64> 60: R_X86_64_GOTPCRELX foo-0x4
[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmp \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo
#pass

6
gas/testsuite/gas/i386/x86-64-ifunc.d

@ -7,14 +7,14 @@
Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 5 <ifunc> 1: R_X86_64_PLT32 ifunc(\+0xf+c|-0x4)
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 5 <ifunc> 1: R_X86_64_PLT32 ifunc(\+0xf+c|-0x4)
0+5 <ifunc>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+6 <bar>:
[ ]*[a-f0-9]+: eb 00 jmp 8 <normal>
0+8 <normal>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
#pass

26
gas/testsuite/gas/i386/x86-64-jump.d

@ -9,19 +9,19 @@ Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: eb fe jmp (0x0|0 <.text>)
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x7 3: R_X86_64_PLT32 xxx-0x4
[ ]*[a-f0-9]+: ff 24 25 00 00 00 00 jmpq \*0x0 a: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff e7 jmpq \*%rdi
[ ]*[a-f0-9]+: ff 27 jmpq \*\(%rdi\)
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 0x7 3: R_X86_64_PLT32 xxx-0x4
[ ]*[a-f0-9]+: ff 24 25 00 00 00 00 jmp \*0x0 a: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff e7 jmp \*%rdi
[ ]*[a-f0-9]+: ff 27 jmp \*\(%rdi\)
[ ]*[a-f0-9]+: ff 2c bd 00 00 00 00 ljmp \*0x0\(,%rdi,4\) 15: R_X86_64_32S xxx
[ ]*[a-f0-9]+: 66 ff 2c bd 00 00 00 00 ljmpw \*0x0\(,%rdi,4\) 1d: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff 2c 25 00 00 00 00 ljmp \*0x0 24: R_X86_64_32S xxx
[ ]*[a-f0-9]+: 66 ff 2c 25 00 00 00 00 ljmpw \*0x0 2c: R_X86_64_32S xxx
[ ]*[a-f0-9]+: e8 cb ff ff ff callq 0x0
[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x3a 36: R_X86_64_PLT32 xxx-0x4
[ ]*[a-f0-9]+: ff 14 25 00 00 00 00 callq \*0x0 3d: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff d7 callq \*%rdi
[ ]*[a-f0-9]+: ff 17 callq \*\(%rdi\)
[ ]*[a-f0-9]+: e8 cb ff ff ff call 0x0
[ ]*[a-f0-9]+: e8 00 00 00 00 call 0x3a 36: R_X86_64_PLT32 xxx-0x4
[ ]*[a-f0-9]+: ff 14 25 00 00 00 00 call \*0x0 3d: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff d7 call \*%rdi
[ ]*[a-f0-9]+: ff 17 call \*\(%rdi\)
[ ]*[a-f0-9]+: ff 1c bd 00 00 00 00 lcall \*0x0\(,%rdi,4\) 48: R_X86_64_32S xxx
[ ]*[a-f0-9]+: 66 ff 1c bd 00 00 00 00 lcallw \*0x0\(,%rdi,4\) 50: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff 1c 25 00 00 00 00 lcall \*0x0 57: R_X86_64_32S xxx
@ -33,14 +33,14 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 ff 13 callw \*\(%rbx\)
[ ]*[a-f0-9]+: 66 ff 1b lcallw \*\(%rbx\)
[ ]*[a-f0-9]+: ff 1b lcall \*\(%rbx\)
[ ]*[a-f0-9]+: ff 13 callq \*\(%rbx\)
[ ]*[a-f0-9]+: ff 13 callq \*\(%rbx\)
[ ]*[a-f0-9]+: ff 13 call \*\(%rbx\)
[ ]*[a-f0-9]+: ff 13 call \*\(%rbx\)
[ ]*[a-f0-9]+: ff 1b lcall \*\(%rbx\)
[ ]*[a-f0-9]+: 66 ff 23 jmpw \*\(%rbx\)
[ ]*[a-f0-9]+: 66 ff 2b ljmpw \*\(%rbx\)
[ ]*[a-f0-9]+: ff 2b ljmp \*\(%rbx\)
[ ]*[a-f0-9]+: ff 23 jmpq \*\(%rbx\)
[ ]*[a-f0-9]+: ff 23 jmpq \*\(%rbx\)
[ ]*[a-f0-9]+: ff 23 jmp \*\(%rbx\)
[ ]*[a-f0-9]+: ff 23 jmp \*\(%rbx\)
[ ]*[a-f0-9]+: ff 2b ljmp \*\(%rbx\)
[ ]*[a-f0-9]+: eb 00 jmp 0x[0-9a-f]*
[ ]*[a-f0-9]+: 90 nop

20
gas/testsuite/gas/i386/x86-64-lfence-byte.d

@ -12,19 +12,19 @@ Disassembly of section .text:
+[a-f0-9]+: f3 aa rep stos %al,%es:\(%rdi\)
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f3 c3 repz retq
+[a-f0-9]+: f3 c3 repz retq
+[a-f0-9]+: f3 c3 repz retq
+[a-f0-9]+: f3 c3 repz ret *
+[a-f0-9]+: f3 c3 repz ret *
+[a-f0-9]+: f3 c3 repz ret *
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff d0 callq \*%rax
+[a-f0-9]+: f3 c3 repz retq
+[a-f0-9]+: ff d0 call \*%rax
+[a-f0-9]+: f3 c3 repz ret *
+[a-f0-9]+: 66 66 c3 data16 retw
+[a-f0-9]+: f3 c3 repz retq
+[a-f0-9]+: f3 c3 repz ret *
+[a-f0-9]+: 9b fwait
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f3 c3 repz retq
+[a-f0-9]+: f3 c3 repz retq
+[a-f0-9]+: c3 retq
+[a-f0-9]+: f3 ff d0 repz callq \*%rax
+[a-f0-9]+: f3 c3 repz ret *
+[a-f0-9]+: f3 c3 repz ret *
+[a-f0-9]+: c3 ret *
+[a-f0-9]+: f3 ff d0 repz call \*%rax
#pass

12
gas/testsuite/gas/i386/x86-64-lfence-indbr-a.d

@ -11,11 +11,11 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff d2 callq \*%rdx
+[a-f0-9]+: ff d2 call \*%rdx
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff e2 jmpq \*%rdx
+[a-f0-9]+: ff 12 callq \*\(%rdx\)
+[a-f0-9]+: ff 22 jmpq \*\(%rdx\)
+[a-f0-9]+: ff 14 25 00 00 00 00 callq \*0x0
+[a-f0-9]+: ff 24 25 00 00 00 00 jmpq \*0x0
+[a-f0-9]+: ff e2 jmp \*%rdx
+[a-f0-9]+: ff 12 call \*\(%rdx\)
+[a-f0-9]+: ff 22 jmp \*\(%rdx\)
+[a-f0-9]+: ff 14 25 00 00 00 00 call \*0x0
+[a-f0-9]+: ff 24 25 00 00 00 00 jmp \*0x0
#pass

12
gas/testsuite/gas/i386/x86-64-lfence-indbr-b.d

@ -10,11 +10,11 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff d2 callq \*%rdx
+[a-f0-9]+: ff d2 call \*%rdx
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff e2 jmpq \*%rdx
+[a-f0-9]+: ff 12 callq \*\(%rdx\)
+[a-f0-9]+: ff 22 jmpq \*\(%rdx\)
+[a-f0-9]+: ff 14 25 00 00 00 00 callq \*0x0
+[a-f0-9]+: ff 24 25 00 00 00 00 jmpq \*0x0
+[a-f0-9]+: ff e2 jmp \*%rdx
+[a-f0-9]+: ff 12 call \*\(%rdx\)
+[a-f0-9]+: ff 22 jmp \*\(%rdx\)
+[a-f0-9]+: ff 14 25 00 00 00 00 call \*0x0
+[a-f0-9]+: ff 24 25 00 00 00 00 jmp \*0x0
#pass

12
gas/testsuite/gas/i386/x86-64-lfence-indbr-c.d

@ -10,10 +10,10 @@
Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: ff d2 callq \*%rdx
+[a-f0-9]+: ff e2 jmpq \*%rdx
+[a-f0-9]+: ff 12 callq \*\(%rdx\)
+[a-f0-9]+: ff 22 jmpq \*\(%rdx\)
+[a-f0-9]+: ff 14 25 00 00 00 00 callq \*0x0
+[a-f0-9]+: ff 24 25 00 00 00 00 jmpq \*0x0
+[a-f0-9]+: ff d2 call \*%rdx
+[a-f0-9]+: ff e2 jmp \*%rdx
+[a-f0-9]+: ff 12 call \*\(%rdx\)
+[a-f0-9]+: ff 22 jmp \*\(%rdx\)
+[a-f0-9]+: ff 14 25 00 00 00 00 call \*0x0
+[a-f0-9]+: ff 24 25 00 00 00 00 jmp \*0x0
#pass

8
gas/testsuite/gas/i386/x86-64-lfence-load.d

@ -33,9 +33,9 @@ Disassembly of section .text:
+[a-f0-9]+: 0f 18 55 00 prefetcht1 0x0\(%rbp\)
+[a-f0-9]+: 0f 18 5d 00 prefetcht2 0x0\(%rbp\)
+[a-f0-9]+: 0f 0d 4d 00 prefetchw 0x0\(%rbp\)
+[a-f0-9]+: 0f a1 popq %fs
+[a-f0-9]+: 0f a1 pop %fs
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 9d popfq
+[a-f0-9]+: 9d popf *
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: d7 xlat %ds:\(%rbx\)
+[a-f0-9]+: 0f ae e8 lfence
@ -79,7 +79,7 @@ Disassembly of section .text:
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f 0f 66 02 b0 pfcmpeq 0x2\(%rsi\),%mm4
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 8f 00 popq \(%rax\)
+[a-f0-9]+: 8f 00 pop \(%rax\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 58 pop %rax
+[a-f0-9]+: 0f ae e8 lfence
@ -100,7 +100,7 @@ Disassembly of section .text:
+[a-f0-9]+: f7 29 imull \(%rcx\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 48 8d 04 40 lea \(%rax,%rax,2\),%rax
+[a-f0-9]+: c9 leaveq
+[a-f0-9]+: c9 leave *
+[a-f0-9]+: 6e outsb %ds:\(%rsi\),\(%dx\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ac lods %ds:\(%rsi\),%al

12
gas/testsuite/gas/i386/x86-64-lfence-ret-a.d

@ -11,20 +11,20 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c3 data16 retq
+[a-f0-9]+: 66 c3 data16 ret *
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 data16 retq \$0x14
+[a-f0-9]+: 66 c2 14 00 data16 ret \$0x14
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 retq \$0x1e
+[a-f0-9]+: c2 1e 00 ret \$0x1e
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c3 data16 rex.W retq
+[a-f0-9]+: 66 48 c3 data16 rex\.W ret *
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c2 28 00 data16 rex.W retq \$0x28
+[a-f0-9]+: 66 48 c2 28 00 data16 rex\.W ret \$0x28
#pass

12
gas/testsuite/gas/i386/x86-64-lfence-ret-b.d

@ -12,25 +12,25 @@ Disassembly of section .text:
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c3 data16 retq
+[a-f0-9]+: 66 c3 data16 ret *
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 data16 retq \$0x14
+[a-f0-9]+: 66 c2 14 00 data16 ret \$0x14
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 retq \$0x1e
+[a-f0-9]+: c2 1e 00 ret \$0x1e
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c3 data16 rex.W retq
+[a-f0-9]+: 66 48 c3 data16 rex\.W ret *
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c2 28 00 data16 rex.W retq \$0x28
+[a-f0-9]+: 66 48 c2 28 00 data16 rex\.W ret \$0x28
#pass

12
gas/testsuite/gas/i386/x86-64-lfence-ret-c.d

@ -10,20 +10,20 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c3 data16 retq
+[a-f0-9]+: 66 c3 data16 ret *
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 data16 retq \$0x14
+[a-f0-9]+: 66 c2 14 00 data16 ret \$0x14
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 retq \$0x1e
+[a-f0-9]+: c2 1e 00 ret \$0x1e
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c3 data16 rex.W retq
+[a-f0-9]+: 66 48 c3 data16 rex\.W ret *
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c2 28 00 data16 rex.W retq \$0x28
+[a-f0-9]+: 66 48 c2 28 00 data16 rex\.W ret \$0x28
#pass

12
gas/testsuite/gas/i386/x86-64-lfence-ret-d.d

@ -11,20 +11,20 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c3 data16 retq
+[a-f0-9]+: 66 c3 data16 ret *
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 data16 retq \$0x14
+[a-f0-9]+: 66 c2 14 00 data16 ret \$0x14
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 retq \$0x1e
+[a-f0-9]+: c2 1e 00 ret \$0x1e
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c3 data16 rex.W retq
+[a-f0-9]+: 66 48 c3 data16 rex\.W ret *
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c2 28 00 data16 rex.W retq \$0x28
+[a-f0-9]+: 66 48 c2 28 00 data16 rex\.W ret \$0x28
#pass

12
gas/testsuite/gas/i386/x86-64-lfence-ret-e.d

@ -11,20 +11,20 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c3 data16 retq
+[a-f0-9]+: 66 c3 data16 ret *
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 data16 retq \$0x14
+[a-f0-9]+: 66 c2 14 00 data16 ret \$0x14
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 retq \$0x1e
+[a-f0-9]+: c2 1e 00 ret \$0x1e
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c3 data16 rex.W retq
+[a-f0-9]+: 66 48 c3 data16 rex\.W ret *
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
+[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c2 28 00 data16 rex.W retq \$0x28
+[a-f0-9]+: 66 48 c2 28 00 data16 rex\.W ret \$0x28
#pass

18
gas/testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d

@ -9,19 +9,19 @@
Disassembly of section .text:
0+ <.*>:
[ ]*[a-f0-9]+: f2 e8 0e 00 00 00 bnd callq 14 <foo>
[ ]*[a-f0-9]+: f2 ff 10 bnd callq \*\(%rax\)
[ ]*[a-f0-9]+: f2 e8 0e 00 00 00 bnd call 14 <foo>
[ ]*[a-f0-9]+: f2 ff 10 bnd call \*\(%rax\)
[ ]*[a-f0-9]+: f2 74 08 bnd je 14 <foo>
[ ]*[a-f0-9]+: f2 eb 05 bnd jmp 14 <foo>
[ ]*[a-f0-9]+: f2 ff 23 bnd jmpq \*\(%rbx\)
[ ]*[a-f0-9]+: f2 c3 bnd retq
[ ]*[a-f0-9]+: f2 ff 23 bnd jmp \*\(%rbx\)
[ ]*[a-f0-9]+: f2 c3 bnd ret *
0+14 <foo>:
[ ]*[a-f0-9]+: f2 c3 bnd retq
[ ]*[a-f0-9]+: f2 c3 bnd retq
[ ]*[a-f0-9]+: f2 c3 bnd retq
[ ]*[a-f0-9]+: f2 c3 bnd retq
[ ]*[a-f0-9]+: f2 e8 f2 ff ff ff bnd callq 14 <foo>
[ ]*[a-f0-9]+: f2 c3 bnd ret *
[ ]*[a-f0-9]+: f2 c3 bnd ret *
[ ]*[a-f0-9]+: f2 c3 bnd ret *
[ ]*[a-f0-9]+: f2 c3 bnd ret *
[ ]*[a-f0-9]+: f2 e8 f2 ff ff ff bnd call 14 <foo>
[ ]*[a-f0-9]+: 48 01 c3 add %rax,%rbx
[ ]*[a-f0-9]+: e2 ed loop 14 <foo>
#pass

20
gas/testsuite/gas/i386/x86-64-mpx-branch-1.d

@ -9,23 +9,23 @@
Disassembly of section .text:
0+ <foo1-0x1c>:
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x16> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1-0x10> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 f2 48 e8 00 00 00 00 data16 bnd callq 14 <foo1-0x8> 10: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 f2 48 e9 00 00 00 00 data16 bnd jmpq 1c <foo1> 18: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd call 6 <foo1-0x16> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmp c <foo1-0x10> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 f2 48 e8 00 00 00 00 data16 bnd rex\.W call 14 <foo1-0x8> 10: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: 66 f2 48 e9 00 00 00 00 data16 bnd rex\.W jmp 1c <foo1> 18: R_X86_64_PC32 \*ABS\*\+0x10003c
0+1c <foo1>:
[ ]*[a-f0-9]+: f2 eb fd bnd jmp 1c <foo1>
[ ]*[a-f0-9]+: f2 72 fa bnd jb 1c <foo1>
[ ]*[a-f0-9]+: f2 e8 f4 ff ff ff bnd callq 1c <foo1>
[ ]*[a-f0-9]+: f2 e8 f4 ff ff ff bnd call 1c <foo1>
[ ]*[a-f0-9]+: f2 eb 09 bnd jmp 34 <foo2>
[ ]*[a-f0-9]+: f2 72 06 bnd jb 34 <foo2>
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 34 <foo2>
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd call 34 <foo2>
0+34 <foo2>:
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3a <foo2\+0x6> 36: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmp 3a <foo2\+0x6> 36: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 41 <foo2\+0xd> 3d: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 47 <foo2\+0x13> 43: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 4d <foo2\+0x19> 49: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd call 47 <foo2\+0x13> 43: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmp 4d <foo2\+0x19> 49: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 54 <foo2\+0x20> 50: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 5a <foo2\+0x26> 56: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd call 5a <foo2\+0x26> 56: R_X86_64_PLT32 foo-0x4

28
gas/testsuite/gas/i386/x86-64-mpx.d

@ -85,14 +85,14 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 1a 14 1d 03 00 00 00 bndldx 0x3\(,%rbx,1\),%bnd2
[ ]*[a-f0-9]+: 42 0f 1a 14 25 03 00 00 00 bndldx 0x3\(,%r12,1\),%bnd2
[ ]*[a-f0-9]+: 0f 1a 0a bndldx \(%rdx\),%bnd1
[ ]*[a-f0-9]+: f2 e8 25 02 00 00 bnd callq 416 <foo>
[ ]*[a-f0-9]+: f2 ff 10 bnd callq \*\(%rax\)
[ ]*[a-f0-9]+: f2 41 ff 13 bnd callq \*\(%r11\)
[ ]*[a-f0-9]+: f2 e8 25 02 00 00 bnd call 416 <foo>
[ ]*[a-f0-9]+: f2 ff 10 bnd call \*\(%rax\)
[ ]*[a-f0-9]+: f2 41 ff 13 bnd call \*\(%r11\)
[ ]*[a-f0-9]+: f2 0f 84 17 02 00 00 bnd je 416 <foo>
[ ]*[a-f0-9]+: f2 e9 11 02 00 00 bnd jmpq 416 <foo>
[ ]*[a-f0-9]+: f2 ff 21 bnd jmpq \*\(%rcx\)
[ ]*[a-f0-9]+: f2 41 ff 24 24 bnd jmpq \*\(%r12\)
[ ]*[a-f0-9]+: f2 c3 bnd retq
[ ]*[a-f0-9]+: f2 e9 11 02 00 00 bnd jmp 416 <foo>
[ ]*[a-f0-9]+: f2 ff 21 bnd jmp \*\(%rcx\)
[ ]*[a-f0-9]+: f2 41 ff 24 24 bnd jmp \*\(%r12\)
[ ]*[a-f0-9]+: f2 c3 bnd ret *
[ ]*[a-f0-9]+: f3 41 0f 1b 0b bndmk \(%r11\),%bnd1
[ ]*[a-f0-9]+: f3 0f 1b 08 bndmk \(%rax\),%bnd1
[ ]*[a-f0-9]+: f3 0f 1b 0c 25 99 03 00 00 bndmk 0x399,%bnd1
@ -171,17 +171,17 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 1a 14 1d 03 00 00 00 bndldx 0x3\(,%rbx,1\),%bnd2
[ ]*[a-f0-9]+: 42 0f 1a 14 25 03 00 00 00 bndldx 0x3\(,%r12,1\),%bnd2
[ ]*[a-f0-9]+: 0f 1a 0a bndldx \(%rdx\),%bnd1
[ ]*[a-f0-9]+: f2 e8 16 00 00 00 bnd callq 416 <foo>
[ ]*[a-f0-9]+: f2 ff d0 bnd callq \*%rax
[ ]*[a-f0-9]+: f2 41 ff d3 bnd callq \*%r11
[ ]*[a-f0-9]+: f2 e8 16 00 00 00 bnd call 416 <foo>
[ ]*[a-f0-9]+: f2 ff d0 bnd call \*%rax
[ ]*[a-f0-9]+: f2 41 ff d3 bnd call \*%r11
[ ]*[a-f0-9]+: f2 74 0c bnd je 416 <foo>
[ ]*[a-f0-9]+: f2 eb 09 bnd jmp 416 <foo>
[ ]*[a-f0-9]+: f2 ff e1 bnd jmpq \*%rcx
[ ]*[a-f0-9]+: f2 41 ff e4 bnd jmpq \*%r12
[ ]*[a-f0-9]+: f2 c3 bnd retq
[ ]*[a-f0-9]+: f2 ff e1 bnd jmp \*%rcx
[ ]*[a-f0-9]+: f2 41 ff e4 bnd jmp \*%r12
[ ]*[a-f0-9]+: f2 c3 bnd ret *
[a-f0-9]+ <foo>:
[ ]*[a-f0-9]+: f2 c3 bnd retq
[ ]*[a-f0-9]+: f2 c3 bnd ret *
[a-f0-9]+ <bad>:
[ ]*[a-f0-9]+: 0f 1a 30 bndldx \(%rax\),\(bad\)

2
gas/testsuite/gas/i386/x86-64-nop-3.d

@ -18,5 +18,5 @@ Disassembly of section .text:
Disassembly of section .altinstr_replacement:
0+ <.altinstr_replacement>:
+[a-f0-9]+: e9 00 00 00 00 jmpq 5 <_start\+0x5> 1: R_X86_64_PLT32 foo-0x4
+[a-f0-9]+: e9 00 00 00 00 jmp 5 <_start\+0x5> 1: R_X86_64_PLT32 foo-0x4
#pass

2
gas/testsuite/gas/i386/x86-64-nop-4.d

@ -21,5 +21,5 @@ Disassembly of section .altinstr_replacement:
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: e9 00 00 00 00 jmpq b <_start\+0xb> 7: R_X86_64_PLT32 foo-0x4
+[a-f0-9]+: e9 00 00 00 00 jmp b <_start\+0xb> 7: R_X86_64_PLT32 foo-0x4
#pass

2
gas/testsuite/gas/i386/x86-64-nop-5.d

@ -24,5 +24,5 @@ Disassembly of section .altinstr_replacement:
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: e9 00 00 00 00 jmpq d <_start\+0xd> 9: R_X86_64_PLT32 foo-0x4
+[a-f0-9]+: e9 00 00 00 00 jmp d <_start\+0xd> 9: R_X86_64_PLT32 foo-0x4
#pass

4
gas/testsuite/gas/i386/x86-64-nops-7.d

@ -9,7 +9,7 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 31 c0 xor %eax,%eax
+[a-f0-9]+: e9 f9 01 00 00 jmpq 200 <func1>
+[a-f0-9]+: e9 f9 01 00 00 jmp 200 <func1>
+[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
+[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
+[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
@ -59,7 +59,7 @@ Disassembly of section .text:
0+200 <func1>:
+[a-f0-9]+: 31 db xor %ebx,%ebx
+[a-f0-9]+: e9 f9 00 00 00 jmpq 300 <func2>
+[a-f0-9]+: e9 f9 00 00 00 jmp 300 <func2>
+[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
+[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
+[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)

126
gas/testsuite/gas/i386/x86-64-notrack.d

@ -7,67 +7,67 @@
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: 3e ff d0 notrack callq \*%rax
[ ]*[a-f0-9]+: 3e 41 ff d0 notrack callq \*%r8
[ ]*[a-f0-9]+: 3e ff e0 notrack jmpq \*%rax
[ ]*[a-f0-9]+: 3e 41 ff e0 notrack jmpq \*%r8
[ ]*[a-f0-9]+: 3e ff 10 notrack callq \*\(%rax\)
[ ]*[a-f0-9]+: 3e 41 ff 10 notrack callq \*\(%r8\)
[ ]*[a-f0-9]+: 3e ff 20 notrack jmpq \*\(%rax\)
[ ]*[a-f0-9]+: 3e 41 ff 20 notrack jmpq \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 ff 10 notrack callq \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 41 ff 10 notrack callq \*\(%r8d\)
[ ]*[a-f0-9]+: 3e 67 ff 20 notrack jmpq \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 41 ff 20 notrack jmpq \*\(%r8d\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd callq \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff d0 notrack bnd callq \*%r8
[ ]*[a-f0-9]+: 3e f2 ff e0 notrack bnd jmpq \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff e0 notrack bnd jmpq \*%r8
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd callq \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 10 notrack bnd callq \*\(%r8\)
[ ]*[a-f0-9]+: 3e f2 ff 20 notrack bnd jmpq \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 20 notrack bnd jmpq \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 10 notrack bnd callq \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10 notrack bnd callq \*\(%r8d\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 20 notrack bnd jmpq \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 20 notrack bnd jmpq \*\(%r8d\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd callq \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff d0 notrack bnd callq \*%r8
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd callq \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 10 notrack bnd callq \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 10 notrack bnd callq \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10 notrack bnd callq \*\(%r8d\)
[ ]*[a-f0-9]+: 3e ff d0 notrack callq \*%rax
[ ]*[a-f0-9]+: 3e 41 ff d0 notrack callq \*%r8
[ ]*[a-f0-9]+: 3e ff e0 notrack jmpq \*%rax
[ ]*[a-f0-9]+: 3e 41 ff e0 notrack jmpq \*%r8
[ ]*[a-f0-9]+: 3e ff 10 notrack callq \*\(%rax\)
[ ]*[a-f0-9]+: 3e 41 ff 10 notrack callq \*\(%r8\)
[ ]*[a-f0-9]+: 3e ff 20 notrack jmpq \*\(%rax\)
[ ]*[a-f0-9]+: 3e 41 ff 20 notrack jmpq \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 ff 10 notrack callq \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 41 ff 10 notrack callq \*\(%r8d\)
[ ]*[a-f0-9]+: 3e 67 ff 20 notrack jmpq \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 41 ff 20 notrack jmpq \*\(%r8d\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd callq \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff d0 notrack bnd callq \*%r8
[ ]*[a-f0-9]+: 3e f2 ff e0 notrack bnd jmpq \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff e0 notrack bnd jmpq \*%r8
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd callq \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 10 notrack bnd callq \*\(%r8\)
[ ]*[a-f0-9]+: 3e f2 ff 20 notrack bnd jmpq \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 20 notrack bnd jmpq \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 10 notrack bnd callq \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10 notrack bnd callq \*\(%r8d\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 20 notrack bnd jmpq \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 20 notrack bnd jmpq \*\(%r8d\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd callq \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff d0 notrack bnd callq \*%r8
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd callq \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 10 notrack bnd callq \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 10 notrack bnd callq \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10 notrack bnd callq \*\(%r8d\)
[ ]*[a-f0-9]+: f2 3e ff d0 bnd notrack callq \*%rax
[ ]*[a-f0-9]+: 3e 66 ff d0 ds callw \*%ax
[ ]*[a-f0-9]+: 66 3e ff d0 ds callw \*%ax
[ ]*[a-f0-9]+: 3e ff d0 notrack call \*%rax
[ ]*[a-f0-9]+: 3e 41 ff d0 notrack call \*%r8
[ ]*[a-f0-9]+: 3e ff e0 notrack jmp \*%rax
[ ]*[a-f0-9]+: 3e 41 ff e0 notrack jmp \*%r8
[ ]*[a-f0-9]+: 3e ff 10 notrack call \*\(%rax\)
[ ]*[a-f0-9]+: 3e 41 ff 10 notrack call \*\(%r8\)
[ ]*[a-f0-9]+: 3e ff 20 notrack jmp \*\(%rax\)
[ ]*[a-f0-9]+: 3e 41 ff 20 notrack jmp \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 ff 10 notrack call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 41 ff 10 notrack call \*\(%r8d\)
[ ]*[a-f0-9]+: 3e 67 ff 20 notrack jmp \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 41 ff 20 notrack jmp \*\(%r8d\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd call \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff d0 notrack bnd call \*%r8
[ ]*[a-f0-9]+: 3e f2 ff e0 notrack bnd jmp \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff e0 notrack bnd jmp \*%r8
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd call \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 10 notrack bnd call \*\(%r8\)
[ ]*[a-f0-9]+: 3e f2 ff 20 notrack bnd jmp \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 20 notrack bnd jmp \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 10 notrack bnd call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10 notrack bnd call \*\(%r8d\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 20 notrack bnd jmp \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 20 notrack bnd jmp \*\(%r8d\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd call \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff d0 notrack bnd call \*%r8
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd call \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 10 notrack bnd call \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 10 notrack bnd call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10 notrack bnd call \*\(%r8d\)
[ ]*[a-f0-9]+: 3e ff d0 notrack call \*%rax
[ ]*[a-f0-9]+: 3e 41 ff d0 notrack call \*%r8
[ ]*[a-f0-9]+: 3e ff e0 notrack jmp \*%rax
[ ]*[a-f0-9]+: 3e 41 ff e0 notrack jmp \*%r8
[ ]*[a-f0-9]+: 3e ff 10 notrack call \*\(%rax\)
[ ]*[a-f0-9]+: 3e 41 ff 10 notrack call \*\(%r8\)
[ ]*[a-f0-9]+: 3e ff 20 notrack jmp \*\(%rax\)
[ ]*[a-f0-9]+: 3e 41 ff 20 notrack jmp \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 ff 10 notrack call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 41 ff 10 notrack call \*\(%r8d\)
[ ]*[a-f0-9]+: 3e 67 ff 20 notrack jmp \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 41 ff 20 notrack jmp \*\(%r8d\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd call \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff d0 notrack bnd call \*%r8
[ ]*[a-f0-9]+: 3e f2 ff e0 notrack bnd jmp \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff e0 notrack bnd jmp \*%r8
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd call \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 10 notrack bnd call \*\(%r8\)
[ ]*[a-f0-9]+: 3e f2 ff 20 notrack bnd jmp \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 20 notrack bnd jmp \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 10 notrack bnd call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10 notrack bnd call \*\(%r8d\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 20 notrack bnd jmp \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 20 notrack bnd jmp \*\(%r8d\)
[ ]*[a-f0-9]+: 3e f2 ff d0 notrack bnd call \*%rax
[ ]*[a-f0-9]+: 3e f2 41 ff d0 notrack bnd call \*%r8
[ ]*[a-f0-9]+: 3e f2 ff 10 notrack bnd call \*\(%rax\)
[ ]*[a-f0-9]+: 3e f2 41 ff 10 notrack bnd call \*\(%r8\)
[ ]*[a-f0-9]+: 3e 67 f2 ff 10 notrack bnd call \*\(%eax\)
[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10 notrack bnd call \*\(%r8d\)
[ ]*[a-f0-9]+: f2 3e ff d0 bnd notrack call \*%rax
[ ]*[a-f0-9]+: 3e 66 ff d0 ds call \*%ax
[ ]*[a-f0-9]+: 66 3e ff d0 ds call \*%ax
#pass

42
gas/testsuite/gas/i386/x86-64-opcode.d

@ -7,13 +7,13 @@
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 41 ff 10 callq \*\(%r8\)
[ ]*[a-f0-9]+: ff 10 callq \*\(%rax\)
[ ]*[a-f0-9]+: 41 ff 10 callq \*\(%r8\)
[ ]*[a-f0-9]+: ff 10 callq \*\(%rax\)
[ ]*[a-f0-9]+: 41 ff 10 call \*\(%r8\)
[ ]*[a-f0-9]+: ff 10 call \*\(%rax\)
[ ]*[a-f0-9]+: 41 ff 10 call \*\(%r8\)
[ ]*[a-f0-9]+: ff 10 call \*\(%rax\)
[ ]*[a-f0-9]+: cb lret
[ ]*[a-f0-9]+: 48 cb lretq *
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
[ ]*[a-f0-9]+: cf iret
[ ]*[a-f0-9]+: 66 cf iretw
[ ]*[a-f0-9]+: 48 cf iretq
@ -265,22 +265,22 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 7f 00 movq %mm0,\(%rax\)
[ ]*[a-f0-9]+: 41 0f 7f 38 movq %mm7,\(%r8\)
[ ]*[a-f0-9]+: 0f 7f 38 movq %mm7,\(%rax\)
[ ]*[a-f0-9]+: 41 8f 00 popq \(%r8\)
[ ]*[a-f0-9]+: 8f 00 popq \(%rax\)
[ ]*[a-f0-9]+: 0f a1 popq %fs
[ ]*[a-f0-9]+: 0f a1 popq %fs
[ ]*[a-f0-9]+: 0f a9 popq %gs
[ ]*[a-f0-9]+: 0f a9 popq %gs
[ ]*[a-f0-9]+: 9d popfq
[ ]*[a-f0-9]+: 9d popfq
[ ]*[a-f0-9]+: 41 ff 30 pushq \(%r8\)
[ ]*[a-f0-9]+: ff 30 pushq \(%rax\)
[ ]*[a-f0-9]+: 0f a0 pushq %fs
[ ]*[a-f0-9]+: 0f a0 pushq %fs
[ ]*[a-f0-9]+: 0f a8 pushq %gs
[ ]*[a-f0-9]+: 0f a8 pushq %gs
[ ]*[a-f0-9]+: 9c pushfq
[ ]*[a-f0-9]+: 9c pushfq
[ ]*[a-f0-9]+: 41 8f 00 pop \(%r8\)
[ ]*[a-f0-9]+: 8f 00 pop \(%rax\)
[ ]*[a-f0-9]+: 0f a1 pop %fs
[ ]*[a-f0-9]+: 0f a1 pop %fs
[ ]*[a-f0-9]+: 0f a9 pop %gs
[ ]*[a-f0-9]+: 0f a9 pop %gs
[ ]*[a-f0-9]+: 9d popf *
[ ]*[a-f0-9]+: 9d popf *
[ ]*[a-f0-9]+: 41 ff 30 push \(%r8\)
[ ]*[a-f0-9]+: ff 30 push \(%rax\)
[ ]*[a-f0-9]+: 0f a0 push %fs
[ ]*[a-f0-9]+: 0f a0 push %fs
[ ]*[a-f0-9]+: 0f a8 push %gs
[ ]*[a-f0-9]+: 0f a8 push %gs
[ ]*[a-f0-9]+: 9c pushf *
[ ]*[a-f0-9]+: 9c pushf *
[ ]*[a-f0-9]+: 0f 77 emms
[ ]*[a-f0-9]+: 0f 0e femms
[ ]*[a-f0-9]+: 0f 08 invd

22
gas/testsuite/gas/i386/x86-64-relax-2.d

@ -11,25 +11,25 @@ Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: eb 24 jmp 26 <local>
[ ]*[a-f0-9]+: eb 1e jmp 22 <hidden_def>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 9 <foo\+0x9> 5: R_X86_64_PLT32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq e <foo\+0xe> a: R_X86_64_PLT32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 13 <foo\+0x13> f: R_X86_64_PLT32 weak_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 18 <foo\+0x18> 14: R_X86_64_PLT32 weak_hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1d <foo\+0x1d> 19: R_X86_64_PLT32 weak_hidden_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 22 <hidden_def> 1e: R_X86_64_PLT32 hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 9 <foo\+0x9> 5: R_X86_64_PLT32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp e <foo\+0xe> a: R_X86_64_PLT32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 13 <foo\+0x13> f: R_X86_64_PLT32 weak_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 18 <foo\+0x18> 14: R_X86_64_PLT32 weak_hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1d <foo\+0x1d> 19: R_X86_64_PLT32 weak_hidden_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 22 <hidden_def> 1e: R_X86_64_PLT32 hidden_undef-0x4
0+22 <hidden_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+23 <weak_hidden_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+24 <global_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+25 <weak_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+26 <local>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
#pass

20
gas/testsuite/gas/i386/x86-64-relax-3.d

@ -11,24 +11,24 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: eb 21 jmp 23 <local>
[ ]*[a-f0-9]+: eb 1b jmp 1f <hidden_def>
[ ]*[a-f0-9]+: eb 1b jmp 21 <global_def>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq b <foo\+0xb> 7: R_X86_64_PLT32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 10 <foo\+0x10> c: R_X86_64_PLT32 weak_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 15 <foo\+0x15> 11: R_X86_64_PLT32 weak_hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1a <foo\+0x1a> 16: R_X86_64_PLT32 weak_hidden_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1f <hidden_def> 1b: R_X86_64_PLT32 hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp b <foo\+0xb> 7: R_X86_64_PLT32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 10 <foo\+0x10> c: R_X86_64_PLT32 weak_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 15 <foo\+0x15> 11: R_X86_64_PLT32 weak_hidden_undef-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1a <foo\+0x1a> 16: R_X86_64_PLT32 weak_hidden_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1f <hidden_def> 1b: R_X86_64_PLT32 hidden_undef-0x4
0+1f <hidden_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+20 <weak_hidden_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+21 <global_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+22 <weak_def>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
0+23 <local>:
[ ]*[a-f0-9]+: c3 retq
[ ]*[a-f0-9]+: c3 ret *
#pass

4
gas/testsuite/gas/i386/x86-64-relax-4.d

@ -7,11 +7,11 @@
Disassembly of section .text:
0+ <printk>:
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
Disassembly of section .init.text:
0+ <foo>:
+[a-f0-9]+: e8 00 00 00 00 callq 5 <foo\+0x5> 1: R_X86_64_PLT32 .text-0x4
+[a-f0-9]+: e8 00 00 00 00 call 5 <foo\+0x5> 1: R_X86_64_PLT32 .text-0x4
+[a-f0-9]+: 48 8d 05 00 00 00 00 lea 0x0\(%rip\),%rax # c <foo\+0xc> 8: R_X86_64_PC32 .text-0x4
#pass

8
gas/testsuite/gas/i386/x86-64-rtm.d

@ -8,12 +8,12 @@ Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: c6 f8 08 xabort \$0x8
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbeginq 3 <foo\+0x3>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbeginq f <foo\+0xf>
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbegin 3 <foo\+0x3>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbegin f <foo\+0xf>
[ ]*[a-f0-9]+: 0f 01 d5 xend
[ ]*[a-f0-9]+: c6 f8 08 xabort \$0x8
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbeginq 15 <foo\+0x15>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbeginq 21 <foo\+0x21>
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbegin 15 <foo\+0x15>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbegin 21 <foo\+0x21>
[ ]*[a-f0-9]+: 0f 01 d5 xend
[ ]*[a-f0-9]+: 0f 01 d6 xtest
#pass

64
gas/testsuite/gas/i386/x86-64-stack.d

@ -18,52 +18,52 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 8f c0 pop %ax
[ ]*[a-f0-9]+: 48 8f c0 rex.W pop %rax
[ ]*[a-f0-9]+: 66 48 8f c0 data16 rex.W pop %rax
[ ]*[a-f0-9]+: 8f 00 popq \(%rax\)
[ ]*[a-f0-9]+: 8f 00 pop \(%rax\)
[ ]*[a-f0-9]+: 66 8f 00 popw \(%rax\)
[ ]*[a-f0-9]+: 48 8f 00 rex.W popq \(%rax\)
[ ]*[a-f0-9]+: 66 48 8f 00 data16 rex.W popq \(%rax\)
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: 66 ff d0 callw \*%ax
[ ]*[a-f0-9]+: 48 ff d0 rex.W callq \*%rax
[ ]*[a-f0-9]+: 66 48 ff d0 data16 rex.W callq \*%rax
[ ]*[a-f0-9]+: ff 10 callq \*\(%rax\)
[ ]*[a-f0-9]+: 48 8f 00 rex\.W pop \(%rax\)
[ ]*[a-f0-9]+: 66 48 8f 00 data16 rex\.W pop \(%rax\)
[ ]*[a-f0-9]+: ff d0 call \*%rax
[ ]*[a-f0-9]+: 66 ff d0 call \*%ax
[ ]*[a-f0-9]+: 48 ff d0 rex\.W call \*%rax
[ ]*[a-f0-9]+: 66 48 ff d0 data16 rex\.W call \*%rax
[ ]*[a-f0-9]+: ff 10 call \*\(%rax\)
[ ]*[a-f0-9]+: 66 ff 10 callw \*\(%rax\)
[ ]*[a-f0-9]+: 48 ff 10 rex.W callq \*\(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 10 data16 rex.W callq \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax
[ ]*[a-f0-9]+: 48 ff e0 rex.W jmpq \*%rax
[ ]*[a-f0-9]+: 66 48 ff e0 data16 rex.W jmpq \*%rax
[ ]*[a-f0-9]+: ff 20 jmpq \*\(%rax\)
[ ]*[a-f0-9]+: 48 ff 10 rex\.W call \*\(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 10 data16 rex\.W call \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmp \*%rax
[ ]*[a-f0-9]+: 66 ff e0 jmp \*%ax
[ ]*[a-f0-9]+: 48 ff e0 rex\.W jmp \*%rax
[ ]*[a-f0-9]+: 66 48 ff e0 data16 rex\.W jmp \*%rax
[ ]*[a-f0-9]+: ff 20 jmp \*\(%rax\)
[ ]*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\)
[ ]*[a-f0-9]+: 48 ff 20 rex.W jmpq \*\(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 20 data16 rex.W jmpq \*\(%rax\)
[ ]*[a-f0-9]+: 48 ff 20 rex\.W jmp \*\(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 20 data16 rex\.W jmp \*\(%rax\)
[ ]*[a-f0-9]+: ff f0 push %rax
[ ]*[a-f0-9]+: 66 ff f0 push %ax
[ ]*[a-f0-9]+: 48 ff f0 rex.W push %rax
[ ]*[a-f0-9]+: 66 48 ff f0 data16 rex.W push %rax
[ ]*[a-f0-9]+: ff 30 pushq \(%rax\)
[ ]*[a-f0-9]+: ff 30 push \(%rax\)
[ ]*[a-f0-9]+: 66 ff 30 pushw \(%rax\)
[ ]*[a-f0-9]+: 48 ff 30 rex.W pushq \(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 30 data16 rex.W pushq \(%rax\)
[ ]*[a-f0-9]+: 6a ff pushq \$0xffffffffffffffff
[ ]*[a-f0-9]+: 48 ff 30 rex\.W push \(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 30 data16 rex\.W push \(%rax\)
[ ]*[a-f0-9]+: 6a ff push \$0xffffffffffffffff
[ ]*[a-f0-9]+: 66 6a ff pushw \$0xffff
[ ]*[a-f0-9]+: 48 6a ff rex.W pushq \$0xffffffffffffffff
[ ]*[a-f0-9]+: 66 48 6a ff data16 rex.W pushq \$0xffffffffffffffff
[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201
[ ]*[a-f0-9]+: 48 6a ff rex\.W push \$0xffffffffffffffff
[ ]*[a-f0-9]+: 66 48 6a ff data16 rex\.W push \$0xffffffffffffffff
[ ]*[a-f0-9]+: 68 01 02 03 04 push \$0x4030201
[ ]*[a-f0-9]+: 66 68 01 02 pushw \$0x201
[ ]*[a-f0-9]+: 03 04 48 add \(%rax,%rcx,2\),%eax
[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201
[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data16 rex.W pushq \$0x4030201
[ ]*[a-f0-9]+: 0f a8 pushq %gs
[ ]*[a-f0-9]+: 68 01 02 03 04 push \$0x4030201
[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data16 rex\.W push \$0x4030201
[ ]*[a-f0-9]+: 0f a8 push %gs
[ ]*[a-f0-9]+: 66 0f a8 pushw %gs
[ ]*[a-f0-9]+: 48 0f a8 rex.W pushq %gs
[ ]*[a-f0-9]+: 66 48 0f a8 data16 rex.W pushq %gs
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 48 0f a8 rex\.W push %gs
[ ]*[a-f0-9]+: 66 48 0f a8 data16 rex\.W push %gs
[ ]*[a-f0-9]+: 41 0f a8 rex.B push %gs
[ ]*[a-f0-9]+: 66 41 0f a8 rex.B pushw %gs
[ ]*[a-f0-9]+: 48 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 41 0f a8 rex.B push %gs
[ ]*[a-f0-9]+: 66 48 data16 rex.W
[ ]*[a-f0-9]+: 41 0f a8 rex.B pushq %gs
[ ]*[a-f0-9]+: 41 0f a8 rex.B push %gs
[ ]*[a-f0-9]+: 90 nop
#pass

12
gas/testsuite/gas/i386/x86-64-unique.d

@ -8,26 +8,26 @@ Disassembly of section .text:
0+ <foo>:
+[a-f0-9]+: 89 c3 mov %eax,%ebx
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
Disassembly of section .text:
0+ <bar>:
+[a-f0-9]+: 31 c3 xor %eax,%ebx
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
Disassembly of section .text:
0+ <foo1>:
+[a-f0-9]+: 89 c3 mov %eax,%ebx
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
Disassembly of section .text:
0+ <bar1>:
+[a-f0-9]+: 01 c3 add %eax,%ebx
+[a-f0-9]+: 90 nop
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
Disassembly of section .text:
@ -36,7 +36,7 @@ Disassembly of section .text:
+[a-f0-9]+: 90 nop
+[a-f0-9]+: 90 nop
+[a-f0-9]+: 90 nop
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
Disassembly of section .text:
@ -44,5 +44,5 @@ Disassembly of section .text:
+[a-f0-9]+: 31 c3 xor %eax,%ebx
+[a-f0-9]+: 90 nop
+[a-f0-9]+: 90 nop
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
#pass

4
gas/testsuite/gas/i386/x86_64-intel.d

@ -111,8 +111,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 ca 02 00 retfw 0x2
[ ]*[a-f0-9]+: cb retf *
[ ]*[a-f0-9]+: ca 04 00 retf 0x4
[ ]*[a-f0-9]+: 48 cb rex\.W retf *
[ ]*[a-f0-9]+: 48 ca 08 00 rex\.W retf 0x8
[ ]*[a-f0-9]+: 48 cb retfq *
[ ]*[a-f0-9]+: 48 ca 08 00 retfq 0x8
[0-9a-f]+ <bar>:
[ ]*[a-f0-9]+: b0 00 mov al,0x0

106
ld/ChangeLog

@ -1,3 +1,109 @@
2020-07-15 Jan Beulich <jbeulich@suse.com>
* testsuite/ld-i386/ibt-plt-1.d, testsuite/ld-i386/ibt-plt-2a.d,
testsuite/ld-i386/ibt-plt-2c.d, testsuite/ld-i386/ibt-plt-3a.d,
testsuite/ld-i386/ibt-plt-3c.d, testsuite/ld-i386/plt-pic.pd,
testsuite/ld-i386/plt-pic2.dd, testsuite/ld-i386/plt.pd,
testsuite/ld-i386/plt2.dd, testsuite/ld-i386/pr19636-1d.d,
testsuite/ld-i386/pr19636-1l.d, testsuite/ld-i386/pr19636-2c.d,
testsuite/ld-i386/pr20830.d, testsuite/ld-i386/vxworks1-lib.dd,
testsuite/ld-i386/vxworks1.dd,
testsuite/ld-ifunc/ifunc-2-i386-now.d,
testsuite/ld-ifunc/ifunc-2-local-i386-now.d,
testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d,
testsuite/ld-ifunc/ifunc-2-x86-64-now.d,
testsuite/ld-ifunc/ifunc-21-x86-64.d,
testsuite/ld-ifunc/ifunc-22-x86-64.d,
testsuite/ld-ifunc/pr17154-i386-now.d,
testsuite/ld-ifunc/pr17154-i386.d,
testsuite/ld-ifunc/pr17154-x86-64-now.d,
testsuite/ld-ifunc/pr17154-x86-64.d,
testsuite/ld-x86-64/align-branch-1.d,
testsuite/ld-x86-64/bnd-branch-1-now.d,
testsuite/ld-x86-64/bnd-branch-1.d,
testsuite/ld-x86-64/bnd-ifunc-1-now.d,
testsuite/ld-x86-64/bnd-ifunc-1.d,
testsuite/ld-x86-64/bnd-ifunc-2-now.d,
testsuite/ld-x86-64/bnd-ifunc-2.d,
testsuite/ld-x86-64/bnd-plt-1-now.d,
testsuite/ld-x86-64/bnd-plt-1.d,
testsuite/ld-x86-64/call1a.d, testsuite/ld-x86-64/call1b.d,
testsuite/ld-x86-64/call1d.d, testsuite/ld-x86-64/call1e.d,
testsuite/ld-x86-64/call1f.d, testsuite/ld-x86-64/call1g.d,
testsuite/ld-x86-64/call1h.d, testsuite/ld-x86-64/call1i.d,
testsuite/ld-x86-64/gotpcrel1.dd,
testsuite/ld-x86-64/hidden2.d,
testsuite/ld-x86-64/ibt-plt-1-x32.d,
testsuite/ld-x86-64/ibt-plt-1.d,
testsuite/ld-x86-64/ibt-plt-2a-x32.d,
testsuite/ld-x86-64/ibt-plt-2a.d,
testsuite/ld-x86-64/ibt-plt-2c-x32.d,
testsuite/ld-x86-64/ibt-plt-2c.d,
testsuite/ld-x86-64/ibt-plt-3a-x32.d,
testsuite/ld-x86-64/ibt-plt-3a.d,
testsuite/ld-x86-64/ibt-plt-3c-x32.d,
testsuite/ld-x86-64/ibt-plt-3c.d,
testsuite/ld-x86-64/libno-plt-1b.dd,
testsuite/ld-x86-64/mpx3.dd, testsuite/ld-x86-64/mpx3n.dd,
testsuite/ld-x86-64/mpx4.dd, testsuite/ld-x86-64/mpx4n.dd,
testsuite/ld-x86-64/no-plt-1a.dd,
testsuite/ld-x86-64/no-plt-1b.dd,
testsuite/ld-x86-64/no-plt-1c.dd,
testsuite/ld-x86-64/no-plt-1d.dd,
testsuite/ld-x86-64/no-plt-1e.dd,
testsuite/ld-x86-64/no-plt-1f.dd,
testsuite/ld-x86-64/no-plt-1g.dd,
testsuite/ld-x86-64/plt-main-bnd.dd,
testsuite/ld-x86-64/plt-main-ibt-x32.dd,
testsuite/ld-x86-64/plt-main-ibt.dd,
testsuite/ld-x86-64/plt.pd, testsuite/ld-x86-64/plt2.dd,
testsuite/ld-x86-64/pr19609-5a.d,
testsuite/ld-x86-64/pr19609-5b.d,
testsuite/ld-x86-64/pr19609-5c.d,
testsuite/ld-x86-64/pr19609-5e.d,
testsuite/ld-x86-64/pr19609-7b.d,
testsuite/ld-x86-64/pr19609-7d.d,
testsuite/ld-x86-64/pr19636-2d.d,
testsuite/ld-x86-64/pr19636-2l.d,
testsuite/ld-x86-64/pr20253-1b.d,
testsuite/ld-x86-64/pr20253-1d.d,
testsuite/ld-x86-64/pr20253-1f.d,
testsuite/ld-x86-64/pr20253-1h.d,
testsuite/ld-x86-64/pr20253-1j.d,
testsuite/ld-x86-64/pr20253-1l.d,
testsuite/ld-x86-64/pr20830a-now.d,
testsuite/ld-x86-64/pr20830a.d,
testsuite/ld-x86-64/pr20830b-now.d,
testsuite/ld-x86-64/pr20830b.d,
testsuite/ld-x86-64/pr21038a-now.d,
testsuite/ld-x86-64/pr21038a.d,
testsuite/ld-x86-64/pr21038b-now.d,
testsuite/ld-x86-64/pr21038b.d,
testsuite/ld-x86-64/pr21038c-now.d,
testsuite/ld-x86-64/pr21038c.d,
testsuite/ld-x86-64/pr23930-x32.d,
testsuite/ld-x86-64/pr23930.d,
testsuite/ld-x86-64/pr25416-1a.d,
testsuite/ld-x86-64/pr25416-2a.d,
testsuite/ld-x86-64/pr26018.d,
testsuite/ld-x86-64/protected2-k1om.d,
testsuite/ld-x86-64/protected2-l1om.d,
testsuite/ld-x86-64/protected2.d,
testsuite/ld-x86-64/protected3.d,
testsuite/ld-x86-64/protected8.d,
testsuite/ld-x86-64/tlsbin.dd, testsuite/ld-x86-64/tlsbin2.dd,
testsuite/ld-x86-64/tlsbindesc.dd,
testsuite/ld-x86-64/tlsdesc.dd,
testsuite/ld-x86-64/tlsdesc.pd,
testsuite/ld-x86-64/tlsgd10.dd,
testsuite/ld-x86-64/tlsgd7.dd, testsuite/ld-x86-64/tlsgd8.dd,
testsuite/ld-x86-64/tlsgd9.dd,
testsuite/ld-x86-64/tlsgdesc.dd,
testsuite/ld-x86-64/tlsld3.dd, testsuite/ld-x86-64/tlsld4.dd,
testsuite/ld-x86-64/tlspic.dd, testsuite/ld-x86-64/tlspic2.dd,
testsuite/ld-x86-64/tlspie2b.d, testsuite/ld-x86-64/tlspie2c.d:
Adjust expectations.
2020-07-15 Hans-Peter Nilsson <hp@bitrange.com>
* testsuite/ld-mmix/undef-1.d, testsuite/ld-mmix/undef-1m.d,

2
ld/testsuite/ld-i386/ibt-plt-1.d

@ -8,7 +8,7 @@
Disassembly of section .plt:
[a-f0-9]+ <.plt>:
+[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
+[a-f0-9]+: f3 0f 1e fb endbr32

2
ld/testsuite/ld-i386/ibt-plt-2a.d

@ -9,7 +9,7 @@
Disassembly of section .plt:
0+140 <.plt>:
+[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
+[a-f0-9]+: f3 0f 1e fb endbr32

2
ld/testsuite/ld-i386/ibt-plt-2c.d

@ -9,7 +9,7 @@
Disassembly of section .plt:
[a-f0-9]+ <.plt>:
+[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
+[a-f0-9]+: f3 0f 1e fb endbr32

2
ld/testsuite/ld-i386/ibt-plt-3a.d

@ -9,7 +9,7 @@
Disassembly of section .plt:
0+140 <.plt>:
+[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
+[a-f0-9]+: f3 0f 1e fb endbr32

2
ld/testsuite/ld-i386/ibt-plt-3c.d

@ -9,7 +9,7 @@
Disassembly of section .plt:
0+140 <.plt>:
+[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
+[a-f0-9]+: f3 0f 1e fb endbr32

2
ld/testsuite/ld-i386/plt-pic.pd

@ -9,7 +9,7 @@
Disassembly of section .plt:
[0-9a-f]+ <.plt>:
+[0-9a-f]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[0-9a-f]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[0-9a-f]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
#...

2
ld/testsuite/ld-i386/plt-pic2.dd

@ -10,7 +10,7 @@
Disassembly of section .plt:
.* <.plt>:
+[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 00 00 add %al,\(%eax\)
...

2
ld/testsuite/ld-i386/plt.pd

@ -9,7 +9,7 @@
Disassembly of section .plt:
[0-9a-f]+ <.plt>:
+[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * pushl 0x[0-9a-f]+
+[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * push 0x[0-9a-f]+
+[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmp \*0x[0-9a-f]+
#...

2
ld/testsuite/ld-i386/plt2.dd

@ -10,7 +10,7 @@
Disassembly of section .plt:
0+8048160 <.plt>:
+[a-f0-9]+: ff 35 40 92 04 08 pushl 0x8049240
+[a-f0-9]+: ff 35 40 92 04 08 push 0x8049240
+[a-f0-9]+: ff 25 44 92 04 08 jmp \*0x8049244
+[a-f0-9]+: 00 00 add %al,\(%eax\)
...

2
ld/testsuite/ld-i386/pr19636-1d.d

@ -9,7 +9,7 @@
Disassembly of section .plt:
.* <.plt>:
[ ]*[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
[ ]*[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
[ ]*[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
[ ]*[a-f0-9]+: 00 00 add %al,\(%eax\)
[ ]*[a-f0-9]+: 00 00 add %al,\(%eax\)

2
ld/testsuite/ld-i386/pr19636-1l.d

@ -10,7 +10,7 @@
Disassembly of section .plt:
.* <.plt>:
[ ]*[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
[ ]*[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
[ ]*[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
[ ]*[a-f0-9]+: 00 00 add %al,\(%eax\)
[ ]*[a-f0-9]+: 00 00 add %al,\(%eax\)

2
ld/testsuite/ld-i386/pr19636-2c.d

@ -9,7 +9,7 @@
Disassembly of section .plt:
.* <.plt>:
[ ]*[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
[ ]*[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
[ ]*[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
[ ]*[a-f0-9]+: 00 00 add %al,\(%eax\)
[ ]*[a-f0-9]+: 00 00 add %al,\(%eax\)

2
ld/testsuite/ld-i386/pr20830.d

@ -41,7 +41,7 @@ Contents of the .eh_frame section:
Disassembly of section .plt:
0+110 <.plt>:
+[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 00 00 add %al,\(%eax\)
...

2
ld/testsuite/ld-i386/vxworks1-lib.dd

@ -4,7 +4,7 @@
Disassembly of section \.plt:
00080800 <_PROCEDURE_LINKAGE_TABLE_>:
80800: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
80800: ff b3 04 00 00 00 push 0x4\(%ebx\)
80806: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
8080c: 90 nop
8080d: 90 nop

2
ld/testsuite/ld-i386/vxworks1.dd

@ -4,7 +4,7 @@
Disassembly of section \.plt:
00080800 <_PROCEDURE_LINKAGE_TABLE_>:
80800: ff 35 04 14 08 00 pushl 0x81404
80800: ff 35 04 14 08 00 push 0x81404
80802: R_386_32 _GLOBAL_OFFSET_TABLE_
80806: ff 25 08 14 08 00 jmp \*0x81408
80808: R_386_32 _GLOBAL_OFFSET_TABLE_

2
ld/testsuite/ld-ifunc/ifunc-2-i386-now.d

@ -11,7 +11,7 @@
Disassembly of section .plt:
0+f0 <.plt>:
+[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 00 00 add %al,\(%eax\)
...

2
ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d

@ -11,7 +11,7 @@
Disassembly of section .plt:
0+e0 <.plt>:
+[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 00 00 add %al,\(%eax\)
...

16
ld/testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d

@ -10,22 +10,22 @@
Disassembly of section .plt:
0+170 <.plt>:
+[a-f0-9]+: ff 35 42 01 20 00 pushq 0x200142\(%rip\) # 2002b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 44 01 20 00 jmpq \*0x200144\(%rip\) # 2002c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: ff 35 42 01 20 00 push 0x200142\(%rip\) # 2002b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 44 01 20 00 jmp \*0x200144\(%rip\) # 2002c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
0+180 <\*ABS\*\+0x190@plt>:
+[a-f0-9]+: ff 25 42 01 20 00 jmpq \*0x200142\(%rip\) # 2002c8 <_GLOBAL_OFFSET_TABLE_\+0x18>
+[a-f0-9]+: 68 00 00 00 00 pushq \$0x0
+[a-f0-9]+: e9 e0 ff ff ff jmpq 170 <.plt>
+[a-f0-9]+: ff 25 42 01 20 00 jmp \*0x200142\(%rip\) # 2002c8 <_GLOBAL_OFFSET_TABLE_\+0x18>
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e0 ff ff ff jmp 170 <.plt>
Disassembly of section .text:
0+190 <foo>:
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
0+191 <bar>:
+[a-f0-9]+: e8 ea ff ff ff callq 180 <\*ABS\*\+0x190@plt>
+[a-f0-9]+: e8 ea ff ff ff call 180 <\*ABS\*\+0x190@plt>
+[a-f0-9]+: 48 8d 05 e3 ff ff ff lea -0x1d\(%rip\),%rax # 180 <\*ABS\*\+0x190@plt>
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
#pass

16
ld/testsuite/ld-ifunc/ifunc-2-x86-64-now.d

@ -10,22 +10,22 @@
Disassembly of section .plt:
0+170 <.plt>:
+[a-f0-9]+: ff 35 42 01 20 00 pushq 0x200142\(%rip\) # 2002b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 44 01 20 00 jmpq \*0x200144\(%rip\) # 2002c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: ff 35 42 01 20 00 push 0x200142\(%rip\) # 2002b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 44 01 20 00 jmp \*0x200144\(%rip\) # 2002c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
0+180 <\*ABS\*\+0x190@plt>:
+[a-f0-9]+: ff 25 42 01 20 00 jmpq \*0x200142\(%rip\) # 2002c8 <_GLOBAL_OFFSET_TABLE_\+0x18>
+[a-f0-9]+: 68 00 00 00 00 pushq \$0x0
+[a-f0-9]+: e9 e0 ff ff ff jmpq 170 <.plt>
+[a-f0-9]+: ff 25 42 01 20 00 jmp \*0x200142\(%rip\) # 2002c8 <_GLOBAL_OFFSET_TABLE_\+0x18>
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e0 ff ff ff jmp 170 <.plt>
Disassembly of section .text:
0+190 <foo>:
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
0+191 <bar>:
+[a-f0-9]+: e8 ea ff ff ff callq 180 <\*ABS\*\+0x190@plt>
+[a-f0-9]+: e8 ea ff ff ff call 180 <\*ABS\*\+0x190@plt>
+[a-f0-9]+: 48 8d 05 e3 ff ff ff lea -0x1d\(%rip\),%rax # 180 <\*ABS\*\+0x190@plt>
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
#pass

8
ld/testsuite/ld-ifunc/ifunc-21-x86-64.d

@ -9,16 +9,16 @@
Disassembly of section .text:
0+4000c8 <__start>:
+[a-f0-9]+: ff 15 2a 00 20 00 callq \*0x20002a\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: ff 25 24 00 20 00 jmpq \*0x200024\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: ff 15 2a 00 20 00 call \*0x20002a\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: ff 25 24 00 20 00 jmp \*0x200024\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: 48 03 05 1d 00 20 00 add 0x20001d\(%rip\),%rax # 6000f8 <.got>
+[a-f0-9]+: 48 8b 05 16 00 20 00 mov 0x200016\(%rip\),%rax # 6000f8 <.got>
+[a-f0-9]+: 48 85 05 0f 00 20 00 test %rax,0x20000f\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: 48 c7 c0 f1 00 40 00 mov \$0x4000f1,%rax
0+4000f0 <foo>:
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
0+4000f1 <bar>:
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
#pass

8
ld/testsuite/ld-ifunc/ifunc-22-x86-64.d

@ -9,16 +9,16 @@
Disassembly of section .text:
0+4000c8 <__start>:
+[a-f0-9]+: ff 15 2a 00 20 00 callq \*0x20002a\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: ff 25 24 00 20 00 jmpq \*0x200024\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: ff 15 2a 00 20 00 call \*0x20002a\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: ff 25 24 00 20 00 jmp \*0x200024\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: 48 03 05 1d 00 20 00 add 0x20001d\(%rip\),%rax # 6000f8 <.got>
+[a-f0-9]+: 48 8b 05 16 00 20 00 mov 0x200016\(%rip\),%rax # 6000f8 <.got>
+[a-f0-9]+: 48 85 05 0f 00 20 00 test %rax,0x20000f\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: 48 c7 c0 f1 00 40 00 mov \$0x4000f1,%rax
0+4000f0 <foo>:
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
0+4000f1 <bar>:
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
#pass

2
ld/testsuite/ld-ifunc/pr17154-i386-now.d

@ -11,7 +11,7 @@
Disassembly of section .plt:
0+180 <.plt>:
+[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 00 00 add %al,\(%eax\)
...

2
ld/testsuite/ld-ifunc/pr17154-i386.d

@ -7,7 +7,7 @@
#...
0+180 <.*>:
[ ]*[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
[ ]*[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
[ ]*[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
[ ]*[a-f0-9]+: 00 00 add %al,\(%eax\)
...

36
ld/testsuite/ld-ifunc/pr17154-x86-64-now.d

@ -10,41 +10,41 @@
Disassembly of section .plt:
0+240 <.plt>:
+[a-f0-9]+: ff 35 7a 01 20 00 pushq 0x20017a\(%rip\) # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 7c 01 20 00 jmpq \*0x20017c\(%rip\) # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: ff 35 7a 01 20 00 push 0x20017a\(%rip\) # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 7c 01 20 00 jmp \*0x20017c\(%rip\) # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
0+250 <\*ABS\*\+0x29a@plt>:
+[a-f0-9]+: ff 25 7a 01 20 00 jmpq \*0x20017a\(%rip\) # 2003d0 <_GLOBAL_OFFSET_TABLE_\+0x18>
+[a-f0-9]+: 68 03 00 00 00 pushq \$0x3
+[a-f0-9]+: e9 e0 ff ff ff jmpq 240 <.plt>
+[a-f0-9]+: ff 25 7a 01 20 00 jmp \*0x20017a\(%rip\) # 2003d0 <_GLOBAL_OFFSET_TABLE_\+0x18>
+[a-f0-9]+: 68 03 00 00 00 push \$0x3
+[a-f0-9]+: e9 e0 ff ff ff jmp 240 <.plt>
0+260 <func1@plt>:
+[a-f0-9]+: ff 25 72 01 20 00 jmpq \*0x200172\(%rip\) # 2003d8 <func1>
+[a-f0-9]+: 68 00 00 00 00 pushq \$0x0
+[a-f0-9]+: e9 d0 ff ff ff jmpq 240 <.plt>
+[a-f0-9]+: ff 25 72 01 20 00 jmp \*0x200172\(%rip\) # 2003d8 <func1>
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 d0 ff ff ff jmp 240 <.plt>
0+270 <func2@plt>:
+[a-f0-9]+: ff 25 6a 01 20 00 jmpq \*0x20016a\(%rip\) # 2003e0 <func2>
+[a-f0-9]+: 68 01 00 00 00 pushq \$0x1
+[a-f0-9]+: e9 c0 ff ff ff jmpq 240 <.plt>
+[a-f0-9]+: ff 25 6a 01 20 00 jmp \*0x20016a\(%rip\) # 2003e0 <func2>
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: e9 c0 ff ff ff jmp 240 <.plt>
0+280 <\*ABS\*\+0x290@plt>:
+[a-f0-9]+: ff 25 62 01 20 00 jmpq \*0x200162\(%rip\) # 2003e8 <_GLOBAL_OFFSET_TABLE_\+0x30>
+[a-f0-9]+: 68 02 00 00 00 pushq \$0x2
+[a-f0-9]+: e9 b0 ff ff ff jmpq 240 <.plt>
+[a-f0-9]+: ff 25 62 01 20 00 jmp \*0x200162\(%rip\) # 2003e8 <_GLOBAL_OFFSET_TABLE_\+0x30>
+[a-f0-9]+: 68 02 00 00 00 push \$0x2
+[a-f0-9]+: e9 b0 ff ff ff jmp 240 <.plt>
Disassembly of section .text:
0+290 <resolve1>:
+[a-f0-9]+: e8 cb ff ff ff callq 260 <func1@plt>
+[a-f0-9]+: e8 cb ff ff ff call 260 <func1@plt>
0+295 <g1>:
+[a-f0-9]+: e9 e6 ff ff ff jmpq 280 <\*ABS\*\+0x290@plt>
+[a-f0-9]+: e9 e6 ff ff ff jmp 280 <\*ABS\*\+0x290@plt>
0+29a <resolve2>:
+[a-f0-9]+: e8 d1 ff ff ff callq 270 <func2@plt>
+[a-f0-9]+: e8 d1 ff ff ff call 270 <func2@plt>
0+29f <g2>:
+[a-f0-9]+: e9 ac ff ff ff jmpq 250 <\*ABS\*\+0x29a@plt>
+[a-f0-9]+: e9 ac ff ff ff jmp 250 <\*ABS\*\+0x29a@plt>
#pass

36
ld/testsuite/ld-ifunc/pr17154-x86-64.d

@ -6,41 +6,41 @@
#...
0+240 <.*>:
+[a-f0-9]+: ff 35 5a 01 20 00 pushq 0x20015a\(%rip\) # 2003a0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 5c 01 20 00 jmpq \*0x20015c\(%rip\) # 2003a8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: ff 35 5a 01 20 00 push 0x20015a\(%rip\) # 2003a0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 5c 01 20 00 jmp \*0x20015c\(%rip\) # 2003a8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
0+250 <\*ABS\*\+0x29a@plt>:
+[a-f0-9]+: ff 25 5a 01 20 00 jmpq \*0x20015a\(%rip\) # 2003b0 <_GLOBAL_OFFSET_TABLE_\+0x18>
+[a-f0-9]+: 68 03 00 00 00 pushq \$0x3
+[a-f0-9]+: e9 e0 ff ff ff jmpq 240 <.plt>
+[a-f0-9]+: ff 25 5a 01 20 00 jmp \*0x20015a\(%rip\) # 2003b0 <_GLOBAL_OFFSET_TABLE_\+0x18>
+[a-f0-9]+: 68 03 00 00 00 push \$0x3
+[a-f0-9]+: e9 e0 ff ff ff jmp 240 <.plt>
0+260 <func1@plt>:
+[a-f0-9]+: ff 25 52 01 20 00 jmpq \*0x200152\(%rip\) # 2003b8 <func1>
+[a-f0-9]+: 68 00 00 00 00 pushq \$0x0
+[a-f0-9]+: e9 d0 ff ff ff jmpq 240 <.plt>
+[a-f0-9]+: ff 25 52 01 20 00 jmp \*0x200152\(%rip\) # 2003b8 <func1>
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 d0 ff ff ff jmp 240 <.plt>
0+270 <func2@plt>:
+[a-f0-9]+: ff 25 4a 01 20 00 jmpq \*0x20014a\(%rip\) # 2003c0 <func2>
+[a-f0-9]+: 68 01 00 00 00 pushq \$0x1
+[a-f0-9]+: e9 c0 ff ff ff jmpq 240 <.plt>
+[a-f0-9]+: ff 25 4a 01 20 00 jmp \*0x20014a\(%rip\) # 2003c0 <func2>
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: e9 c0 ff ff ff jmp 240 <.plt>
0+280 <\*ABS\*\+0x290@plt>:
+[a-f0-9]+: ff 25 42 01 20 00 jmpq \*0x200142\(%rip\) # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x30>
+[a-f0-9]+: 68 02 00 00 00 pushq \$0x2
+[a-f0-9]+: e9 b0 ff ff ff jmpq 240 <.plt>
+[a-f0-9]+: ff 25 42 01 20 00 jmp \*0x200142\(%rip\) # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x30>
+[a-f0-9]+: 68 02 00 00 00 push \$0x2
+[a-f0-9]+: e9 b0 ff ff ff jmp 240 <.plt>
Disassembly of section .text:
0+290 <resolve1>:
+[a-f0-9]+: e8 cb ff ff ff callq 260 <func1@plt>
+[a-f0-9]+: e8 cb ff ff ff call 260 <func1@plt>
0+295 <g1>:
+[a-f0-9]+: e9 e6 ff ff ff jmpq 280 <\*ABS\*\+0x290@plt>
+[a-f0-9]+: e9 e6 ff ff ff jmp 280 <\*ABS\*\+0x290@plt>
0+29a <resolve2>:
+[a-f0-9]+: e8 d1 ff ff ff callq 270 <func2@plt>
+[a-f0-9]+: e8 d1 ff ff ff call 270 <func2@plt>
0+29f <g2>:
+[a-f0-9]+: e9 ac ff ff ff jmpq 250 <\*ABS\*\+0x29a@plt>
+[a-f0-9]+: e9 ac ff ff ff jmp 250 <\*ABS\*\+0x29a@plt>
#pass

2
ld/testsuite/ld-x86-64/align-branch-1.d

@ -16,5 +16,5 @@ Disassembly of section .text:
+[a-f0-9]+: 2e 2e 2e 2e 48 8b 98 fc ff ff ff cs cs cs mov %cs:-0x4\(%rax\),%rbx
+[a-f0-9]+: 48 85 db test %rbx,%rbx
+[a-f0-9]+: 74 00 je [a-f0-9]+ <_start\+0x25>
+[a-f0-9]+: c3 retq
+[a-f0-9]+: c3 ret *
#pass

40
ld/testsuite/ld-x86-64/bnd-branch-1-now.d

@ -9,37 +9,37 @@
Disassembly of section .plt:
0+230 <.plt>:
+[a-f0-9]+: ff 35 82 01 20 00 pushq 0x200182\(%rip\) # 2003b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 84 01 20 00 jmpq \*0x200184\(%rip\) # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: ff 35 82 01 20 00 push 0x200182\(%rip\) # 2003b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 84 01 20 00 jmp \*0x200184\(%rip\) # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
0+240 <foo2@plt>:
+[a-f0-9]+: ff 25 82 01 20 00 jmpq \*0x200182\(%rip\) # 2003c8 <foo2>
+[a-f0-9]+: 68 00 00 00 00 pushq \$0x0
+[a-f0-9]+: e9 e0 ff ff ff jmpq 230 <.plt>
+[a-f0-9]+: ff 25 82 01 20 00 jmp \*0x200182\(%rip\) # 2003c8 <foo2>
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e0 ff ff ff jmp 230 <.plt>
0+250 <foo3@plt>:
+[a-f0-9]+: ff 25 7a 01 20 00 jmpq \*0x20017a\(%rip\) # 2003d0 <foo3>
+[a-f0-9]+: 68 01 00 00 00 pushq \$0x1
+[a-f0-9]+: e9 d0 ff ff ff jmpq 230 <.plt>
+[a-f0-9]+: ff 25 7a 01 20 00 jmp \*0x20017a\(%rip\) # 2003d0 <foo3>
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: e9 d0 ff ff ff jmp 230 <.plt>
0+260 <foo1@plt>:
+[a-f0-9]+: ff 25 72 01 20 00 jmpq \*0x200172\(%rip\) # 2003d8 <foo1>
+[a-f0-9]+: 68 02 00 00 00 pushq \$0x2
+[a-f0-9]+: e9 c0 ff ff ff jmpq 230 <.plt>
+[a-f0-9]+: ff 25 72 01 20 00 jmp \*0x200172\(%rip\) # 2003d8 <foo1>
+[a-f0-9]+: 68 02 00 00 00 push \$0x2
+[a-f0-9]+: e9 c0 ff ff ff jmp 230 <.plt>
0+270 <foo4@plt>:
+[a-f0-9]+: ff 25 6a 01 20 00 jmpq \*0x20016a\(%rip\) # 2003e0 <foo4>
+[a-f0-9]+: 68 03 00 00 00 pushq \$0x3
+[a-f0-9]+: e9 b0 ff ff ff jmpq 230 <.plt>
+[a-f0-9]+: ff 25 6a 01 20 00 jmp \*0x20016a\(%rip\) # 2003e0 <foo4>
+[a-f0-9]+: 68 03 00 00 00 push \$0x3
+[a-f0-9]+: e9 b0 ff ff ff jmp 230 <.plt>
Disassembly of section .text:
0+280 <_start>:
+[a-f0-9]+: f2 e9 da ff ff ff bnd jmpq 260 <foo1@plt>
+[a-f0-9]+: e8 b5 ff ff ff callq 240 <foo2@plt>
+[a-f0-9]+: e9 c0 ff ff ff jmpq 250 <foo3@plt>
+[a-f0-9]+: e8 db ff ff ff callq 270 <foo4@plt>
+[a-f0-9]+: f2 e8 b5 ff ff ff bnd callq 250 <foo3@plt>
+[a-f0-9]+: e9 d0 ff ff ff jmpq 270 <foo4@plt>
+[a-f0-9]+: f2 e9 da ff ff ff bnd jmp 260 <foo1@plt>
+[a-f0-9]+: e8 b5 ff ff ff call 240 <foo2@plt>
+[a-f0-9]+: e9 c0 ff ff ff jmp 250 <foo3@plt>
+[a-f0-9]+: e8 db ff ff ff call 270 <foo4@plt>
+[a-f0-9]+: f2 e8 b5 ff ff ff bnd call 250 <foo3@plt>
+[a-f0-9]+: e9 d0 ff ff ff jmp 270 <foo4@plt>
#pass

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