Add missing ARC documentation

gas/ChangeLog

@@ -1,3 +1,8 @@
+2001-01-12  Peter Targett  <peter.targett@arccores.com>
+
+	* doc/c-arc.texi: New file.
+	Some sections to be expanded.
+
 2001-01-12  Alan Modra  <alan@linuxcare.com.au>
 
 	* config/tc-i386.c (md_longopts): Recognize "--64" only for ELF.

gas/doc/c-arc.texi

@@ -0,0 +1,207 @@
+@c Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+@c This is part of the GAS manual.
+@c For copying conditions, see the file as.texinfo.
+
+@ifset GENERIC
+@page
+@node ARC-Dependent
+@chapter ARC Dependent Features
+@end ifset
+
+@ifclear GENERIC
+@node Machine Dependencies
+@chapter ARC Dependent Features
+@end ifclear
+
+@set ARC_CORE_DEFAULT 5
+
+@cindex ARC support
+@menu
+* ARC Options::              Options
+* ARC Syntax::               Syntax
+* ARC Floating Point::       Floating Point
+* ARC Directives::           ARC Machine Directives
+* ARC Opcodes::              Opcodes
+@end menu
+
+
+@node ARC Options
+@section Options
+@cindex ARC options (none)
+@cindex options for ARC (none)
+
+@table @code
+
+@cindex @code{-marc[5|6|7|8]} command line option, ARC
+@item -marc[5|6|7|8]
+This option selects the core processor variant. Using
+@code{-marc} is the same as @code{-marc@value{ARC_CORE_DEFAULT}}, which
+is also the default.
+
+@table @code
+
+@cindex @code{arc5} arc5, ARC
+@item arc5
+Base instruction set.
+
+@cindex @code{arc6} arc6, ARC
+@item arc6
+Jump-and-link (jl) instruction. No requirement of an instruction between
+setting flags and conditional jump. For example:
+
+@smallexample
+  mov.f r0,r1
+  beq   foo
+@end smallexample
+
+@cindex @code{arc7} arc7, ARC
+@item arc7
+Break (brk) and sleep (sleep) instructions.
+
+@cindex @code{arc8} arc8, ARC
+@item arc8
+Software interrupt (swi) instruction.
+
+@end table
+
+Note: the @code{.option} directive can to be used to select a core
+variant from within assembly code.
+
+@cindex @code{-EB} command line option, ARC
+@item -EB
+This option specifies that the output generated by the assembler should
+be marked as being encoded for a big-endian processor.
+
+@cindex @code{-EL} command line option, ARC
+@item -EL
+This option specifies that the output generated by the assembler should
+be marked as being encoded for a little-endian processor - this is the
+default.
+
+@end table
+
+
+@node ARC Syntax
+@section Syntax
+@menu
+* ARC-Chars::                Special Characters
+* ARC-Regs::                 Register Names
+@end menu
+
+@node ARC-Chars
+@subsection Special Characters
+
+@cindex ARC special characters
+@cindex special characters, ARC
+*TODO*
+
+@node ARC-Regs
+@subsection Register Names
+
+@cindex ARC register names
+@cindex register names, ARC
+*TODO*
+
+
+@node ARC Floating Point
+@section Floating Point
+
+@cindex floating point, ARC (@sc{ieee})
+@cindex ARC floating point (@sc{ieee})
+The ARC core does not currently have hardware floating point
+support. Software floating point support is provided by @code{GCC}
+and uses @sc{ieee} floating-point numbers.
+
+
+@node ARC Directives
+@section ARC Machine Directives
+
+@cindex machine directives, ARC
+@cindex ARC machine directives
+The ARC version of @code{@value{AS}} supports the following additional
+machine directives:
+
+@table @code
+
+@cindex @code{2byte} directive, ARC
+@item .2byte @var{expressions}
+*TODO*
+
+@cindex @code{3byte} directive, ARC
+@item .3byte @var{expressions}
+*TODO*
+
+@cindex @code{4byte} directive, ARC
+@item .4byte @var{expressions}
+*TODO*
+
+@cindex @code{extAuxRegister} directive, ARC
+@item .extAuxRegister @var{name},@var{address},@var{mode}
+*TODO*
+
+@smallexample
+  .extAuxRegister mulhi,0x12,w
+@end smallexample
+
+@cindex @code{extCondCode} directive, ARC
+@item .extCondCode @var{suffix},@var{value}
+*TODO*
+
+@smallexample
+  .extCondCode is_busy,0x14
+@end smallexample
+
+@cindex @code{extCoreRegister} directive, ARC
+@item .extCoreRegister @var{name},@var{regnum},@var{mode},@var{shortcut}
+*TODO*
+
+@smallexample
+  .extCoreRegister mlo,57,r,can_shortcut
+@end smallexample
+
+@cindex @code{extInstruction} directive, ARC
+@item .extInstruction @var{name},@var{opcode},@var{subopcode},@var{suffixclass},@var{syntaxclass}
+*TODO*
+
+@smallexample
+  .extInstruction mul64,0x14,0x0,SUFFIX_COND,SYNTAX_3OP|OP1_MUST_BE_IMM
+@end smallexample
+
+@cindex @code{half} directive, ARC
+@item .half @var{expressions}
+*TODO*
+
+@cindex @code{long} directive, ARC
+@item .long @var{expressions}
+*TODO*
+
+@cindex @code{option} directive, ARC
+@item .option @var{arc|arc5|arc6|arc7|arc8}
+The @code{.option} directive must be followed by the desired core
+version. Again @code{arc} is an alias for
+@code{arc@value{ARC_CORE_DEFAULT}}.
+
+Note: the @code{.option} directive overrides the command line option
+@code{-marc}; a warning is emitted when the version is not consistent
+between the two - even for the implicit default core version
+(arc@value{ARC_CORE_DEFAULT}).
+
+@cindex @code{short} directive, ARC
+@item .short @var{expressions}
+*TODO*
+
+@cindex @code{word} directive, ARC
+@item .word @var{expressions}
+*TODO*
+
+@end table
+
+
+@node ARC Opcodes
+@section Opcodes
+
+@cindex ARC opcodes
+@cindex opcodes for ARC
+
+For information on the ARC instruction set, see @cite{ARC Programmers
+Reference Manual}, ARC Cores Ltd.