Nick Clifton
24 years ago
92 changed files with 5836 additions and 610 deletions
@ -0,0 +1,107 @@ |
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/* BFD library support routines for the MSP architecture.
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Copyright (C) 2002 Free Software Foundation, Inc. |
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Contributed by Dmitry Diky <diwil@mail.ru> |
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This file is part of BFD, the Binary File Descriptor library. |
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This program is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 2 of the License, or |
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(at your option) any later version. |
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|
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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|
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You should have received a copy of the GNU General Public License |
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along with this program; if not, write to the Free Software |
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
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#include "bfd.h" |
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#include "sysdep.h" |
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#include "libbfd.h" |
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static const bfd_arch_info_type *compatible |
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PARAMS ((const bfd_arch_info_type *, const bfd_arch_info_type *)); |
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#define N(addr_bits, machine, print, default, next) \ |
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{ \ |
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16, /* 16 bits in a word. */ \ |
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addr_bits, /* Bits in an address. */ \ |
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8, /* 8 bits in a byte. */ \ |
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bfd_arch_msp430, \ |
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machine, /* Machine number. */ \ |
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"msp430", /* Architecture name. */ \ |
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print, /* Printable name. */ \ |
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1, /* Section align power. */ \ |
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default, /* The default machine. */ \ |
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compatible, \ |
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bfd_default_scan, \ |
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next \ |
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} |
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static const bfd_arch_info_type arch_info_struct[] = |
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{ |
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/* msp430x11x. */ |
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N (16, bfd_mach_msp11, "msp:11", FALSE, & arch_info_struct[1]), |
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/* msp430x12x. */ |
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N (16, bfd_mach_msp12, "msp:12", FALSE, & arch_info_struct[2]), |
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/* msp430x13x. */ |
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N (16, bfd_mach_msp13, "msp:13", FALSE, & arch_info_struct[3]), |
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/* msp430x14x. */ |
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N (16, bfd_mach_msp14, "msp:14", FALSE, & arch_info_struct[4]), |
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/* msp430x31x. */ |
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N (16, bfd_mach_msp31, "msp:31", FALSE, & arch_info_struct[5]), |
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/* msp430x32x. */ |
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N (16, bfd_mach_msp32, "msp:32", FALSE, & arch_info_struct[6]), |
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/* msp430x33x. */ |
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N (16, bfd_mach_msp33, "msp:33", FALSE, & arch_info_struct[7]), |
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/* msp430x41x. */ |
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N (16, bfd_mach_msp41, "msp:41", FALSE, & arch_info_struct[8]), |
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/* msp430x43x. */ |
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N (16, bfd_mach_msp43, "msp:43", FALSE, & arch_info_struct[9]), |
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/* msp430x44x. */ |
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N (16, bfd_mach_msp43, "msp:44", FALSE, & arch_info_struct[10]), |
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/* msp430x15x. */ |
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N (16, bfd_mach_msp15, "msp:15", FALSE, & arch_info_struct[11]), |
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/* msp430x16x. */ |
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N (16, bfd_mach_msp16, "msp:16", FALSE, & arch_info_struct[12]), |
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/* msp430x11x1. */ |
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N (16, bfd_mach_msp110, "msp:110", FALSE, NULL) |
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}; |
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const bfd_arch_info_type bfd_msp430_arch = |
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N (16, bfd_mach_msp14, "msp:14", TRUE, & arch_info_struct[0]); |
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/* This routine is provided two arch_infos and works out which MSP
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machine which would be compatible with both and returns a pointer |
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to its info structure. */ |
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static const bfd_arch_info_type * |
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compatible (a,b) |
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const bfd_arch_info_type * a; |
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const bfd_arch_info_type * b; |
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{ |
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/* If a & b are for different architectures we can do nothing. */ |
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if (a->arch != b->arch) |
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return NULL; |
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if (a->mach <= b->mach) |
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return b; |
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return a; |
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} |
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@ -0,0 +1,720 @@ |
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/* MSP430-specific support for 32-bit ELF
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Copyright (C) 2002 Free Software Foundation, Inc. |
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Contributed by Dmitry Diky <diwil@mail.ru> |
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This file is part of BFD, the Binary File Descriptor library. |
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This program is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 2 of the License, or |
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(at your option) any later version. |
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|
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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|
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You should have received a copy of the GNU General Public License |
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along with this program; if not, write to the Free Software |
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
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#include "bfd.h" |
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#include "sysdep.h" |
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#include "libiberty.h" |
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#include "libbfd.h" |
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#include "elf-bfd.h" |
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#include "elf/msp430.h" |
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static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup |
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PARAMS ((bfd *, bfd_reloc_code_real_type)); |
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static void msp430_info_to_howto_rela |
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PARAMS ((bfd *, arelent *, Elf_Internal_Rela *)); |
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static asection *elf32_msp430_gc_mark_hook |
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PARAMS ((asection *, struct bfd_link_info *, Elf_Internal_Rela *, |
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struct elf_link_hash_entry *, Elf_Internal_Sym *)); |
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static bfd_boolean elf32_msp430_gc_sweep_hook |
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PARAMS ((bfd *, struct bfd_link_info *, asection *, |
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const Elf_Internal_Rela *)); |
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static bfd_boolean elf32_msp430_check_relocs |
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PARAMS ((bfd *, struct bfd_link_info *, asection *, |
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const Elf_Internal_Rela *)); |
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static bfd_reloc_status_type msp430_final_link_relocate |
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PARAMS ((reloc_howto_type *, bfd *, asection *, bfd_byte *, |
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Elf_Internal_Rela *, bfd_vma)); |
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static bfd_boolean elf32_msp430_relocate_section |
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PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, |
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Elf_Internal_Rela *, Elf_Internal_Sym *, asection **)); |
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static void bfd_elf_msp430_final_write_processing |
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PARAMS ((bfd *, bfd_boolean)); |
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static bfd_boolean elf32_msp430_object_p |
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PARAMS ((bfd *)); |
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static void elf32_msp430_post_process_headers |
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PARAMS ((bfd *, struct bfd_link_info *)); |
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/* Use RELA instead of REL. */ |
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#undef USE_REL |
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static reloc_howto_type elf_msp430_howto_table[] = |
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{ |
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HOWTO (R_MSP430_NONE, /* type */ |
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0, /* rightshift */ |
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2, /* size (0 = byte, 1 = short, 2 = long) */ |
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32, /* bitsize */ |
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FALSE, /* pc_relative */ |
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0, /* bitpos */ |
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complain_overflow_bitfield, /* complain_on_overflow */ |
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bfd_elf_generic_reloc, /* special_function */ |
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"R_MSP430_NONE", /* name */ |
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FALSE, /* partial_inplace */ |
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0, /* src_mask */ |
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0, /* dst_mask */ |
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FALSE), /* pcrel_offset */ |
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HOWTO (R_MSP430_32, /* type */ |
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0, /* rightshift */ |
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2, /* size (0 = byte, 1 = short, 2 = long) */ |
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32, /* bitsize */ |
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FALSE, /* pc_relative */ |
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0, /* bitpos */ |
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complain_overflow_bitfield, /* complain_on_overflow */ |
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bfd_elf_generic_reloc, /* special_function */ |
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"R_MSP430_32", /* name */ |
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FALSE, /* partial_inplace */ |
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0xffffffff, /* src_mask */ |
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0xffffffff, /* dst_mask */ |
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FALSE), /* pcrel_offset */ |
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/* A 13 bit PC relative relocation. */ |
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HOWTO (R_MSP430_10_PCREL, /* type */ |
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1, /* rightshift */ |
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1, /* size (0 = byte, 1 = short, 2 = long) */ |
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10, /* bitsize */ |
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TRUE, /* pc_relative */ |
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0, /* bitpos */ |
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complain_overflow_bitfield, /* complain_on_overflow */ |
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bfd_elf_generic_reloc, /* special_function */ |
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"R_MSP430_13_PCREL", /* name */ |
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FALSE, /* partial_inplace */ |
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0xfff, /* src_mask */ |
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0xfff, /* dst_mask */ |
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TRUE), /* pcrel_offset */ |
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/* A 16 bit absolute relocation. */ |
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HOWTO (R_MSP430_16, /* type */ |
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0, /* rightshift */ |
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1, /* size (0 = byte, 1 = short, 2 = long) */ |
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16, /* bitsize */ |
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FALSE, /* pc_relative */ |
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0, /* bitpos */ |
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complain_overflow_dont,/* complain_on_overflow */ |
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bfd_elf_generic_reloc, /* special_function */ |
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"R_MSP430_16", /* name */ |
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FALSE, /* partial_inplace */ |
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0xffff, /* src_mask */ |
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0xffff, /* dst_mask */ |
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FALSE), /* pcrel_offset */ |
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/* A 16 bit absolute relocation for command address. */ |
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HOWTO (R_MSP430_16_PCREL, /* type */ |
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1, /* rightshift */ |
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1, /* size (0 = byte, 1 = short, 2 = long) */ |
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16, /* bitsize */ |
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TRUE, /* pc_relative */ |
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0, /* bitpos */ |
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complain_overflow_dont,/* complain_on_overflow */ |
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bfd_elf_generic_reloc, /* special_function */ |
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"R_MSP430_16_PCREL", /* name */ |
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FALSE, /* partial_inplace */ |
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0xffff, /* src_mask */ |
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0xffff, /* dst_mask */ |
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TRUE), /* pcrel_offset */ |
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/* A 16 bit absolute relocation, byte operations. */ |
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HOWTO (R_MSP430_16_BYTE, /* type */ |
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0, /* rightshift */ |
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1, /* size (0 = byte, 1 = short, 2 = long) */ |
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16, /* bitsize */ |
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FALSE, /* pc_relative */ |
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0, /* bitpos */ |
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complain_overflow_dont,/* complain_on_overflow */ |
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bfd_elf_generic_reloc, /* special_function */ |
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"R_MSP430_16_BYTE", /* name */ |
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FALSE, /* partial_inplace */ |
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0xffff, /* src_mask */ |
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0xffff, /* dst_mask */ |
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FALSE), /* pcrel_offset */ |
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/* A 16 bit absolute relocation for command address. */ |
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HOWTO (R_MSP430_16_PCREL_BYTE,/* type */ |
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1, /* rightshift */ |
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1, /* size (0 = byte, 1 = short, 2 = long) */ |
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16, /* bitsize */ |
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TRUE, /* pc_relative */ |
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0, /* bitpos */ |
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complain_overflow_dont,/* complain_on_overflow */ |
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bfd_elf_generic_reloc, /* special_function */ |
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"R_MSP430_16_PCREL_BYTE", /* name */ |
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FALSE, /* partial_inplace */ |
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0xffff, /* src_mask */ |
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0xffff, /* dst_mask */ |
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TRUE) /* pcrel_offset */ |
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}; |
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/* Map BFD reloc types to MSP430 ELF reloc types. */ |
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struct msp430_reloc_map |
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{ |
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bfd_reloc_code_real_type bfd_reloc_val; |
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unsigned int elf_reloc_val; |
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}; |
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static const struct msp430_reloc_map msp430_reloc_map[] = |
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{ |
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{BFD_RELOC_NONE, R_MSP430_NONE}, |
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{BFD_RELOC_32, R_MSP430_32}, |
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{BFD_RELOC_MSP430_10_PCREL, R_MSP430_10_PCREL}, |
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{BFD_RELOC_16, R_MSP430_16_BYTE}, |
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{BFD_RELOC_MSP430_16_PCREL, R_MSP430_16_PCREL}, |
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{BFD_RELOC_MSP430_16, R_MSP430_16}, |
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{BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE}, |
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{BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE} |
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}; |
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static reloc_howto_type * |
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bfd_elf32_bfd_reloc_type_lookup (abfd, code) |
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bfd *abfd ATTRIBUTE_UNUSED; |
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bfd_reloc_code_real_type code; |
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{ |
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unsigned int i; |
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for (i = 0; i < ARRAY_SIZE (msp430_reloc_map); i++) |
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if (msp430_reloc_map[i].bfd_reloc_val == code) |
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return &elf_msp430_howto_table[msp430_reloc_map[i].elf_reloc_val]; |
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return NULL; |
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} |
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/* Set the howto pointer for an MSP430 ELF reloc. */ |
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static void |
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msp430_info_to_howto_rela (abfd, cache_ptr, dst) |
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bfd *abfd ATTRIBUTE_UNUSED; |
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arelent *cache_ptr; |
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Elf_Internal_Rela *dst; |
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{ |
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unsigned int r_type; |
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r_type = ELF32_R_TYPE (dst->r_info); |
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BFD_ASSERT (r_type < (unsigned int) R_MSP430_max); |
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cache_ptr->howto = &elf_msp430_howto_table[r_type]; |
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} |
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static asection * |
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elf32_msp430_gc_mark_hook (sec, info, rel, h, sym) |
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asection *sec; |
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struct bfd_link_info *info ATTRIBUTE_UNUSED; |
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Elf_Internal_Rela *rel; |
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struct elf_link_hash_entry *h; |
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Elf_Internal_Sym *sym; |
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{ |
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if (h != NULL) |
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{ |
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switch (ELF32_R_TYPE (rel->r_info)) |
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{ |
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default: |
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switch (h->root.type) |
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{ |
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case bfd_link_hash_defined: |
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case bfd_link_hash_defweak: |
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return h->root.u.def.section; |
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case bfd_link_hash_common: |
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return h->root.u.c.p->section; |
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default: |
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break; |
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} |
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} |
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} |
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else |
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return bfd_section_from_elf_index (sec->owner, sym->st_shndx); |
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return NULL; |
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} |
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static bfd_boolean |
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elf32_msp430_gc_sweep_hook (abfd, info, sec, relocs) |
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bfd *abfd ATTRIBUTE_UNUSED; |
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struct bfd_link_info *info ATTRIBUTE_UNUSED; |
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asection *sec ATTRIBUTE_UNUSED; |
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const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED; |
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{ |
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/* We don't use got and plt entries for msp430. */ |
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return TRUE; |
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} |
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/* Look through the relocs for a section during the first phase.
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Since we don't do .gots or .plts, we just need to consider the |
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virtual table relocs for gc. */ |
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static bfd_boolean |
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elf32_msp430_check_relocs (abfd, info, sec, relocs) |
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bfd *abfd; |
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struct bfd_link_info *info; |
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asection *sec; |
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const Elf_Internal_Rela *relocs; |
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{ |
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Elf_Internal_Shdr *symtab_hdr; |
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struct elf_link_hash_entry **sym_hashes, **sym_hashes_end; |
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const Elf_Internal_Rela *rel; |
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const Elf_Internal_Rela *rel_end; |
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if (info->relocateable) |
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return TRUE; |
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symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
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sym_hashes = elf_sym_hashes (abfd); |
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sym_hashes_end = |
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sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym); |
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if (!elf_bad_symtab (abfd)) |
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sym_hashes_end -= symtab_hdr->sh_info; |
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rel_end = relocs + sec->reloc_count; |
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for (rel = relocs; rel < rel_end; rel++) |
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{ |
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struct elf_link_hash_entry *h; |
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unsigned long r_symndx; |
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r_symndx = ELF32_R_SYM (rel->r_info); |
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if (r_symndx < symtab_hdr->sh_info) |
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h = NULL; |
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else |
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h = sym_hashes[r_symndx - symtab_hdr->sh_info]; |
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} |
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return TRUE; |
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} |
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/* Perform a single relocation. By default we use the standard BFD
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routines, but a few relocs, we have to do them ourselves. */ |
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static bfd_reloc_status_type |
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msp430_final_link_relocate (howto, input_bfd, input_section, |
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contents, rel, relocation) |
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reloc_howto_type *howto; |
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bfd *input_bfd; |
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asection *input_section; |
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bfd_byte *contents; |
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Elf_Internal_Rela *rel; |
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bfd_vma relocation; |
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{ |
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bfd_reloc_status_type r = bfd_reloc_ok; |
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bfd_vma x; |
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bfd_signed_vma srel; |
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switch (howto->type) |
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{ |
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case R_MSP430_10_PCREL: |
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contents += rel->r_offset; |
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srel = (bfd_signed_vma) relocation; |
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srel += rel->r_addend; |
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srel -= rel->r_offset; |
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srel -= 2; /* Branch instructions add 2 to the PC... */ |
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srel -= (input_section->output_section->vma + |
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input_section->output_offset); |
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if (srel & 1) |
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return bfd_reloc_outofrange; |
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/* MSP430 addresses commands as words. */ |
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srel >>= 1; |
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/* Check for an overflow. */ |
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if (srel < -512 || srel > 511) |
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return bfd_reloc_overflow; |
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x = bfd_get_16 (input_bfd, contents); |
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x = (x & 0xfc00) | (srel & 0x3ff); |
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bfd_put_16 (input_bfd, x, contents); |
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break; |
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case R_MSP430_16_PCREL: |
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contents += rel->r_offset; |
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srel = (bfd_signed_vma) relocation; |
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srel += rel->r_addend; |
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srel -= rel->r_offset; |
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/* Only branch instructions add 2 to the PC... */ |
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srel -= (input_section->output_section->vma + |
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input_section->output_offset); |
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if (srel & 1) |
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return bfd_reloc_outofrange; |
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bfd_put_16 (input_bfd, srel & 0xffff, contents); |
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break; |
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case R_MSP430_16_PCREL_BYTE: |
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contents += rel->r_offset; |
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srel = (bfd_signed_vma) relocation; |
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srel += rel->r_addend; |
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srel -= rel->r_offset; |
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/* Only branch instructions add 2 to the PC... */ |
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srel -= (input_section->output_section->vma + |
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input_section->output_offset); |
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bfd_put_16 (input_bfd, srel & 0xffff, contents); |
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break; |
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case R_MSP430_16_BYTE: |
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contents += rel->r_offset; |
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srel = (bfd_signed_vma) relocation; |
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srel += rel->r_addend; |
|||
bfd_put_16 (input_bfd, srel & 0xffff, contents); |
|||
break; |
|||
|
|||
case R_MSP430_16: |
|||
contents += rel->r_offset; |
|||
srel = (bfd_signed_vma) relocation; |
|||
srel += rel->r_addend; |
|||
|
|||
if (srel & 1) |
|||
return bfd_reloc_notsupported; |
|||
|
|||
bfd_put_16 (input_bfd, srel & 0xffff, contents); |
|||
break; |
|||
|
|||
default: |
|||
r = _bfd_final_link_relocate (howto, input_bfd, input_section, |
|||
contents, rel->r_offset, |
|||
relocation, rel->r_addend); |
|||
} |
|||
|
|||
return r; |
|||
} |
|||
|
|||
/* Relocate an MSP430 ELF section. */ |
|||
|
|||
static bfd_boolean |
|||
elf32_msp430_relocate_section (output_bfd, info, input_bfd, input_section, |
|||
contents, relocs, local_syms, local_sections) |
|||
bfd *output_bfd ATTRIBUTE_UNUSED; |
|||
struct bfd_link_info *info; |
|||
bfd *input_bfd; |
|||
asection *input_section; |
|||
bfd_byte *contents; |
|||
Elf_Internal_Rela *relocs; |
|||
Elf_Internal_Sym *local_syms; |
|||
asection **local_sections; |
|||
{ |
|||
Elf_Internal_Shdr *symtab_hdr; |
|||
struct elf_link_hash_entry **sym_hashes; |
|||
Elf_Internal_Rela *rel; |
|||
Elf_Internal_Rela *relend; |
|||
|
|||
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; |
|||
sym_hashes = elf_sym_hashes (input_bfd); |
|||
relend = relocs + input_section->reloc_count; |
|||
|
|||
for (rel = relocs; rel < relend; rel++) |
|||
{ |
|||
reloc_howto_type *howto; |
|||
unsigned long r_symndx; |
|||
Elf_Internal_Sym *sym; |
|||
asection *sec; |
|||
struct elf_link_hash_entry *h; |
|||
bfd_vma relocation; |
|||
bfd_reloc_status_type r; |
|||
const char *name = NULL; |
|||
int r_type; |
|||
|
|||
/* This is a final link. */ |
|||
|
|||
r_type = ELF32_R_TYPE (rel->r_info); |
|||
r_symndx = ELF32_R_SYM (rel->r_info); |
|||
howto = elf_msp430_howto_table + ELF32_R_TYPE (rel->r_info); |
|||
h = NULL; |
|||
sym = NULL; |
|||
sec = NULL; |
|||
|
|||
if (r_symndx < symtab_hdr->sh_info) |
|||
{ |
|||
sym = local_syms + r_symndx; |
|||
sec = local_sections[r_symndx]; |
|||
relocation = _bfd_elf_rela_local_sym (output_bfd, sym, sec, rel); |
|||
|
|||
name = bfd_elf_string_from_elf_section |
|||
(input_bfd, symtab_hdr->sh_link, sym->st_name); |
|||
name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name; |
|||
} |
|||
else |
|||
{ |
|||
h = sym_hashes[r_symndx - symtab_hdr->sh_info]; |
|||
|
|||
while (h->root.type == bfd_link_hash_indirect |
|||
|| h->root.type == bfd_link_hash_warning) |
|||
h = (struct elf_link_hash_entry *) h->root.u.i.link; |
|||
|
|||
name = h->root.root.string; |
|||
|
|||
if (h->root.type == bfd_link_hash_defined |
|||
|| h->root.type == bfd_link_hash_defweak) |
|||
{ |
|||
sec = h->root.u.def.section; |
|||
relocation = (h->root.u.def.value |
|||
+ sec->output_section->vma + sec->output_offset); |
|||
} |
|||
else if (h->root.type == bfd_link_hash_undefweak) |
|||
{ |
|||
relocation = 0; |
|||
} |
|||
else |
|||
{ |
|||
if (!((*info->callbacks->undefined_symbol) |
|||
(info, h->root.root.string, input_bfd, |
|||
input_section, rel->r_offset, TRUE))) |
|||
return FALSE; |
|||
relocation = 0; |
|||
} |
|||
} |
|||
|
|||
r = msp430_final_link_relocate (howto, input_bfd, input_section, |
|||
contents, rel, relocation); |
|||
|
|||
if (r != bfd_reloc_ok) |
|||
{ |
|||
const char *msg = (const char *) NULL; |
|||
|
|||
switch (r) |
|||
{ |
|||
case bfd_reloc_overflow: |
|||
r = info->callbacks->reloc_overflow |
|||
(info, name, howto->name, (bfd_vma) 0, |
|||
input_bfd, input_section, rel->r_offset); |
|||
break; |
|||
|
|||
case bfd_reloc_undefined: |
|||
r = info->callbacks->undefined_symbol |
|||
(info, name, input_bfd, input_section, rel->r_offset, TRUE); |
|||
break; |
|||
|
|||
case bfd_reloc_outofrange: |
|||
msg = _("internal error: out of range error"); |
|||
break; |
|||
|
|||
case bfd_reloc_notsupported: |
|||
msg = _("internal error: unsupported relocation error"); |
|||
break; |
|||
|
|||
case bfd_reloc_dangerous: |
|||
msg = _("internal error: dangerous relocation"); |
|||
break; |
|||
|
|||
default: |
|||
msg = _("internal error: unknown error"); |
|||
break; |
|||
} |
|||
|
|||
if (msg) |
|||
r = info->callbacks->warning |
|||
(info, msg, name, input_bfd, input_section, rel->r_offset); |
|||
|
|||
if (!r) |
|||
return FALSE; |
|||
} |
|||
|
|||
} |
|||
|
|||
return TRUE; |
|||
} |
|||
|
|||
/* The final processing done just before writing out a MSP430 ELF object
|
|||
file. This gets the MSP430 architecture right based on the machine |
|||
number. */ |
|||
|
|||
static void |
|||
bfd_elf_msp430_final_write_processing (abfd, linker) |
|||
bfd *abfd; |
|||
bfd_boolean linker ATTRIBUTE_UNUSED; |
|||
{ |
|||
unsigned long val; |
|||
|
|||
switch (bfd_get_mach (abfd)) |
|||
{ |
|||
default: |
|||
case bfd_mach_msp12: |
|||
val = E_MSP430_MACH_MSP430x12; |
|||
break; |
|||
|
|||
case bfd_mach_msp110: |
|||
val = E_MSP430_MACH_MSP430x11x1; |
|||
break; |
|||
|
|||
case bfd_mach_msp11: |
|||
val = E_MSP430_MACH_MSP430x11; |
|||
break; |
|||
|
|||
case bfd_mach_msp13: |
|||
val = E_MSP430_MACH_MSP430x13; |
|||
break; |
|||
|
|||
case bfd_mach_msp14: |
|||
val = E_MSP430_MACH_MSP430x14; |
|||
break; |
|||
|
|||
case bfd_mach_msp41: |
|||
val = E_MSP430_MACH_MSP430x41; |
|||
break; |
|||
|
|||
case bfd_mach_msp43: |
|||
val = E_MSP430_MACH_MSP430x43; |
|||
break; |
|||
|
|||
case bfd_mach_msp44: |
|||
val = E_MSP430_MACH_MSP430x44; |
|||
break; |
|||
|
|||
case bfd_mach_msp31: |
|||
val = E_MSP430_MACH_MSP430x31; |
|||
break; |
|||
|
|||
case bfd_mach_msp32: |
|||
val = E_MSP430_MACH_MSP430x32; |
|||
break; |
|||
|
|||
case bfd_mach_msp33: |
|||
val = E_MSP430_MACH_MSP430x33; |
|||
break; |
|||
|
|||
case bfd_mach_msp15: |
|||
val = E_MSP430_MACH_MSP430x15; |
|||
break; |
|||
|
|||
case bfd_mach_msp16: |
|||
val = E_MSP430_MACH_MSP430x16; |
|||
break; |
|||
} |
|||
|
|||
elf_elfheader (abfd)->e_machine = EM_MSP430; |
|||
elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH; |
|||
elf_elfheader (abfd)->e_flags |= val; |
|||
} |
|||
|
|||
/* Set the right machine number. */ |
|||
|
|||
static bfd_boolean |
|||
elf32_msp430_object_p (abfd) |
|||
bfd *abfd; |
|||
{ |
|||
int e_set = bfd_mach_msp14; |
|||
|
|||
if (elf_elfheader (abfd)->e_machine == EM_MSP430 |
|||
|| elf_elfheader (abfd)->e_machine == EM_MSP430_OLD) |
|||
{ |
|||
int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH; |
|||
|
|||
switch (e_mach) |
|||
{ |
|||
default: |
|||
case E_MSP430_MACH_MSP430x12: |
|||
e_set = bfd_mach_msp12; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x11: |
|||
e_set = bfd_mach_msp11; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x11x1: |
|||
e_set = bfd_mach_msp110; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x13: |
|||
e_set = bfd_mach_msp13; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x14: |
|||
e_set = bfd_mach_msp14; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x41: |
|||
e_set = bfd_mach_msp41; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x31: |
|||
e_set = bfd_mach_msp31; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x32: |
|||
e_set = bfd_mach_msp32; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x33: |
|||
e_set = bfd_mach_msp33; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x43: |
|||
e_set = bfd_mach_msp43; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x44: |
|||
e_set = bfd_mach_msp44; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x15: |
|||
e_set = bfd_mach_msp15; |
|||
break; |
|||
|
|||
case E_MSP430_MACH_MSP430x16: |
|||
e_set = bfd_mach_msp16; |
|||
break; |
|||
} |
|||
} |
|||
|
|||
return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set); |
|||
} |
|||
|
|||
static void |
|||
elf32_msp430_post_process_headers (abfd, link_info) |
|||
bfd *abfd; |
|||
struct bfd_link_info *link_info ATTRIBUTE_UNUSED; |
|||
{ |
|||
Elf_Internal_Ehdr *i_ehdrp; /* ELF file header, internal form. */ |
|||
|
|||
i_ehdrp = elf_elfheader (abfd); |
|||
|
|||
#ifndef ELFOSABI_STANDALONE |
|||
#define ELFOSABI_STANDALONE 255 |
|||
#endif |
|||
|
|||
i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_STANDALONE; |
|||
} |
|||
|
|||
|
|||
#define ELF_ARCH bfd_arch_msp430 |
|||
#define ELF_MACHINE_CODE EM_MSP430 |
|||
#define ELF_MACHINE_ALT1 EM_MSP430_OLD |
|||
#define ELF_MAXPAGESIZE 1 |
|||
|
|||
#define TARGET_LITTLE_SYM bfd_elf32_msp430_vec |
|||
#define TARGET_LITTLE_NAME "elf32-msp430" |
|||
|
|||
#define elf_info_to_howto msp430_info_to_howto_rela |
|||
#define elf_info_to_howto_rel NULL |
|||
#define elf_backend_relocate_section elf32_msp430_relocate_section |
|||
#define elf_backend_gc_mark_hook elf32_msp430_gc_mark_hook |
|||
#define elf_backend_gc_sweep_hook elf32_msp430_gc_sweep_hook |
|||
#define elf_backend_check_relocs elf32_msp430_check_relocs |
|||
#define elf_backend_can_gc_sections 1 |
|||
#define elf_backend_final_write_processing bfd_elf_msp430_final_write_processing |
|||
#define elf_backend_object_p elf32_msp430_object_p |
|||
#define elf_backend_post_process_headers elf32_msp430_post_process_headers |
|||
|
|||
#include "elf32-target.h" |
|||
File diff suppressed because it is too large
@ -0,0 +1,114 @@ |
|||
/* This file is tc-msp430.h
|
|||
Copyright (C) 2002 Free Software Foundation, Inc. |
|||
|
|||
Contributed by Dmitry Diky <diwil@mail.ru> |
|||
|
|||
This file is part of GAS, the GNU Assembler. |
|||
|
|||
GAS is free software; you can redistribute it and/or modify |
|||
it under the terms of the GNU General Public License as published by |
|||
the Free Software Foundation; either version 2, or (at your option) |
|||
any later version. |
|||
|
|||
GAS is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
GNU General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU General Public License |
|||
along with GAS; see the file COPYING. If not, write to the Free |
|||
Software Foundation, 59 Temple Place - Suite 330, Boston, MA |
|||
02111-1307, USA. */ |
|||
|
|||
#ifndef BFD_ASSEMBLER |
|||
#error MSP430 support requires BFD_ASSEMBLER |
|||
#endif |
|||
|
|||
#define TC_MSP430 |
|||
/* By convention, you should define this macro in the `.h' file. For
|
|||
example, `tc-m68k.h' defines `TC_M68K'. You might have to use this |
|||
if it is necessary to add CPU specific code to the object format |
|||
file. */ |
|||
|
|||
#define TARGET_FORMAT "elf32-msp430" |
|||
/* This macro is the BFD target name to use when creating the output
|
|||
file. This will normally depend upon the `OBJ_FMT' macro. */ |
|||
|
|||
#define TARGET_ARCH bfd_arch_msp430 |
|||
/* This macro is the BFD architecture to pass to `bfd_set_arch_mach'. */ |
|||
|
|||
#define TARGET_MACH 0 |
|||
/* This macro is the BFD machine number to pass to
|
|||
`bfd_set_arch_mach'. If it is not defined, GAS will use 0. */ |
|||
|
|||
#define TARGET_BYTES_BIG_ENDIAN 0 |
|||
/* You should define this macro to be non-zero if the target is big
|
|||
endian, and zero if the target is little endian. */ |
|||
|
|||
#define ONLY_STANDARD_ESCAPES |
|||
/* If you define this macro, GAS will warn about the use of
|
|||
nonstandard escape sequences in a string. */ |
|||
|
|||
#define md_operand(x) |
|||
/* GAS will call this function for any expression that can not be
|
|||
recognized. When the function is called, `input_line_pointer' |
|||
will point to the start of the expression. */ |
|||
|
|||
#define md_number_to_chars number_to_chars_littleendian |
|||
/* This should just call either `number_to_chars_bigendian' or
|
|||
`number_to_chars_littleendian', whichever is appropriate. On |
|||
targets like the MIPS which support options to change the |
|||
endianness, which function to call is a runtime decision. On |
|||
other targets, `md_number_to_chars' can be a simple macro. */ |
|||
|
|||
#define WORKING_DOT_WORD |
|||
/*
|
|||
`md_short_jump_size' |
|||
`md_long_jump_size' |
|||
`md_create_short_jump' |
|||
`md_create_long_jump' |
|||
If `WORKING_DOT_WORD' is defined, GAS will not do broken word |
|||
processing (*note Broken words::.). Otherwise, you should set |
|||
`md_short_jump_size' to the size of a short jump (a jump that is |
|||
just long enough to jump around a long jmp) and |
|||
`md_long_jump_size' to the size of a long jump (a jump that can go |
|||
anywhere in the function), You should define |
|||
`md_create_short_jump' to create a short jump around a long jump, |
|||
and define `md_create_long_jump' to create a long jump. */ |
|||
|
|||
#define MD_APPLY_FIX3 |
|||
|
|||
#define TC_HANDLES_FX_DONE |
|||
|
|||
#undef RELOC_EXPANSION_POSSIBLE |
|||
/* If you define this macro, it means that `tc_gen_reloc' may return
|
|||
multiple relocation entries for a single fixup. In this case, the |
|||
return value of `tc_gen_reloc' is a pointer to a null terminated |
|||
array. */ |
|||
|
|||
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section(FIXP, SEC) |
|||
/* If you define this macro, it should return the offset between the
|
|||
address of a PC relative fixup and the position from which the PC |
|||
relative adjustment should be made. On many processors, the base |
|||
of a PC relative instruction is the next instruction, so this |
|||
macro would return the length of an instruction. */ |
|||
|
|||
extern long md_pcrel_from_section PARAMS ((struct fix *, segT)); |
|||
|
|||
#define LISTING_WORD_SIZE 2 |
|||
/* The number of bytes to put into a word in a listing. This affects
|
|||
the way the bytes are clumped together in the listing. For |
|||
example, a value of 2 might print `1234 5678' where a value of 1 |
|||
would print `12 34 56 78'. The default value is 4. */ |
|||
|
|||
#define LEX_DOLLAR 0 |
|||
/* MSP430 port does not use `$' as a logical line separator */ |
|||
|
|||
#define TC_IMPLICIT_LCOMM_ALIGNMENT(SIZE, P2VAR) (P2VAR) = 0 |
|||
/* An `.lcomm' directive with no explicit alignment parameter will
|
|||
use this macro to set P2VAR to the alignment that a request for |
|||
SIZE bytes will have. The alignment is expressed as a power of |
|||
two. If no alignment should take place, the macro definition |
|||
should do nothing. Some targets define a `.bss' directive that is |
|||
also affected by this macro. The default definition will set |
|||
P2VAR to the truncated power of two of sizes up to eight bytes. */ |
|||
File diff suppressed because it is too large
@ -0,0 +1,164 @@ |
|||
@c Copyright 2002 Free Software Foundation, Inc. |
|||
@c This is part of the GAS manual. |
|||
@c For copying conditions, see the file as.texinfo. |
|||
@ifset GENERIC |
|||
@page |
|||
@node MSP430-Dependent |
|||
@chapter MSP 430 Dependent Features |
|||
@end ifset |
|||
@ifclear GENERIC |
|||
@node Machine Dependencies |
|||
@chapter MSP 430 Dependent Features |
|||
@end ifclear |
|||
|
|||
@cindex MSP 430 support |
|||
@cindex 430 support |
|||
@menu |
|||
* MSP430 Options:: Options |
|||
* MSP430 Syntax:: Syntax |
|||
* MSP430 Floating Point:: Floating Point |
|||
* MSP430 Directives:: MSP 430 Machine Directives |
|||
* MSP430 Opcodes:: Opcodes |
|||
@end menu |
|||
|
|||
@node MSP430 Options |
|||
@section Options |
|||
@cindex MSP 430 options (none) |
|||
@cindex options for MSP430 (none) |
|||
@code{@value{AS}} has only -m flag which selects the mpu arch. Currently has |
|||
no effect. |
|||
|
|||
@node MSP430 Syntax |
|||
@section Syntax |
|||
@menu |
|||
* MSP430-Macros:: Macros |
|||
* MSP430-Chars:: Special Characters |
|||
* MSP430-Regs:: Register Names |
|||
* MSP430-Ext:: Assembler Extensions |
|||
@end menu |
|||
|
|||
@node MSP430-Macros |
|||
@subsection Macros |
|||
|
|||
@cindex Macros, MSP 430 |
|||
@cindex MSP 430 macros |
|||
The macro syntax used on the MSP 430 is like that described in the MSP |
|||
430 Family Assembler Specification. Normal @code{@value{AS}} |
|||
macros should still work. |
|||
|
|||
Additional built-in macros are: |
|||
|
|||
@table @code |
|||
|
|||
@item llo(exp) |
|||
Extracts least significant word from 32-bit expression 'exp'. |
|||
|
|||
@item lhi(exp) |
|||
Extracts most significant word from 32-bit expression 'exp'. |
|||
|
|||
@item hlo(exp) |
|||
Extracts 3rd word from 64-bit expression 'exp'. |
|||
|
|||
@item hhi(exp) |
|||
Extracts 4rd word from 64-bit expression 'exp'. |
|||
|
|||
@end table |
|||
|
|||
They normally being used as an immediate source operand. |
|||
@smallexample |
|||
mov #llo(1), r10 ; == mov #1, r10 |
|||
mov #lhi(1), r10 ; == mov #0, r10 |
|||
@end smallexample |
|||
|
|||
@node MSP430-Chars |
|||
@subsection Special Characters |
|||
|
|||
@cindex line comment character, MSP 430 |
|||
@cindex MSP 430 line comment character |
|||
@samp{;} is the line comment character. |
|||
|
|||
@cindex identifiers, MSP 430 |
|||
@cindex MSP 430 identifiers |
|||
The character @samp{$} in jump instructions indicates current location and |
|||
implemented only for TI syntax compatibility. |
|||
|
|||
@node MSP430-Regs |
|||
@subsection Register Names |
|||
|
|||
@cindex MSP 430 register names |
|||
@cindex register names, MSP 430 |
|||
General-purpose registers are represented by predefined symbols of the |
|||
form @samp{r@var{N}} (for global registers), where @var{N} represents |
|||
a number between @code{0} and @code{15}. The leading |
|||
letters may be in either upper or lower case; for example, @samp{r13} |
|||
and @samp{R7} are both valid register names. |
|||
|
|||
@cindex special purpose registers, MSP 430 |
|||
Register names @samp{PC}, @samp{SP} and @samp{SR} cannot be used as register names |
|||
and will be treated as variables. Use @samp{r0}, @samp{r1}, and @samp{r2} instead. |
|||
|
|||
|
|||
@node MSP430-Ext |
|||
@subsection Assembler Extensions |
|||
@cindex MSP430 Assembler Extensions |
|||
|
|||
@table @code |
|||
|
|||
@item @@rN |
|||
As destination operand being treated as @samp{0(rn)} |
|||
|
|||
@item 0(rN) |
|||
As source operand being treated as @samp{@@rn} |
|||
|
|||
@item jCOND +N |
|||
Skips next N bytes followed by jump instruction and equivalent to |
|||
@samp{jCOND $+N+2} |
|||
|
|||
@end table |
|||
|
|||
|
|||
@node MSP430 Floating Point |
|||
@section Floating Point |
|||
|
|||
@cindex floating point, MSP 430 (@sc{ieee}) |
|||
@cindex MSP 430 floating point (@sc{ieee}) |
|||
The MSP 430 family uses @sc{ieee} 32-bit floating-point numbers. |
|||
|
|||
@node MSP430 Directives |
|||
@section MSP 430 Machine Directives |
|||
|
|||
@cindex machine directives, MSP 430 |
|||
@cindex MSP 430 machine directives |
|||
@table @code |
|||
@cindex @code{file} directive, MSP 430 |
|||
@item .file |
|||
This directive is ignored; it is accepted for compatibility with other |
|||
MSP 430 assemblers. |
|||
|
|||
@quotation |
|||
@emph{Warning:} in other versions of the @sc{gnu} assembler, @code{.file} is |
|||
used for the directive called @code{.app-file} in the MSP 430 support. |
|||
@end quotation |
|||
|
|||
@cindex @code{line} directive, MSP 430 |
|||
@item .line |
|||
This directive is ignored; it is accepted for compatibility with other |
|||
MSP 430 assemblers. |
|||
|
|||
@cindex @code{sect} directive, MSP 430 |
|||
@item .arch |
|||
Currently this directive is ignored; it is accepted for compatibility with other |
|||
MSP 430 assemblers. |
|||
|
|||
@end table |
|||
|
|||
@node MSP430 Opcodes |
|||
@section Opcodes |
|||
|
|||
@cindex MSP 430 opcodes |
|||
@cindex opcodes for MSP 430 |
|||
@code{@value{AS}} implements all the standard MSP 430 opcodes. No |
|||
additional pseudo-instructions are needed on this family. |
|||
|
|||
For information on the 430 machine instruction set, see @cite{MSP430 |
|||
User's Manual, document slau049b}, Texas Instrument, Inc. |
|||
@ -0,0 +1,55 @@ |
|||
/* MSP430 ELF support for BFD.
|
|||
Copyright (C) 2002 Free Software Foundation, Inc. |
|||
Contributed by Dmitry Diky <diwil@mail.ru> |
|||
|
|||
This file is part of BFD, the Binary File Descriptor library. |
|||
|
|||
This program is free software; you can redistribute it and/or modify |
|||
it under the terms of the GNU General Public License as published by |
|||
the Free Software Foundation; either version 2 of the License, or |
|||
(at your option) any later version. |
|||
|
|||
This program is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
GNU General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU General Public License |
|||
along with this program; if not, write to the Free Software Foundation, Inc., |
|||
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
|||
|
|||
#ifndef _ELF_MSP430_H |
|||
#define _ELF_MSP430_H |
|||
|
|||
#include "elf/reloc-macros.h" |
|||
|
|||
/* Processor specific flags for the ELF header e_flags field. */ |
|||
#define EF_MSP430_MACH 0xff |
|||
|
|||
#define E_MSP430_MACH_MSP430x11x1 110 |
|||
#define E_MSP430_MACH_MSP430x11 11 |
|||
#define E_MSP430_MACH_MSP430x12 12 |
|||
#define E_MSP430_MACH_MSP430x13 13 |
|||
#define E_MSP430_MACH_MSP430x14 14 |
|||
#define E_MSP430_MACH_MSP430x31 31 |
|||
#define E_MSP430_MACH_MSP430x32 32 |
|||
#define E_MSP430_MACH_MSP430x33 33 |
|||
#define E_MSP430_MACH_MSP430x41 41 |
|||
#define E_MSP430_MACH_MSP430x43 43 |
|||
#define E_MSP430_MACH_MSP430x44 44 |
|||
#define E_MSP430_MACH_MSP430x15 15 |
|||
#define E_MSP430_MACH_MSP430x16 16 |
|||
|
|||
/* Relocations. */ |
|||
START_RELOC_NUMBERS (elf_msp430_reloc_type) |
|||
RELOC_NUMBER (R_MSP430_NONE, 0) |
|||
RELOC_NUMBER (R_MSP430_32, 1) |
|||
RELOC_NUMBER (R_MSP430_10_PCREL, 2) |
|||
RELOC_NUMBER (R_MSP430_16, 3) |
|||
RELOC_NUMBER (R_MSP430_16_PCREL, 4) |
|||
RELOC_NUMBER (R_MSP430_16_BYTE, 5) |
|||
RELOC_NUMBER (R_MSP430_16_PCREL_BYTE, 6) |
|||
|
|||
END_RELOC_NUMBERS (R_MSP430_max) |
|||
|
|||
#endif /* _ELF_MSP430_H */ |
|||
@ -0,0 +1,111 @@ |
|||
/* Opcode table for the TI MSP430 microcontrollers
|
|||
|
|||
Copyright 2002 Free Software Foundation, Inc. |
|||
Contributed by Dmitry Diky <diwil@mail.ru> |
|||
|
|||
This program is free software; you can redistribute it and/or modify |
|||
it under the terms of the GNU General Public License as published by |
|||
the Free Software Foundation; either version 2, or (at your option) |
|||
any later version. |
|||
|
|||
This program is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
GNU General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU General Public License |
|||
along with this program; if not, write to the Free Software |
|||
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
|||
|
|||
#ifndef __MSP430_H_ |
|||
#define __MSP430_H_ |
|||
|
|||
struct msp430_operand_s |
|||
{ |
|||
int ol; /* Operand length words. */ |
|||
int am; /* Addr mode. */ |
|||
int reg; /* Register. */ |
|||
int mode; /* Pperand mode. */ |
|||
#define OP_REG 0 |
|||
#define OP_EXP 1 |
|||
#ifndef DASM_SECTION |
|||
expressionS exp; |
|||
#endif |
|||
}; |
|||
|
|||
#define BYTE_OPERATION (1 << 6) /* Byte operation flag for all instructions. */ |
|||
|
|||
struct msp430_opcode_s |
|||
{ |
|||
char *name; |
|||
int fmt; |
|||
int insn_opnumb; |
|||
int bin_opcode; |
|||
int bin_mask; |
|||
}; |
|||
|
|||
#define MSP_INSN(name, size, numb, bin, mask) { #name, size, numb, bin, mask } |
|||
|
|||
static struct msp430_opcode_s msp430_opcodes[] = |
|||
{ |
|||
MSP_INSN (and, 1, 2, 0xf000, 0xf000), |
|||
MSP_INSN (inv, 0, 1, 0xe330, 0xfff0), |
|||
MSP_INSN (xor, 1, 2, 0xe000, 0xf000), |
|||
MSP_INSN (setz, 0, 0, 0xd322, 0xffff), |
|||
MSP_INSN (setc, 0, 0, 0xd312, 0xffff), |
|||
MSP_INSN (eint, 0, 0, 0xd232, 0xffff), |
|||
MSP_INSN (setn, 0, 0, 0xd222, 0xffff), |
|||
MSP_INSN (bis, 1, 2, 0xd000, 0xf000), |
|||
MSP_INSN (clrz, 0, 0, 0xc322, 0xffff), |
|||
MSP_INSN (clrc, 0, 0, 0xc312, 0xffff), |
|||
MSP_INSN (dint, 0, 0, 0xc232, 0xffff), |
|||
MSP_INSN (clrn, 0, 0, 0xc222, 0xffff), |
|||
MSP_INSN (bic, 1, 2, 0xc000, 0xf000), |
|||
MSP_INSN (bit, 1, 2, 0xb000, 0xf000), |
|||
MSP_INSN (dadc, 0, 1, 0xa300, 0xff30), |
|||
MSP_INSN (dadd, 1, 2, 0xa000, 0xf000), |
|||
MSP_INSN (tst, 0, 1, 0x9300, 0xff30), |
|||
MSP_INSN (cmp, 1, 2, 0x9000, 0xf000), |
|||
MSP_INSN (decd, 0, 1, 0x8320, 0xff30), |
|||
MSP_INSN (dec, 0, 1, 0x8310, 0xff30), |
|||
MSP_INSN (sub, 1, 2, 0x8000, 0xf000), |
|||
MSP_INSN (sbc, 0, 1, 0x7300, 0xff30), |
|||
MSP_INSN (subc, 1, 2, 0x7000, 0xf000), |
|||
MSP_INSN (adc, 0, 1, 0x6300, 0xff30), |
|||
MSP_INSN (rlc, 0, 2, 0x6000, 0xf000), |
|||
MSP_INSN (addc, 1, 2, 0x6000, 0xf000), |
|||
MSP_INSN (incd, 0, 1, 0x5320, 0xff30), |
|||
MSP_INSN (inc, 0, 1, 0x5310, 0xff30), |
|||
MSP_INSN (rla, 0, 2, 0x5000, 0xf000), |
|||
MSP_INSN (add, 1, 2, 0x5000, 0xf000), |
|||
MSP_INSN (nop, 0, 0, 0x4303, 0xffff), |
|||
MSP_INSN (clr, 0, 1, 0x4300, 0xff30), |
|||
MSP_INSN (ret, 0, 0, 0x4130, 0xff30), |
|||
MSP_INSN (pop, 0, 1, 0x4130, 0xff30), |
|||
MSP_INSN (br, 0, 3, 0x4000, 0xf000), |
|||
MSP_INSN (mov, 1, 2, 0x4000, 0xf000), |
|||
MSP_INSN (jmp, 3, 1, 0x3c00, 0xfc00), |
|||
MSP_INSN (jl, 3, 1, 0x3800, 0xfc00), |
|||
MSP_INSN (jge, 3, 1, 0x3400, 0xfc00), |
|||
MSP_INSN (jn, 3, 1, 0x3000, 0xfc00), |
|||
MSP_INSN (jc, 3, 1, 0x2c00, 0xfc00), |
|||
MSP_INSN (jhs, 3, 1, 0x2c00, 0xfc00), |
|||
MSP_INSN (jnc, 3, 1, 0x2800, 0xfc00), |
|||
MSP_INSN (jlo, 3, 1, 0x2800, 0xfc00), |
|||
MSP_INSN (jz, 3, 1, 0x2400, 0xfc00), |
|||
MSP_INSN (jeq, 3, 1, 0x2400, 0xfc00), |
|||
MSP_INSN (jnz, 3, 1, 0x2000, 0xfc00), |
|||
MSP_INSN (jne, 3, 1, 0x2000, 0xfc00), |
|||
MSP_INSN (reti, 2, 0, 0x1300, 0xffc0), |
|||
MSP_INSN (call, 2, 1, 0x1280, 0xffc0), |
|||
MSP_INSN (push, 2, 1, 0x1200, 0xff80), |
|||
MSP_INSN (sxt, 2, 1, 0x1180, 0xffc0), |
|||
MSP_INSN (rra, 2, 1, 0x1100, 0xff80), |
|||
MSP_INSN (swpb, 2, 1, 0x1080, 0xffc0), |
|||
MSP_INSN (rrc, 2, 1, 0x1000, 0xff80), |
|||
|
|||
/* End of instruction set. */ |
|||
{ NULL, 0, 0, 0, 0 } |
|||
}; |
|||
|
|||
#endif |
|||
File diff suppressed because it is too large
@ -0,0 +1,14 @@ |
|||
ARCH=msp:11 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xfc00 |
|||
ROM_SIZE=0x3e0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=128 |
|||
|
|||
STACK=0x280 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:110 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xfc00 |
|||
ROM_SIZE=0x3e0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=128 |
|||
|
|||
STACK=0x280 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:110 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xf800 |
|||
ROM_SIZE=0x07e0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=128 |
|||
|
|||
STACK=0x280 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:11 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xf000 |
|||
ROM_SIZE=0xfe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:110 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xf000 |
|||
ROM_SIZE=0x0fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:12 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xf000 |
|||
ROM_SIZE=0xfe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:12 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xf000 |
|||
ROM_SIZE=0xfe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:12 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xe000 |
|||
ROM_SIZE=0x1fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:12 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xe000 |
|||
ROM_SIZE=0x1fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:13 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xe000 |
|||
ROM_SIZE=0x1fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:13 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xe000 |
|||
ROM_SIZE=0x1fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:13 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xc000 |
|||
ROM_SIZE=0x3fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=512 |
|||
|
|||
STACK=0x400 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:13 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xc000 |
|||
ROM_SIZE=0x3fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=512 |
|||
|
|||
STACK=0x400 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:14 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x8000 |
|||
ROM_SIZE=0x7fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=1K |
|||
|
|||
STACK=0x600 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:14 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x4000 |
|||
ROM_SIZE=0xbef0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=0x07ff |
|||
|
|||
STACK=0xa00 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:14 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x1100 |
|||
ROM_SIZE=0xeee0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=0x07ff |
|||
|
|||
STACK=0xa00 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:15 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xc000 |
|||
ROM_SIZE=0x3fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=512 |
|||
|
|||
STACK=0x400 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:15 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xa000 |
|||
ROM_SIZE=0x5fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=512 |
|||
|
|||
STACK=0x400 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:15 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x8000 |
|||
ROM_SIZE=0x7fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=1K |
|||
|
|||
STACK=0x600 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:16 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x8000 |
|||
ROM_SIZE=0x7fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=1K |
|||
|
|||
STACK=0x600 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:16 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x4000 |
|||
ROM_SIZE=0xbef0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=0x07ff |
|||
|
|||
STACK=0xa00 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:16 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x1100 |
|||
ROM_SIZE=0xeee0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=0x07ff |
|||
|
|||
STACK=0xa00 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:31 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xf800 |
|||
ROM_SIZE=0x07e0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=128 |
|||
|
|||
STACK=0x280 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:31 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xf000 |
|||
ROM_SIZE=0x0fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:31 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xe000 |
|||
ROM_SIZE=0x1fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:31 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xd000 |
|||
ROM_SIZE=0x2fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=512 |
|||
|
|||
STACK=0x400 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:31 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xc000 |
|||
ROM_SIZE=0x3fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=512 |
|||
|
|||
STACK=0x400 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:32 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xe000 |
|||
ROM_SIZE=0x1fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:32 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xc000 |
|||
ROM_SIZE=0x3fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=512 |
|||
|
|||
STACK=0x400 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:33 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xa000 |
|||
ROM_SIZE=0x5fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=1024 |
|||
|
|||
STACK=0x600 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:33 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x8000 |
|||
ROM_SIZE=0x7fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=1024 |
|||
|
|||
STACK=0x600 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:41 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xf000 |
|||
ROM_SIZE=0x0fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:41 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xe000 |
|||
ROM_SIZE=0x1fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=256 |
|||
|
|||
STACK=0x300 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:43 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xc000 |
|||
ROM_SIZE=0x3fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=512 |
|||
|
|||
STACK=0x400 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:43 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0xa000 |
|||
ROM_SIZE=0x5fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=1024 |
|||
|
|||
STACK=0x600 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:43 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x8000 |
|||
ROM_SIZE=0x7fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=1024 |
|||
|
|||
STACK=0x600 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:44 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x8000 |
|||
ROM_SIZE=0x7fe0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=1K |
|||
|
|||
STACK=0x600 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:44 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x4000 |
|||
ROM_SIZE=0xbef0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=0x07ff |
|||
|
|||
STACK=0xa00 |
|||
@ -0,0 +1,14 @@ |
|||
ARCH=msp:44 |
|||
MACHINE= |
|||
SCRIPT_NAME=elf32msp430 |
|||
OUTPUT_FORMAT="elf32-msp430" |
|||
MAXPAGESIZE=1 |
|||
EMBEDDED=yes |
|||
TEMPLATE_NAME=generic |
|||
|
|||
ROM_START=0x1100 |
|||
ROM_SIZE=0xeee0 |
|||
RAM_START=0x0200 |
|||
RAM_SIZE=0x07ff |
|||
|
|||
STACK=0xa00 |
|||
@ -0,0 +1,188 @@ |
|||
cat <<EOF |
|||
OUTPUT_FORMAT("${OUTPUT_FORMAT}","${OUTPUT_FORMAT}","${OUTPUT_FORMAT}") |
|||
OUTPUT_ARCH(${ARCH}) |
|||
|
|||
MEMORY |
|||
{ |
|||
text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE |
|||
data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE |
|||
vectors (rw) : ORIGIN = 0xffe0, LENGTH = 0x20 |
|||
bootloader(rx) : ORIGIN = 0x0c00, LENGTH = 1K |
|||
infomem(rx) : ORIGIN = 0x1000, LENGTH = 256 |
|||
infomemnobits(rx) : ORIGIN = 0x1000, LENGTH = 256 |
|||
} |
|||
|
|||
SECTIONS |
|||
{ |
|||
/* Read-only sections, merged into text segment. */ |
|||
${TEXT_DYNAMIC+${DYNAMIC}} |
|||
.hash ${RELOCATING-0} : { *(.hash) } |
|||
.dynsym ${RELOCATING-0} : { *(.dynsym) } |
|||
.dynstr ${RELOCATING-0} : { *(.dynstr) } |
|||
.gnu.version ${RELOCATING-0} : { *(.gnu.version) } |
|||
.gnu.version_d ${RELOCATING-0} : { *(.gnu.version_d) } |
|||
.gnu.version_r ${RELOCATING-0} : { *(.gnu.version_r) } |
|||
|
|||
.rel.init ${RELOCATING-0} : { *(.rel.init) } |
|||
.rela.init ${RELOCATING-0} : { *(.rela.init) } |
|||
.rel.text ${RELOCATING-0} : |
|||
{ |
|||
*(.rel.text) |
|||
${RELOCATING+*(.rel.text.*)} |
|||
${RELOCATING+*(.rel.gnu.linkonce.t*)} |
|||
} |
|||
.rela.text ${RELOCATING-0} : |
|||
{ |
|||
*(.rela.text) |
|||
${RELOCATING+*(.rela.text.*)} |
|||
${RELOCATING+*(.rela.gnu.linkonce.t*)} |
|||
} |
|||
.rel.fini ${RELOCATING-0} : { *(.rel.fini) } |
|||
.rela.fini ${RELOCATING-0} : { *(.rela.fini) } |
|||
.rel.rodata ${RELOCATING-0} : |
|||
{ |
|||
*(.rel.rodata) |
|||
${RELOCATING+*(.rel.rodata.*)} |
|||
${RELOCATING+*(.rel.gnu.linkonce.r*)} |
|||
} |
|||
.rela.rodata ${RELOCATING-0} : |
|||
{ |
|||
*(.rela.rodata) |
|||
${RELOCATING+*(.rela.rodata.*)} |
|||
${RELOCATING+*(.rela.gnu.linkonce.r*)} |
|||
} |
|||
.rel.data ${RELOCATING-0} : |
|||
{ |
|||
*(.rel.data) |
|||
${RELOCATING+*(.rel.data.*)} |
|||
${RELOCATING+*(.rel.gnu.linkonce.d*)} |
|||
} |
|||
.rela.data ${RELOCATING-0} : |
|||
{ |
|||
*(.rela.data) |
|||
${RELOCATING+*(.rela.data.*)} |
|||
${RELOCATING+*(.rela.gnu.linkonce.d*)} |
|||
} |
|||
.rel.ctors ${RELOCATING-0} : { *(.rel.ctors) } |
|||
.rela.ctors ${RELOCATING-0} : { *(.rela.ctors) } |
|||
.rel.dtors ${RELOCATING-0} : { *(.rel.dtors) } |
|||
.rela.dtors ${RELOCATING-0} : { *(.rela.dtors) } |
|||
.rel.got ${RELOCATING-0} : { *(.rel.got) } |
|||
.rela.got ${RELOCATING-0} : { *(.rela.got) } |
|||
.rel.bss ${RELOCATING-0} : { *(.rel.bss) } |
|||
.rela.bss ${RELOCATING-0} : { *(.rela.bss) } |
|||
.rel.plt ${RELOCATING-0} : { *(.rel.plt) } |
|||
.rela.plt ${RELOCATING-0} : { *(.rela.plt) } |
|||
|
|||
/* Internal text space. */ |
|||
.text : |
|||
{ |
|||
*(.init) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
*(.text) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
*(.text.*) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
*(.fini) |
|||
${RELOCATING+ _etext = . ; } |
|||
} ${RELOCATING+ > text} |
|||
|
|||
.data ${RELOCATING-0} : ${RELOCATING+AT (ADDR (.text) + SIZEOF (.text))} |
|||
{ |
|||
${RELOCATING+ PROVIDE (__data_start = .) ; } |
|||
${RELOCATING+. = ALIGN(2);} |
|||
*(.data) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
*(.gnu.linkonce.d*) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
${RELOCATING+ _edata = . ; } |
|||
} ${RELOCATING+ > data} |
|||
|
|||
/* Bootloader. */ |
|||
.bootloader ${RELOCATING-0} : |
|||
{ |
|||
${RELOCATING+ PROVIDE (__boot_start = .) ; } |
|||
*(.bootloader) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
*(.bootloader.*) |
|||
} ${RELOCATING+ > bootloader} |
|||
|
|||
/* Information memory. */ |
|||
.infomem ${RELOCATING-0} : |
|||
{ |
|||
*(.infomem) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
*(.infomem.*) |
|||
} ${RELOCATING+ > infomem} |
|||
|
|||
/* Information memory (not loaded into MPU). */ |
|||
.infomemnobits ${RELOCATING-0} : |
|||
{ |
|||
*(.infomemnobits) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
*(.infomemnobits.*) |
|||
} ${RELOCATING+ > infomemnobits} |
|||
|
|||
.bss ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} : |
|||
{ |
|||
${RELOCATING+ PROVIDE (__bss_start = .) ; } |
|||
*(.bss) |
|||
*(COMMON) |
|||
${RELOCATING+ PROVIDE (__bss_end = .) ; } |
|||
${RELOCATING+ _end = . ; } |
|||
} ${RELOCATING+ > data} |
|||
|
|||
.noinit ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} : |
|||
{ |
|||
${RELOCATING+ PROVIDE (__noinit_start = .) ; } |
|||
*(.noinit) |
|||
*(COMMON) |
|||
${RELOCATING+ PROVIDE (__noinit_end = .) ; } |
|||
${RELOCATING+ _end = . ; } |
|||
} ${RELOCATING+ > data} |
|||
|
|||
.vectors ${RELOCATING-0}: |
|||
{ |
|||
${RELOCATING+ PROVIDE (__vectors_start = .) ; } |
|||
*(.vectors*) |
|||
${RELOCATING+ _vectors_end = . ; } |
|||
} ${RELOCATING+ > vectors} |
|||
|
|||
|
|||
/* Stabs debugging sections. */ |
|||
.stab 0 : { *(.stab) } |
|||
.stabstr 0 : { *(.stabstr) } |
|||
.stab.excl 0 : { *(.stab.excl) } |
|||
.stab.exclstr 0 : { *(.stab.exclstr) } |
|||
.stab.index 0 : { *(.stab.index) } |
|||
.stab.indexstr 0 : { *(.stab.indexstr) } |
|||
.comment 0 : { *(.comment) } |
|||
|
|||
/* DWARF debug sections. |
|||
Symbols in the DWARF debugging sections are relative to the beginning |
|||
of the section so we begin them at 0. */ |
|||
|
|||
/* DWARF 1 */ |
|||
.debug 0 : { *(.debug) } |
|||
.line 0 : { *(.line) } |
|||
|
|||
/* GNU DWARF 1 extensions */ |
|||
.debug_srcinfo 0 : { *(.debug_srcinfo) } |
|||
.debug_sfnames 0 : { *(.debug_sfnames) } |
|||
|
|||
/* DWARF 1.1 and DWARF 2 */ |
|||
.debug_aranges 0 : { *(.debug_aranges) } |
|||
.debug_pubnames 0 : { *(.debug_pubnames) } |
|||
|
|||
/* DWARF 2 */ |
|||
.debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } |
|||
.debug_abbrev 0 : { *(.debug_abbrev) } |
|||
.debug_line 0 : { *(.debug_line) } |
|||
.debug_frame 0 : { *(.debug_frame) } |
|||
.debug_str 0 : { *(.debug_str) } |
|||
.debug_loc 0 : { *(.debug_loc) } |
|||
.debug_macinfo 0 : { *(.debug_macinfo) } |
|||
|
|||
PROVIDE (__stack = ${STACK}) ; |
|||
} |
|||
EOF |
|||
@ -0,0 +1,157 @@ |
|||
cat <<EOF |
|||
OUTPUT_FORMAT("${OUTPUT_FORMAT}","${OUTPUT_FORMAT}","${OUTPUT_FORMAT}") |
|||
OUTPUT_ARCH(${ARCH}) |
|||
|
|||
MEMORY |
|||
{ |
|||
text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE |
|||
data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE |
|||
vectors (rw) : ORIGIN = 0xffe0, LENGTH = 0x20 |
|||
} |
|||
|
|||
SECTIONS |
|||
{ |
|||
/* Read-only sections, merged into text segment. */ |
|||
${TEXT_DYNAMIC+${DYNAMIC}} |
|||
.hash ${RELOCATING-0} : { *(.hash) } |
|||
.dynsym ${RELOCATING-0} : { *(.dynsym) } |
|||
.dynstr ${RELOCATING-0} : { *(.dynstr) } |
|||
.gnu.version ${RELOCATING-0} : { *(.gnu.version) } |
|||
.gnu.version_d ${RELOCATING-0} : { *(.gnu.version_d) } |
|||
.gnu.version_r ${RELOCATING-0} : { *(.gnu.version_r) } |
|||
|
|||
.rel.init ${RELOCATING-0} : { *(.rel.init) } |
|||
.rela.init ${RELOCATING-0} : { *(.rela.init) } |
|||
.rel.text ${RELOCATING-0} : |
|||
{ |
|||
*(.rel.text) |
|||
${RELOCATING+*(.rel.text.*)} |
|||
${RELOCATING+*(.rel.gnu.linkonce.t*)} |
|||
} |
|||
.rela.text ${RELOCATING-0} : |
|||
{ |
|||
*(.rela.text) |
|||
${RELOCATING+*(.rela.text.*)} |
|||
${RELOCATING+*(.rela.gnu.linkonce.t*)} |
|||
} |
|||
.rel.fini ${RELOCATING-0} : { *(.rel.fini) } |
|||
.rela.fini ${RELOCATING-0} : { *(.rela.fini) } |
|||
.rel.rodata ${RELOCATING-0} : |
|||
{ |
|||
*(.rel.rodata) |
|||
${RELOCATING+*(.rel.rodata.*)} |
|||
${RELOCATING+*(.rel.gnu.linkonce.r*)} |
|||
} |
|||
.rela.rodata ${RELOCATING-0} : |
|||
{ |
|||
*(.rela.rodata) |
|||
${RELOCATING+*(.rela.rodata.*)} |
|||
${RELOCATING+*(.rela.gnu.linkonce.r*)} |
|||
} |
|||
.rel.data ${RELOCATING-0} : |
|||
{ |
|||
*(.rel.data) |
|||
${RELOCATING+*(.rel.data.*)} |
|||
${RELOCATING+*(.rel.gnu.linkonce.d*)} |
|||
} |
|||
.rela.data ${RELOCATING-0} : |
|||
{ |
|||
*(.rela.data) |
|||
${RELOCATING+*(.rela.data.*)} |
|||
${RELOCATING+*(.rela.gnu.linkonce.d*)} |
|||
} |
|||
.rel.ctors ${RELOCATING-0} : { *(.rel.ctors) } |
|||
.rela.ctors ${RELOCATING-0} : { *(.rela.ctors) } |
|||
.rel.dtors ${RELOCATING-0} : { *(.rel.dtors) } |
|||
.rela.dtors ${RELOCATING-0} : { *(.rela.dtors) } |
|||
.rel.got ${RELOCATING-0} : { *(.rel.got) } |
|||
.rela.got ${RELOCATING-0} : { *(.rela.got) } |
|||
.rel.bss ${RELOCATING-0} : { *(.rel.bss) } |
|||
.rela.bss ${RELOCATING-0} : { *(.rela.bss) } |
|||
.rel.plt ${RELOCATING-0} : { *(.rel.plt) } |
|||
.rela.plt ${RELOCATING-0} : { *(.rela.plt) } |
|||
|
|||
/* Internal text space. */ |
|||
.text : |
|||
{ |
|||
*(.init) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
*(.text) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
*(.text.*) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
*(.fini) |
|||
${RELOCATING+ _etext = . ; } |
|||
} ${RELOCATING+ > text} |
|||
|
|||
.data ${RELOCATING-0} : ${RELOCATING+AT (ADDR (.text) + SIZEOF (.text))} |
|||
{ |
|||
${RELOCATING+ PROVIDE (__data_start = .) ; } |
|||
*(.data) |
|||
*(.gnu.linkonce.d*) |
|||
${RELOCATING+. = ALIGN(2);} |
|||
${RELOCATING+ _edata = . ; } |
|||
} ${RELOCATING+ > data} |
|||
|
|||
.bss ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} : |
|||
{ |
|||
${RELOCATING+ PROVIDE (__bss_start = .) ; } |
|||
*(.bss) |
|||
*(COMMON) |
|||
${RELOCATING+ PROVIDE (__bss_end = .) ; } |
|||
${RELOCATING+ _end = . ; } |
|||
} ${RELOCATING+ > data} |
|||
|
|||
.noinit ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} : |
|||
{ |
|||
${RELOCATING+ PROVIDE (__noinit_start = .) ; } |
|||
*(.noinit) |
|||
*(COMMON) |
|||
${RELOCATING+ PROVIDE (__noinit_end = .) ; } |
|||
${RELOCATING+ _end = . ; } |
|||
} ${RELOCATING+ > data} |
|||
|
|||
.vectors ${RELOCATING-0}: |
|||
{ |
|||
${RELOCATING+ PROVIDE (__vectors_start = .) ; } |
|||
*(.vectors*) |
|||
${RELOCATING+ _vectors_end = . ; } |
|||
} ${RELOCATING+ > vectors} |
|||
|
|||
/* Stabs debugging sections. */ |
|||
.stab 0 : { *(.stab) } |
|||
.stabstr 0 : { *(.stabstr) } |
|||
.stab.excl 0 : { *(.stab.excl) } |
|||
.stab.exclstr 0 : { *(.stab.exclstr) } |
|||
.stab.index 0 : { *(.stab.index) } |
|||
.stab.indexstr 0 : { *(.stab.indexstr) } |
|||
.comment 0 : { *(.comment) } |
|||
|
|||
/* DWARF debug sections. |
|||
Symbols in the DWARF debugging sections are relative to the beginning |
|||
of the section so we begin them at 0. */ |
|||
|
|||
/* DWARF 1 */ |
|||
.debug 0 : { *(.debug) } |
|||
.line 0 : { *(.line) } |
|||
|
|||
/* GNU DWARF 1 extensions */ |
|||
.debug_srcinfo 0 : { *(.debug_srcinfo) } |
|||
.debug_sfnames 0 : { *(.debug_sfnames) } |
|||
|
|||
/* DWARF 1.1 and DWARF 2 */ |
|||
.debug_aranges 0 : { *(.debug_aranges) } |
|||
.debug_pubnames 0 : { *(.debug_pubnames) } |
|||
|
|||
/* DWARF 2 */ |
|||
.debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } |
|||
.debug_abbrev 0 : { *(.debug_abbrev) } |
|||
.debug_line 0 : { *(.debug_line) } |
|||
.debug_frame 0 : { *(.debug_frame) } |
|||
.debug_str 0 : { *(.debug_str) } |
|||
.debug_loc 0 : { *(.debug_loc) } |
|||
.debug_macinfo 0 : { *(.debug_macinfo) } |
|||
|
|||
PROVIDE (__stack = ${STACK}) ; |
|||
} |
|||
EOF |
|||
@ -0,0 +1,805 @@ |
|||
/* Disassemble MSP430 instructions.
|
|||
Copyright (C) 2002 Free Software Foundation, Inc. |
|||
|
|||
Contributed by Dmitry Diky <diwil@mail.ru> |
|||
|
|||
This program is free software; you can redistribute it and/or modify |
|||
it under the terms of the GNU General Public License as published by |
|||
the Free Software Foundation; either version 2 of the License, or |
|||
(at your option) any later version. |
|||
|
|||
This program is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
GNU General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU General Public License |
|||
along with this program; if not, write to the Free Software |
|||
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
|||
|
|||
#include <stdio.h> |
|||
#include <ctype.h> |
|||
#include <string.h> |
|||
#include <sys/types.h> |
|||
|
|||
#include "dis-asm.h" |
|||
#include "opintl.h" |
|||
#include "libiberty.h" |
|||
|
|||
#define DASM_SECTION |
|||
#include "opcode/msp430.h" |
|||
#undef DASM_SECTION |
|||
|
|||
|
|||
static unsigned short msp430dis_opcode |
|||
PARAMS ((bfd_vma, disassemble_info *)); |
|||
int print_insn_msp430 |
|||
PARAMS ((bfd_vma, disassemble_info *)); |
|||
int msp430_nooperands |
|||
PARAMS ((struct msp430_opcode_s *, bfd_vma, unsigned short, char *, int *)); |
|||
int msp430_singleoperand |
|||
PARAMS ((disassemble_info *, struct msp430_opcode_s *, bfd_vma, unsigned short, |
|||
char *, char *, int *)); |
|||
int msp430_doubleoperand |
|||
PARAMS ((disassemble_info *, struct msp430_opcode_s *, bfd_vma, unsigned short, |
|||
char *, char *, char *, char *, int *)); |
|||
int msp430_branchinstr |
|||
PARAMS ((disassemble_info *, struct msp430_opcode_s *, bfd_vma, unsigned short, |
|||
char *, char *, int *)); |
|||
|
|||
#define PS(x) (0xffff & (x)) |
|||
|
|||
static unsigned short |
|||
msp430dis_opcode (addr, info) |
|||
bfd_vma addr; |
|||
disassemble_info *info; |
|||
{ |
|||
bfd_byte buffer[2]; |
|||
int status; |
|||
|
|||
status = info->read_memory_func (addr, buffer, 2, info); |
|||
if (status != 0) |
|||
{ |
|||
info->memory_error_func (status, addr, info); |
|||
return -1; |
|||
} |
|||
return bfd_getl16 (buffer); |
|||
} |
|||
|
|||
int |
|||
print_insn_msp430 (addr, info) |
|||
bfd_vma addr; |
|||
disassemble_info *info; |
|||
{ |
|||
void *stream = info->stream; |
|||
fprintf_ftype prin = info->fprintf_func; |
|||
struct msp430_opcode_s *opcode; |
|||
char op1[32], op2[32], comm1[64], comm2[64]; |
|||
int cmd_len = 0; |
|||
unsigned short insn; |
|||
int cycles = 0; |
|||
char *bc = ""; |
|||
char dinfo[32]; /* Debug purposes. */ |
|||
|
|||
insn = msp430dis_opcode (addr, info); |
|||
sprintf (dinfo, "0x%04x", insn); |
|||
|
|||
if (((int) addr & 0xffff) > 0xffdf) |
|||
{ |
|||
(*prin) (stream, "interrupt service routine at 0x%04x", 0xffff & insn); |
|||
return 2; |
|||
} |
|||
|
|||
*comm1 = 0; |
|||
*comm2 = 0; |
|||
|
|||
for (opcode = msp430_opcodes; opcode->name; opcode++) |
|||
{ |
|||
if ((insn & opcode->bin_mask) == opcode->bin_opcode |
|||
&& opcode->bin_opcode != 0x9300) |
|||
{ |
|||
*op1 = 0; |
|||
*op2 = 0; |
|||
*comm1 = 0; |
|||
*comm2 = 0; |
|||
|
|||
/* r0 as destination. Ad should be zero. */ |
|||
if (opcode->insn_opnumb == 3 && (insn & 0x000f) == 0 |
|||
&& (0x0080 & insn) == 0) |
|||
{ |
|||
cmd_len = |
|||
msp430_branchinstr (info, opcode, addr, insn, op1, comm1, |
|||
&cycles); |
|||
if (cmd_len) |
|||
break; |
|||
} |
|||
|
|||
switch (opcode->insn_opnumb) |
|||
{ |
|||
case 0: |
|||
cmd_len = msp430_nooperands (opcode, addr, insn, comm1, &cycles); |
|||
break; |
|||
case 2: |
|||
cmd_len = |
|||
msp430_doubleoperand (info, opcode, addr, insn, op1, op2, |
|||
comm1, comm2, &cycles); |
|||
if (insn & BYTE_OPERATION) |
|||
bc = ".b"; |
|||
break; |
|||
case 1: |
|||
cmd_len = |
|||
msp430_singleoperand (info, opcode, addr, insn, op1, comm1, |
|||
&cycles); |
|||
if (insn & BYTE_OPERATION && opcode->fmt != 3) |
|||
bc = ".b"; |
|||
break; |
|||
default: |
|||
break; |
|||
} |
|||
} |
|||
|
|||
if (cmd_len) |
|||
break; |
|||
} |
|||
|
|||
dinfo[5] = 0; |
|||
|
|||
if (cmd_len < 1) |
|||
{ |
|||
/* Unknown opcode, or invalid combination of operands. */ |
|||
(*prin) (stream, ".word 0x%04x; ????", PS (insn)); |
|||
return 2; |
|||
} |
|||
|
|||
(*prin) (stream, "%s%s", opcode->name, bc); |
|||
|
|||
if (*op1) |
|||
(*prin) (stream, "\t%s", op1); |
|||
if (*op2) |
|||
(*prin) (stream, ","); |
|||
|
|||
if (strlen (op1) < 7) |
|||
(*prin) (stream, "\t"); |
|||
if (!strlen (op1)) |
|||
(*prin) (stream, "\t"); |
|||
|
|||
if (*op2) |
|||
(*prin) (stream, "%s", op2); |
|||
if (strlen (op2) < 8) |
|||
(*prin) (stream, "\t"); |
|||
|
|||
if (*comm1 || *comm2) |
|||
(*prin) (stream, ";"); |
|||
else if (cycles) |
|||
{ |
|||
if (*op2) |
|||
(*prin) (stream, ";"); |
|||
else |
|||
{ |
|||
if (strlen (op1) < 7) |
|||
(*prin) (stream, ";"); |
|||
else |
|||
(*prin) (stream, "\t;"); |
|||
} |
|||
} |
|||
if (*comm1) |
|||
(*prin) (stream, "%s", comm1); |
|||
if (*comm1 && *comm2) |
|||
(*prin) (stream, ","); |
|||
if (*comm2) |
|||
(*prin) (stream, " %s", comm2); |
|||
return cmd_len; |
|||
} |
|||
|
|||
int |
|||
msp430_nooperands (opcode, addr, insn, comm, cycles) |
|||
struct msp430_opcode_s *opcode; |
|||
bfd_vma addr ATTRIBUTE_UNUSED; |
|||
unsigned short insn ATTRIBUTE_UNUSED; |
|||
char *comm; |
|||
int *cycles; |
|||
{ |
|||
/* Pop with constant. */ |
|||
if (insn == 0x43b2) |
|||
return 0; |
|||
if (insn == opcode->bin_opcode) |
|||
return 2; |
|||
|
|||
if (opcode->fmt == 0) |
|||
{ |
|||
if ((insn & 0x0f00) != 3 || (insn & 0x0f00) != 2) |
|||
return 0; |
|||
|
|||
strcpy (comm, "emulated..."); |
|||
*cycles = 1; |
|||
} |
|||
else |
|||
{ |
|||
strcpy (comm, "return from interupt"); |
|||
*cycles = 5; |
|||
} |
|||
|
|||
return 2; |
|||
} |
|||
|
|||
|
|||
int |
|||
msp430_singleoperand (info, opcode, addr, insn, op, comm, cycles) |
|||
disassemble_info *info; |
|||
struct msp430_opcode_s *opcode; |
|||
bfd_vma addr; |
|||
unsigned short insn; |
|||
char *op; |
|||
char *comm; |
|||
int *cycles; |
|||
{ |
|||
int regs = 0, regd = 0; |
|||
int ad = 0, as = 0; |
|||
int where = 0; |
|||
int cmd_len = 2; |
|||
short dst = 0; |
|||
|
|||
regd = insn & 0x0f; |
|||
regs = (insn & 0x0f00) >> 8; |
|||
as = (insn & 0x0030) >> 4; |
|||
ad = (insn & 0x0080) >> 7; |
|||
|
|||
switch (opcode->fmt) |
|||
{ |
|||
case 0: /* Emulated work with dst register. */ |
|||
if (regs != 2 && regs != 3 && regs != 1) |
|||
return 0; |
|||
|
|||
/* Check if not clr insn. */ |
|||
if (opcode->bin_opcode == 0x4300 && (ad || as)) |
|||
return 0; |
|||
|
|||
/* Check if really inc, incd insns. */ |
|||
if ((opcode->bin_opcode & 0xff00) == 0x5300 && as == 3) |
|||
return 0; |
|||
|
|||
if (ad == 0) |
|||
{ |
|||
*cycles = 1; |
|||
|
|||
/* Register. */ |
|||
if (regd == 0) |
|||
{ |
|||
*cycles += 1; |
|||
sprintf (op, "r0"); |
|||
} |
|||
else if (regd == 1) |
|||
sprintf (op, "r1"); |
|||
|
|||
else if (regd == 2) |
|||
sprintf (op, "r2"); |
|||
|
|||
else |
|||
sprintf (op, "r%d", regd); |
|||
} |
|||
else /* ad == 1 msp430dis_opcode. */ |
|||
{ |
|||
if (regd == 0) |
|||
{ |
|||
/* PC relative. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
*cycles = 4; |
|||
sprintf (op, "0x%04x", dst); |
|||
sprintf (comm, "PC rel. abs addr 0x%04x", |
|||
PS ((short) (addr + 2) + dst)); |
|||
} |
|||
else if (regd == 2) |
|||
{ |
|||
/* Absolute. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
*cycles = 4; |
|||
sprintf (op, "&0x%04x", PS (dst)); |
|||
} |
|||
else |
|||
{ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
*cycles = 4; |
|||
sprintf (op, "%d(r%d)", dst, regd); |
|||
} |
|||
} |
|||
break; |
|||
|
|||
case 2: /* rrc, push, call, swpb, rra, sxt, push, call, reti etc... */ |
|||
|
|||
if (as == 0) |
|||
{ |
|||
if (regd == 3) |
|||
{ |
|||
/* Constsnts. */ |
|||
sprintf (op, "#0"); |
|||
sprintf (comm, "r3 As==00"); |
|||
} |
|||
else |
|||
{ |
|||
/* Register. */ |
|||
sprintf (op, "r%d", regd); |
|||
} |
|||
*cycles = 1; |
|||
} |
|||
else if (as == 2) |
|||
{ |
|||
*cycles = 1; |
|||
if (regd == 2) |
|||
{ |
|||
sprintf (op, "#4"); |
|||
sprintf (comm, "r2 As==10"); |
|||
} |
|||
else if (regd == 3) |
|||
{ |
|||
sprintf (op, "#2"); |
|||
sprintf (comm, "r3 As==10"); |
|||
} |
|||
else |
|||
{ |
|||
*cycles = 3; |
|||
/* Indexed register mode @Rn. */ |
|||
sprintf (op, "@r%d", regd); |
|||
} |
|||
} |
|||
else if (as == 3) |
|||
{ |
|||
*cycles = 1; |
|||
if (regd == 2) |
|||
{ |
|||
sprintf (op, "#8"); |
|||
sprintf (comm, "r2 As==11"); |
|||
} |
|||
else if (regd == 3) |
|||
{ |
|||
sprintf (op, "#-1"); |
|||
sprintf (comm, "r3 As==11"); |
|||
} |
|||
else if (regd == 0) |
|||
{ |
|||
*cycles = 3; |
|||
/* absolute. @pc+ */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
sprintf (op, "#%d", dst); |
|||
sprintf (comm, "#0x%04x", PS (dst)); |
|||
} |
|||
else |
|||
{ |
|||
*cycles = 3; |
|||
sprintf (op, "@r%d+", regd); |
|||
} |
|||
} |
|||
else if (as == 1) |
|||
{ |
|||
*cycles = 4; |
|||
if (regd == 0) |
|||
{ |
|||
/* PC relative. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
sprintf (op, "0x%04x", PS (dst)); |
|||
sprintf (comm, "PC rel. 0x%04x", |
|||
PS ((short) addr + 2 + dst)); |
|||
} |
|||
else if (regd == 2) |
|||
{ |
|||
/* Absolute. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
sprintf (op, "&0x%04x", PS (dst)); |
|||
} |
|||
else if (regd == 3) |
|||
{ |
|||
*cycles = 1; |
|||
sprintf (op, "#1"); |
|||
sprintf (comm, "r3 As==01"); |
|||
} |
|||
else |
|||
{ |
|||
/* Indexd. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
sprintf (op, "%d(r%d)", dst, regd); |
|||
} |
|||
} |
|||
break; |
|||
|
|||
case 3: /* Jumps. */ |
|||
where = insn & 0x03ff; |
|||
if (where & 0x200) |
|||
where |= ~0x03ff; |
|||
if (where > 512 || where < -511) |
|||
return 0; |
|||
|
|||
where *= 2; |
|||
sprintf (op, "$%+-8d", where + 2); |
|||
sprintf (comm, "abs 0x%x", PS ((short) (addr) + 2 + where)); |
|||
*cycles = 2; |
|||
return 2; |
|||
break; |
|||
default: |
|||
cmd_len = 0; |
|||
} |
|||
|
|||
return cmd_len; |
|||
} |
|||
|
|||
int |
|||
msp430_doubleoperand (info, opcode, addr, insn, op1, op2, comm1, comm2, cycles) |
|||
disassemble_info *info; |
|||
struct msp430_opcode_s *opcode; |
|||
bfd_vma addr; |
|||
unsigned short insn; |
|||
char *op1, *op2; |
|||
char *comm1, *comm2; |
|||
int *cycles; |
|||
{ |
|||
int regs = 0, regd = 0; |
|||
int ad = 0, as = 0; |
|||
int cmd_len = 2; |
|||
short dst = 0; |
|||
|
|||
regd = insn & 0x0f; |
|||
regs = (insn & 0x0f00) >> 8; |
|||
as = (insn & 0x0030) >> 4; |
|||
ad = (insn & 0x0080) >> 7; |
|||
|
|||
if (opcode->fmt == 0) |
|||
{ |
|||
/* Special case: rla and rlc are the only 2 emulated instructions that
|
|||
fall into two operand instructions. */ |
|||
/* With dst, there are only:
|
|||
Rm Register, |
|||
x(Rm) Indexed, |
|||
0xXXXX Relative, |
|||
&0xXXXX Absolute |
|||
emulated_ins dst |
|||
basic_ins dst, dst. */ |
|||
|
|||
if (regd != regs || as != ad) |
|||
return 0; /* May be 'data' section. */ |
|||
|
|||
if (ad == 0) |
|||
{ |
|||
/* Register mode. */ |
|||
if (regd == 3) |
|||
{ |
|||
strcpy (comm1, "Illegal as emulation instr"); |
|||
return -1; |
|||
} |
|||
|
|||
sprintf (op1, "r%d", regd); |
|||
*cycles = 1; |
|||
} |
|||
else /* ad == 1 */ |
|||
{ |
|||
if (regd == 0) |
|||
{ |
|||
/* PC relative, Symbolic. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 4; |
|||
*cycles = 6; |
|||
sprintf (op1, "0x%04x", PS (dst)); |
|||
sprintf (comm1, "PC rel. 0x%04x", |
|||
PS ((short) addr + 2 + dst)); |
|||
|
|||
} |
|||
else if (regd == 2) |
|||
{ |
|||
/* Absolute. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 4; |
|||
*cycles = 6; |
|||
sprintf (op1, "&0x%04x", PS (dst)); |
|||
} |
|||
else |
|||
{ |
|||
/* Indexed. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 4; |
|||
*cycles = 6; |
|||
sprintf (op1, "%d(r%d)", dst, regd); |
|||
} |
|||
} |
|||
|
|||
*op2 = 0; |
|||
*comm2 = 0; |
|||
return cmd_len; |
|||
} |
|||
|
|||
/* Two operands exactly. */ |
|||
if (ad == 0 && regd == 3) |
|||
{ |
|||
/* R2/R3 are illegal as dest: may be data section. */ |
|||
strcpy (comm1, "Illegal as 2-op instr"); |
|||
return -1; |
|||
} |
|||
|
|||
/* Source. */ |
|||
if (as == 0) |
|||
{ |
|||
*cycles = 1; |
|||
if (regs == 3) |
|||
{ |
|||
/* Constsnts. */ |
|||
sprintf (op1, "#0"); |
|||
sprintf (comm1, "r3 As==00"); |
|||
} |
|||
else |
|||
{ |
|||
/* Register. */ |
|||
sprintf (op1, "r%d", regs); |
|||
} |
|||
} |
|||
else if (as == 2) |
|||
{ |
|||
*cycles = 1; |
|||
|
|||
if (regs == 2) |
|||
{ |
|||
sprintf (op1, "#4"); |
|||
sprintf (comm1, "r2 As==10"); |
|||
} |
|||
else if (regs == 3) |
|||
{ |
|||
sprintf (op1, "#2"); |
|||
sprintf (comm1, "r3 As==10"); |
|||
} |
|||
else |
|||
{ |
|||
*cycles = 2; |
|||
|
|||
/* Indexed register mode @Rn. */ |
|||
sprintf (op1, "@r%d", regs); |
|||
} |
|||
if (!regs) |
|||
*cycles = 3; |
|||
} |
|||
else if (as == 3) |
|||
{ |
|||
if (regs == 2) |
|||
{ |
|||
sprintf (op1, "#8"); |
|||
sprintf (comm1, "r2 As==11"); |
|||
*cycles = 1; |
|||
} |
|||
else if (regs == 3) |
|||
{ |
|||
sprintf (op1, "#-1"); |
|||
sprintf (comm1, "r3 As==11"); |
|||
*cycles = 1; |
|||
} |
|||
else if (regs == 0) |
|||
{ |
|||
*cycles = 3; |
|||
/* Absolute. @pc+ */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
sprintf (op1, "#%d", dst); |
|||
sprintf (comm1, "#0x%04x", PS (dst)); |
|||
} |
|||
else |
|||
{ |
|||
*cycles = 2; |
|||
sprintf (op1, "@r%d+", regs); |
|||
} |
|||
} |
|||
else if (as == 1) |
|||
{ |
|||
if (regs == 0) |
|||
{ |
|||
*cycles = 4; |
|||
/* PC relative. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
sprintf (op1, "0x%04x", PS (dst)); |
|||
sprintf (comm1, "PC rel. 0x%04x", |
|||
PS ((short) addr + 2 + dst)); |
|||
} |
|||
else if (regs == 2) |
|||
{ |
|||
*cycles = 2; |
|||
/* Absolute. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
sprintf (op1, "&0x%04x", PS (dst)); |
|||
sprintf (comm1, "0x%04x", PS (dst)); |
|||
} |
|||
else if (regs == 3) |
|||
{ |
|||
*cycles = 1; |
|||
sprintf (op1, "#1"); |
|||
sprintf (comm1, "r3 As==01"); |
|||
} |
|||
else |
|||
{ |
|||
*cycles = 3; |
|||
/* Indexed. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
sprintf (op1, "%d(r%d)", dst, regs); |
|||
} |
|||
} |
|||
|
|||
/* Destination. Special care needed on addr + XXXX. */ |
|||
|
|||
if (ad == 0) |
|||
{ |
|||
/* Register. */ |
|||
if (regd == 0) |
|||
{ |
|||
*cycles += 1; |
|||
sprintf (op2, "r0"); |
|||
} |
|||
else if (regd == 1) |
|||
sprintf (op2, "r1"); |
|||
|
|||
else if (regd == 2) |
|||
sprintf (op2, "r2"); |
|||
|
|||
else |
|||
sprintf (op2, "r%d", regd); |
|||
} |
|||
else /* ad == 1. */ |
|||
{ |
|||
* cycles += 3; |
|||
|
|||
if (regd == 0) |
|||
{ |
|||
/* PC relative. */ |
|||
*cycles += 1; |
|||
dst = msp430dis_opcode (addr + cmd_len, info); |
|||
sprintf (op2, "0x%04x", PS (dst)); |
|||
sprintf (comm2, "PC rel. 0x%04x", |
|||
PS ((short) addr + cmd_len + dst)); |
|||
cmd_len += 2; |
|||
} |
|||
else if (regd == 2) |
|||
{ |
|||
/* Absolute. */ |
|||
dst = msp430dis_opcode (addr + cmd_len, info); |
|||
cmd_len += 2; |
|||
sprintf (op2, "&0x%04x", PS (dst)); |
|||
} |
|||
else |
|||
{ |
|||
dst = msp430dis_opcode (addr + cmd_len, info); |
|||
cmd_len += 2; |
|||
sprintf (op2, "%d(r%d)", dst, regd); |
|||
} |
|||
} |
|||
|
|||
return cmd_len; |
|||
} |
|||
|
|||
|
|||
int |
|||
msp430_branchinstr (info, opcode, addr, insn, op1, comm1, cycles) |
|||
disassemble_info *info; |
|||
struct msp430_opcode_s *opcode ATTRIBUTE_UNUSED; |
|||
bfd_vma addr ATTRIBUTE_UNUSED; |
|||
unsigned short insn; |
|||
char *op1; |
|||
char *comm1; |
|||
int *cycles; |
|||
{ |
|||
int regs = 0, regd = 0; |
|||
int ad = 0, as = 0; |
|||
int cmd_len = 2; |
|||
short dst = 0; |
|||
|
|||
regd = insn & 0x0f; |
|||
regs = (insn & 0x0f00) >> 8; |
|||
as = (insn & 0x0030) >> 4; |
|||
ad = (insn & 0x0080) >> 7; |
|||
|
|||
if (regd != 0) /* Destination register is not a PC. */ |
|||
return 0; |
|||
|
|||
/* dst is a source register. */ |
|||
if (as == 0) |
|||
{ |
|||
/* Constants. */ |
|||
if (regs == 3) |
|||
{ |
|||
*cycles = 1; |
|||
sprintf (op1, "#0"); |
|||
sprintf (comm1, "r3 As==00"); |
|||
} |
|||
else |
|||
{ |
|||
/* Register. */ |
|||
*cycles = 1; |
|||
sprintf (op1, "r%d", regs); |
|||
} |
|||
} |
|||
else if (as == 2) |
|||
{ |
|||
if (regs == 2) |
|||
{ |
|||
*cycles = 2; |
|||
sprintf (op1, "#4"); |
|||
sprintf (comm1, "r2 As==10"); |
|||
} |
|||
else if (regs == 3) |
|||
{ |
|||
*cycles = 1; |
|||
sprintf (op1, "#2"); |
|||
sprintf (comm1, "r3 As==10"); |
|||
} |
|||
else |
|||
{ |
|||
/* Indexed register mode @Rn. */ |
|||
*cycles = 2; |
|||
sprintf (op1, "@r%d", regs); |
|||
} |
|||
} |
|||
else if (as == 3) |
|||
{ |
|||
if (regs == 2) |
|||
{ |
|||
*cycles = 1; |
|||
sprintf (op1, "#8"); |
|||
sprintf (comm1, "r2 As==11"); |
|||
} |
|||
else if (regs == 3) |
|||
{ |
|||
*cycles = 1; |
|||
sprintf (op1, "#-1"); |
|||
sprintf (comm1, "r3 As==11"); |
|||
} |
|||
else if (regs == 0) |
|||
{ |
|||
/* Absolute. @pc+ */ |
|||
*cycles = 3; |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
sprintf (op1, "#0x%04x", PS (dst)); |
|||
} |
|||
else |
|||
{ |
|||
*cycles = 2; |
|||
sprintf (op1, "@r%d+", regs); |
|||
} |
|||
} |
|||
else if (as == 1) |
|||
{ |
|||
* cycles = 3; |
|||
|
|||
if (regs == 0) |
|||
{ |
|||
/* PC relative. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
(*cycles)++; |
|||
sprintf (op1, "0x%04x", PS (dst)); |
|||
sprintf (comm1, "PC rel. 0x%04x", |
|||
PS ((short) addr + 2 + dst)); |
|||
} |
|||
else if (regs == 2) |
|||
{ |
|||
/* Absolute. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
sprintf (op1, "&0x%04x", PS (dst)); |
|||
} |
|||
else if (regs == 3) |
|||
{ |
|||
(*cycles)--; |
|||
sprintf (op1, "#1"); |
|||
sprintf (comm1, "r3 As==01"); |
|||
} |
|||
else |
|||
{ |
|||
/* Indexd. */ |
|||
dst = msp430dis_opcode (addr + 2, info); |
|||
cmd_len += 2; |
|||
sprintf (op1, "%d(r%d)", dst, regs); |
|||
} |
|||
} |
|||
|
|||
return cmd_len; |
|||
} |
|||
Loading…
Reference in new issue