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The existing code would accept VLD2.64 and similar undefined instructions. gas/ChangeLog: 2013-09-16 Will Newton <will.newton@linaro.org> * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint disallowing element size 64 with interleave other than 1. gas/testsuite/ChangeLog: 2013-09-16 Will Newton <will.newton@linaro.org> * gas/arm/neon-ldst-es.d: Add VLD1.64 instructions. * gas/arm/neon-ldst-es.s: Likewise. * testsuite/gas/arm/neon-ldst-es-bad.d: New file. * testsuite/gas/arm/neon-ldst-es-bad.l: Likewise. * testsuite/gas/arm/neon-ldst-es-bad.s: Likewise.binutils-2_24-branch
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# name: Bad element size combinations in Neon load/store instructions |
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# as: -mfpu=neon |
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# error-output: neon-ldst-es-bad.l |
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[^:]*: Assembler messages: |
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[^:]*:2: Error: bad type in Neon instruction -- `vld1\.64 {d0\[1\]},\[r0\]' |
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[^:]*:3: Error: bad type in Neon instruction -- `vld1\.64 {d0\[\]},\[r0\]' |
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[^:]*:4: Error: bad type in Neon instruction -- `vld2\.64 {d0\[1\]},\[r0\]' |
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[^:]*:5: Error: bad type in Neon instruction -- `vld2\.64 {d0\[\]},\[r0\]' |
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[^:]*:6: Error: bad element type for instruction -- `vld2\.64 {d0-d1},\[r0\]' |
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[^:]*:7: Error: bad type in Neon instruction -- `vld3\.64 {d0\[1\]},\[r0\]' |
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[^:]*:8: Error: bad type in Neon instruction -- `vld3\.64 {d0\[\]},\[r0\]' |
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[^:]*:9: Error: bad element type for instruction -- `vld3\.64 {d0-d2},\[r0\]' |
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[^:]*:10: Error: bad type in Neon instruction -- `vld4\.64 {d0\[1\]},\[r0\]' |
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[^:]*:11: Error: bad type in Neon instruction -- `vld4\.64 {d0\[\]},\[r0\]' |
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[^:]*:12: Error: bad element type for instruction -- `vld4\.64 {d0-d3},\[r0\]' |
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.text |
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vld1.64 {d0[1]}, [r0] |
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vld1.64 {d0[]}, [r0] |
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vld2.64 {d0[1]}, [r0] |
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vld2.64 {d0[]}, [r0] |
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vld2.64 {d0-d1}, [r0] |
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vld3.64 {d0[1]}, [r0] |
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vld3.64 {d0[]}, [r0] |
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vld3.64 {d0-d2}, [r0] |
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vld4.64 {d0[1]}, [r0] |
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vld4.64 {d0[]}, [r0] |
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vld4.64 {d0-d3}, [r0] |
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