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endianness. Provide defaults for some tier-1 mips targets. o Parameterize all functions with SIM_DESC.gdb-4_18-branch
Andrew Cagney
29 years ago
8 changed files with 822 additions and 543 deletions
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/* MIPS Simulator definition.
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Copyright (C) 1997 Free Software Foundation, Inc. |
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Contributed by Cygnus Support. |
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This file is part of GDB, the GNU debugger. |
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This program is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 2, or (at your option) |
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any later version. |
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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You should have received a copy of the GNU General Public License along |
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with this program; if not, write to the Free Software Foundation, Inc., |
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
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#ifndef SIM_MAIN_H |
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#define SIM_MAIN_H |
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/* This simulator doesn't cache the Current Instruction Address */ |
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#define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA) |
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#define SIM_ENGINE_RESUME_HOOK(SD, LAST_CPU, CIA) |
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#define SIM_HAVE_BIENDIAN |
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#define SIM_HAVE_FLATMEM |
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/* hobble some common features for moment */ |
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#define WITH_PROFILE 0 |
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#define WITH_TRACE 0 |
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#define WITH_WATCHPOINTS 1 |
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#include "sim-basics.h" |
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/* dummy - not used */ |
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typedef int sim_cia; |
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#define NULL_CIA 0 |
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#include "sim-base.h" |
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/* Depreciated macros and types for manipulating 64bit values. Use
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../common/sim-bits.h and ../common/sim-endian.h macros instead. */ |
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typedef signed64 word64; |
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typedef unsigned64 uword64; |
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#define WORD64LO(t) (unsigned int)((t)&0xFFFFFFFF) |
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#define WORD64HI(t) (unsigned int)(((uword64)(t))>>32) |
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#define SET64LO(t) (((uword64)(t))&0xFFFFFFFF) |
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#define SET64HI(t) (((uword64)(t))<<32) |
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#define WORD64(h,l) ((word64)((SET64HI(h)|SET64LO(l)))) |
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#define UWORD64(h,l) (SET64HI(h)|SET64LO(l)) |
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/* Sign-extend the given value (e) as a value (b) bits long. We cannot
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assume the HI32bits of the operand are zero, so we must perform a |
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mask to ensure we can use the simple subtraction to sign-extend. */ |
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#define SIGNEXTEND(e,b) \ |
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(((e) & ((uword64) 1 << ((b) - 1))) \ |
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? (((e) & (((uword64) 1 << (b)) - 1)) - ((uword64)1 << (b))) \ |
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: ((e) & (((((uword64) 1 << ((b) - 1)) - 1) << 1) | 1))) |
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/* Check if a value will fit within a halfword: */ |
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#define NOTHALFWORDVALUE(v) ((((((uword64)(v)>>16) == 0) && !((v) & ((unsigned)1 << 15))) || (((((uword64)(v)>>32) == 0xFFFFFFFF) && ((((uword64)(v)>>16) & 0xFFFF) == 0xFFFF)) && ((v) & ((unsigned)1 << 15)))) ? (1 == 0) : (1 == 1)) |
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/* windows always looses */ |
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#include <signal.h> |
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#ifndef SIGBUS |
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#define SIGBUS SIGSEGV |
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#endif |
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#ifdef _WIN32 |
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#define SIGTRAP 5 |
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#define SIGQUIT 3 |
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#endif |
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/* FIXME: At present the CPU registers are static */ |
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struct _sim_cpu { |
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sim_cpu_base base; |
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}; |
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/* MIPS specific simulator watch config */ |
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void watch_options_install PARAMS ((SIM_DESC sd)); |
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struct swatch { |
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sim_event *pc; |
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sim_event *clock; |
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sim_event *cycles; |
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}; |
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/* FIXME: At present much of the simulator is still static */ |
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struct sim_state { |
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struct swatch watch; |
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sim_cpu cpu[1]; |
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#if (WITH_SMP) |
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#define STATE_CPU(sd,n) (&(sd)->cpu[n]) |
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#else |
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#define STATE_CPU(sd,n) (&(sd)->cpu[0]) |
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#endif |
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sim_state_base base; |
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}; |
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/* Exceptions: */ |
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/* NOTE: These numbers depend on the processor architecture being
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simulated: */ |
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#define Interrupt (0) |
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#define TLBModification (1) |
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#define TLBLoad (2) |
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#define TLBStore (3) |
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#define AddressLoad (4) |
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#define AddressStore (5) |
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#define InstructionFetch (6) |
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#define DataReference (7) |
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#define SystemCall (8) |
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#define BreakPoint (9) |
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#define ReservedInstruction (10) |
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#define CoProcessorUnusable (11) |
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#define IntegerOverflow (12) /* Arithmetic overflow (IDT monitor raises SIGFPE) */ |
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#define Trap (13) |
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#define FPE (15) |
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#define DebugBreakPoint (16) |
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#define Watch (23) |
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/* The following exception code is actually private to the simulator
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world. It is *NOT* a processor feature, and is used to signal |
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run-time errors in the simulator. */ |
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#define SimulatorFault (0xFFFFFFFF) |
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void signal_exception (SIM_DESC sd, int exception, ...); |
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#define SignalException(exc,instruction) signal_exception (sd, (exc), (instruction)) |
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#define SignalExceptionInterrupt() signal_exception (sd, Interrupt) |
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#define SignalExceptionInstructionFetch() signal_exception (sd, InstructionFetch) |
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#define SignalExceptionAddressStore() signal_exception (sd, AddressStore) |
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#define SignalExceptionAddressLoad() signal_exception (sd, AddressLoad) |
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#define SignalExceptionSimulatorFault(buf) signal_exception (sd, SimulatorFault, buf) |
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#define SignalExceptionFPE() signal_exception (sd, FPE) |
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#define SignalExceptionIntegerOverflow() signal_exception (sd, IntegerOverflow) |
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#define SignalExceptionCoProcessorUnusable() signal_exception (sd, CoProcessorUnusable) |
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/* Floating-point operations: */ |
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/* FPU registers must be one of the following types. All other values
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are reserved (and undefined). */ |
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typedef enum { |
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fmt_single = 0, |
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fmt_double = 1, |
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fmt_word = 4, |
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fmt_long = 5, |
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/* The following are well outside the normal acceptable format
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range, and are used in the register status vector. */ |
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fmt_unknown = 0x10000000, |
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fmt_uninterpreted = 0x20000000, |
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} FP_formats; |
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unsigned64 value_fpr PARAMS ((SIM_DESC sd, int fpr, FP_formats)); |
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#define ValueFPR(FPR,FMT) value_fpr (sd, (FPR), (FMT)) |
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void store_fpr PARAMS ((SIM_DESC sd, int fpr, FP_formats fmt, unsigned64 value)); |
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#define StoreFPR(FPR,FMT,VALUE) store_fpr (sd, (FPR), (FMT), (VALUE)) |
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int NaN PARAMS ((unsigned64 op, FP_formats fmt)); |
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int Infinity PARAMS ((unsigned64 op, FP_formats fmt)); |
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int Less PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt)); |
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int Equal PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt)); |
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unsigned64 AbsoluteValue PARAMS ((unsigned64 op, FP_formats fmt)); |
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unsigned64 Negate PARAMS ((unsigned64 op, FP_formats fmt)); |
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unsigned64 Add PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt)); |
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unsigned64 Sub PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt)); |
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unsigned64 Multiply PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt)); |
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unsigned64 Divide PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt)); |
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unsigned64 Recip PARAMS ((unsigned64 op, FP_formats fmt)); |
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unsigned64 SquareRoot PARAMS ((unsigned64 op, FP_formats fmt)); |
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unsigned64 convert PARAMS ((SIM_DESC sd, int rm, unsigned64 op, FP_formats from, FP_formats to)); |
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#define Convert(rm,op,from,to) convert(sd,rm,op,from,to) |
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/* Co-processor accesses */ |
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void cop_lw PARAMS ((SIM_DESC sd, int coproc_num, int coproc_reg, unsigned int memword)); |
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void cop_ld PARAMS ((SIM_DESC sd, int coproc_num, int coproc_reg, uword64 memword)); |
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unsigned int cop_sw PARAMS ((SIM_DESC sd, int coproc_num, int coproc_reg)); |
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uword64 cop_sd PARAMS ((SIM_DESC sd, int coproc_num, int coproc_reg)); |
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#define COP_LW(coproc_num,coproc_reg,memword) cop_lw(sd,coproc_num,coproc_reg,memword) |
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#define COP_LD(coproc_num,coproc_reg,memword) cop_ld(sd,coproc_num,coproc_reg,memword) |
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#define COP_SW(coproc_num,coproc_reg) cop_sw(sd,coproc_num,coproc_reg) |
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#define COP_SD(coproc_num,coproc_reg) cop_sd(sd,coproc_num,coproc_reg) |
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/* Memory accesses */ |
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int address_translation PARAMS ((SIM_DESC sd, uword64 vAddr, int IorD, int LorS, uword64 *pAddr, int *CCA, int host, int raw)); |
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#define AddressTranslation(vAddr,IorD,LorS,pAddr,CCA,host,raw) \ |
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address_translation(sd, vAddr,IorD,LorS,pAddr,CCA,host,raw) |
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void load_memory PARAMS ((SIM_DESC sd, uword64* memvalp, uword64* memval1p, int CCA, int AccessLength, uword64 pAddr, uword64 vAddr, int IorD, int raw)); |
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#define LoadMemory(memvalp,memval1p,CCA,AccessLength,pAddr,vAddr,IorD,raw) \ |
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load_memory(sd,memvalp,memval1p,CCA,AccessLength,pAddr,vAddr,IorD,raw) |
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void store_memory PARAMS ((SIM_DESC sd, int CCA, int AccessLength, uword64 MemElem, uword64 MemElem1, uword64 pAddr, uword64 vAddr, int raw)); |
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#define StoreMemory(CCA,AccessLength,MemElem,MemElem1,pAddr,vAddr,raw) \ |
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store_memory(sd,CCA,AccessLength,MemElem,MemElem1,pAddr,vAddr,raw) |
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void cache_op PARAMS ((SIM_DESC sd, int op, uword64 pAddr, uword64 vAddr, unsigned int instruction)); |
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#define CacheOp(op,pAddr,vAddr,instruction) cache_op(sd,op,pAddr,vAddr,instruction) |
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#endif |
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@ -1,108 +0,0 @@ |
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/*> support.h <*/ |
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/* Support for the MIPS architecture simulator.
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This file is part of the MIPS sim |
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THIS SOFTWARE IS NOT COPYRIGHTED |
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Cygnus offers the following for use in the public domain. Cygnus |
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makes no warranty with regard to the software or it's performance |
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and the user accepts the software "AS IS" with all faults. |
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CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO |
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THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. |
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$Revision$ |
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$Author$ |
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$Date$ |
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*/ |
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#ifndef __support_h |
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#define __support_h |
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/* For 64bit values either use the GCC "long long" feature, or have a
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structure made from two 32bit values. We can then have macros for |
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accessing the LO and HI parts of the value. Also we can provide |
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macros for the basic operations we want to perform on 64bit values |
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(i.e. ADD64,SUB64,SHIFTLEFT64, etc.). This means we should be able |
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to host the simulator on non-GCC compilers, and 32bit only |
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architectures if desired. */ |
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/* Control via a build boolean for the moment */ |
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#if defined(__GNUC__) || defined(_WIN32) |
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#ifdef _WIN32 |
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#define SIGTRAP 5 |
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#define SIGQUIT 3 |
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typedef signed __int64 word64; |
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typedef unsigned __int64 uword64; |
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#else |
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typedef long long word64; |
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typedef unsigned long long uword64; |
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#endif |
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#define WORD64LO(t) (unsigned int)((t)&0xFFFFFFFF) |
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#define WORD64HI(t) (unsigned int)(((uword64)(t))>>32) |
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#define SET64LO(t) (((uword64)(t))&0xFFFFFFFF) |
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#define SET64HI(t) (((uword64)(t))<<32) |
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#define WORD64(h,l) ((word64)((SET64HI(h)|SET64LO(l)))) |
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#define UWORD64(h,l) (SET64HI(h)|SET64LO(l)) |
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/* Sign-extend the given value (e) as a value (b) bits long. We cannot
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assume the HI32bits of the operand are zero, so we must perform a |
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mask to ensure we can use the simple subtraction to sign-extend. */ |
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#define SIGNEXTEND(e,b) \ |
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(((e) & ((uword64) 1 << ((b) - 1))) \ |
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? (((e) & (((uword64) 1 << (b)) - 1)) - ((uword64)1 << (b))) \ |
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: ((e) & (((((uword64) 1 << ((b) - 1)) - 1) << 1) | 1))) |
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/* Check if a value will fit within a word (unsigned int): */ |
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#define NOTWORDVALUE(v) ((((((uword64)(v)>>32) == 0) && !((v) & ((unsigned)1 << 31))) || ((((uword64)(v)>>32) == 0xFFFFFFFF) && ((v) & ((unsigned)1 << 31)))) ? (1 == 0) : (1 == 1)) |
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/* Check if a value will fit within a halfword: */ |
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#define NOTHALFWORDVALUE(v) ((((((uword64)(v)>>16) == 0) && !((v) & ((unsigned)1 << 15))) || (((((uword64)(v)>>32) == 0xFFFFFFFF) && ((((uword64)(v)>>16) & 0xFFFF) == 0xFFFF)) && ((v) & ((unsigned)1 << 15)))) ? (1 == 0) : (1 == 1)) |
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/* The following should be executed once at the start of day in the
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main emulator control function. The simulator assumes char is |
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8bits, and from this: */ |
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#define CHECKSIM() {\ |
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if (sizeof(int) != (4 * sizeof(char)))\ |
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SignalException(SimulatorFault,"sizeof(int) != 4");\ |
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if (sizeof(word64) != (8 * sizeof(char)))\ |
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SignalException(SimulatorFault,"sizeof(word64) != 8");\ |
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} |
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#else /* non-GCC build */ |
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#error "non-GCC build to be completed" /* avoid using long long */ |
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typedef struct uword64 { |
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unsigned int lo; |
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unsigned int hi; |
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} uword64; |
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#define WORD64LO(t) (unsigned int)(t.lo) |
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#define WORD64HI(t) (unsigned int)(t.hi) |
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#define SET64LO(t) (..TODO..) /* need structure into which value will be placed */ |
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#define SET64HI(t) (..TODO..) /* need structure into which value will be placed */ |
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#define WORD64(h,l) (SET64HI(h)|SET64LO(l)) |
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/* TODO: Update these to manipulate the split structure values */ |
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#define SIGNEXTEND(e,b) /* TODO */ |
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#define NOTWORDVALUE(v) /* TODO */ |
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#define NOTHALFWORDVALUE(v) /* TODO */ |
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/* The following should be executed once at the start of day in the
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main emulator control function. The simulator assumes char is |
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8bits, and from this: */ |
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#define CHECKSIM() {\ |
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if (sizeof(int) != (4 * sizeof(char)))\ |
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SignalException(SimulatorFault,"sizeof(int) != 4");\ |
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} |
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#endif /* non-GCC build */ |
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#endif /* __support_h */ |
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/*> EOF support.h <*/ |
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