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Use disassemble_info.private_data in place of insn_sets 

No cgen target uses private_data.  This patch removes a
disassemble_info field that is only used by cgen, and instead uses
private_data.  It also removes a macro that is no longer used.

include/
	* dis-asm.h (struct disassemble_info): Delete insn_sets.
	(INIT_DISASSEMBLE_INFO_NO_ARCH): Don't define.
opcodes/
	* cgen-dis.in (print_insn_@arch@): Replace insn_sets with private_data.
	* disassemble.c (disassemble_init_for_target): Likewise.
	* bpf-dis.c: Regenerate.
	* epiphany-dis.c: Regenerate.
	* fr30-dis.c: Regenerate.
	* frv-dis.c: Regenerate.
	* ip2k-dis.c: Regenerate.
	* iq2000-dis.c: Regenerate.
	* lm32-dis.c: Regenerate.
	* m32c-dis.c: Regenerate.
	* m32r-dis.c: Regenerate.
	* mep-dis.c: Regenerate.
	* mt-dis.c: Regenerate.
	* or1k-dis.c: Regenerate.
	* xc16x-dis.c: Regenerate.
	* xstormy16-dis.c: Regenerate.
gdb-9-branch
Alan Modra 6 years ago
parent
6f0e075230
commit
103ebbc35c
19 changed files with 51 additions and 35 deletions
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  1. 5
      include/ChangeLog
  2. 8
      include/dis-asm.h
  3. 19
      opcodes/ChangeLog
  4. 2
      opcodes/bpf-dis.c
  5. 2
      opcodes/cgen-dis.in
  6. 24
      opcodes/disassemble.c
  7. 2
      opcodes/epiphany-dis.c
  8. 2
      opcodes/fr30-dis.c
  9. 2
      opcodes/frv-dis.c
  10. 2
      opcodes/ip2k-dis.c
  11. 2
      opcodes/iq2000-dis.c
  12. 2
      opcodes/lm32-dis.c
  13. 2
      opcodes/m32c-dis.c
  14. 2
      opcodes/m32r-dis.c
  15. 2
      opcodes/mep-dis.c
  16. 2
      opcodes/mt-dis.c
  17. 2
      opcodes/or1k-dis.c
  18. 2
      opcodes/xc16x-dis.c
  19. 2
      opcodes/xstormy16-dis.c

5
include/ChangeLog
View File

@ -1,3 +1,8 @@
2019-12-10 Alan Modra <amodra@gmail.com>
* dis-asm.h (struct disassemble_info): Delete insn_sets.
(INIT_DISASSEMBLE_INFO_NO_ARCH): Don't define.
2019-12-05 Jan Beulich <jbeulich@suse.com>
* opcode/aarch64.h (AARCH64_FEATURE_CRYPTO): Expand to the

8
include/dis-asm.h
View File

@ -78,11 +78,6 @@ typedef struct disassemble_info
enum bfd_endian endian;
/* Endianness of code, for mixed-endian situations such as ARM BE8. */
enum bfd_endian endian_code;
/* An arch/mach-specific bitmask of selected instruction subsets, mainly
for processors with run-time-switchable instruction sets. The default,
zero, means that there is no constraint. CGEN-based opcodes ports
may use ISA_foo masks. */
void *insn_sets;
/* Some targets need information about the current section to accurately
display insns. If this is NULL, the target disassembler function
@ -394,9 +389,6 @@ extern void init_disassemble_info (struct disassemble_info *dinfo, void *stream,
/* For compatibility with existing code. */
#define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC))
#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC))
#ifdef __cplusplus
}

19
opcodes/ChangeLog
View File

@ -1,3 +1,22 @@
2019-12-10 Alan Modra <amodra@gmail.com>
* cgen-dis.in (print_insn_@arch@): Replace insn_sets with private_data.
* disassemble.c (disassemble_init_for_target): Likewise.
* bpf-dis.c: Regenerate.
* epiphany-dis.c: Regenerate.
* fr30-dis.c: Regenerate.
* frv-dis.c: Regenerate.
* ip2k-dis.c: Regenerate.
* iq2000-dis.c: Regenerate.
* lm32-dis.c: Regenerate.
* m32c-dis.c: Regenerate.
* m32r-dis.c: Regenerate.
* mep-dis.c: Regenerate.
* mt-dis.c: Regenerate.
* or1k-dis.c: Regenerate.
* xc16x-dis.c: Regenerate.
* xstormy16-dis.c: Regenerate.
2019-12-10 Alan Modra <amodra@gmail.com>
* ppc-dis.c (private): Delete variable.

2
opcodes/bpf-dis.c
View File

@ -553,7 +553,7 @@ print_insn_bpf (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/cgen-dis.in
View File

@ -388,7 +388,7 @@ print_insn_@arch@ (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

24
opcodes/disassemble.c
View File

@ -654,26 +654,26 @@ disassemble_init_for_target (struct disassemble_info * info)
/* This processor in fact is little endian. The value set here
reflects the way opcodes are written in the cgen description. */
info->endian = BFD_ENDIAN_BIG;
if (! info->insn_sets)
if (!info->private_data)
{
info->insn_sets = cgen_bitset_create (ISA_MAX);
info->private_data = cgen_bitset_create (ISA_MAX);
if (info->mach == bfd_mach_m16c)
cgen_bitset_set (info->insn_sets, ISA_M16C);
cgen_bitset_set (info->private_data, ISA_M16C);
else
cgen_bitset_set (info->insn_sets, ISA_M32C);
cgen_bitset_set (info->private_data, ISA_M32C);
}
break;
#endif
#ifdef ARCH_bpf
case bfd_arch_bpf:
if (!info->insn_sets)
{
info->insn_sets = cgen_bitset_create (ISA_EBPFMAX);
if (info->endian == BFD_ENDIAN_BIG)
cgen_bitset_set (info->insn_sets, ISA_EBPFBE);
else
cgen_bitset_set (info->insn_sets, ISA_EBPFLE);
}
if (!info->private_data)
{
info->private_data = cgen_bitset_create (ISA_EBPFMAX);
if (info->endian == BFD_ENDIAN_BIG)
cgen_bitset_set (info->private_data, ISA_EBPFBE);
else
cgen_bitset_set (info->private_data, ISA_EBPFLE);
}
break;
#endif
#ifdef ARCH_pru

2
opcodes/epiphany-dis.c
View File

@ -629,7 +629,7 @@ print_insn_epiphany (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/fr30-dis.c
View File

@ -650,7 +650,7 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/frv-dis.c
View File

@ -747,7 +747,7 @@ print_insn_frv (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/ip2k-dis.c
View File

@ -639,7 +639,7 @@ print_insn_ip2k (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/iq2000-dis.c
View File

@ -540,7 +540,7 @@ print_insn_iq2000 (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/lm32-dis.c
View File

@ -498,7 +498,7 @@ print_insn_lm32 (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/m32c-dis.c
View File

@ -1242,7 +1242,7 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/m32r-dis.c
View File

@ -630,7 +630,7 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/mep-dis.c
View File

@ -1538,7 +1538,7 @@ print_insn_mep (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/mt-dis.c
View File

@ -641,7 +641,7 @@ print_insn_mt (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/or1k-dis.c
View File

@ -534,7 +534,7 @@ print_insn_or1k (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/xc16x-dis.c
View File

@ -771,7 +771,7 @@ print_insn_xc16x (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

2
opcodes/xstormy16-dis.c
View File

@ -519,7 +519,7 @@ print_insn_xstormy16 (bfd_vma pc, disassemble_info *info)
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */

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