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@ -56,10 +56,6 @@ static bfd_boolean m32r_elf_add_symbol_hook |
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static bfd_boolean m32r_elf_relocate_section |
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PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, |
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Elf_Internal_Rela *, Elf_Internal_Sym *, asection **)); |
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#if 0 /* not yet */
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static bfd_boolean m32r_elf_relax_delete_bytes |
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PARAMS ((bfd *, asection *, bfd_vma, int)); |
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#endif |
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static bfd_reloc_status_type m32r_elf_final_sda_base |
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PARAMS ((bfd *, struct bfd_link_info *, const char **, bfd_vma *)); |
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static bfd_boolean m32r_elf_object_p |
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@ -3617,541 +3613,6 @@ printf("m32r_elf_finish_dynamic_sections()\n"); |
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return TRUE; |
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} |
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#if 0 /* relaxing not supported yet */
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/* This function handles relaxing for the m32r.
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Relaxing on the m32r is tricky because of instruction alignment |
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requirements (4 byte instructions must be aligned on 4 byte boundaries). |
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The following relaxing opportunities are handled: |
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seth/add3/jl -> bl24 or bl8 |
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seth/add3 -> ld24 |
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It would be nice to handle bl24 -> bl8 but given: |
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- 4 byte insns must be on 4 byte boundaries |
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- branch instructions only branch to insns on 4 byte boundaries |
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this isn't much of a win because the insn in the 2 "deleted" bytes |
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must become a nop. With some complexity some real relaxation could be |
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done but the frequency just wouldn't make it worth it; it's better to |
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try to do all the code compaction one can elsewhere. |
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When the chip supports parallel 16 bit insns, things may change. |
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*/ |
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static bfd_boolean |
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m32r_elf_relax_section (abfd, sec, link_info, again) |
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bfd *abfd; |
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asection *sec; |
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struct bfd_link_info *link_info; |
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bfd_boolean *again; |
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{ |
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Elf_Internal_Shdr *symtab_hdr; |
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/* The Rela structures are used here because that's what
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_bfd_elf_link_read_relocs uses [for convenience - it sets the addend |
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field to 0]. */ |
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Elf_Internal_Rela *internal_relocs = NULL; |
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Elf_Internal_Rela *irel, *irelend; |
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bfd_byte *contents = NULL; |
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Elf_Internal_Sym *isymbuf = NULL; |
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/* Assume nothing changes. */ |
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*again = FALSE; |
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/* We don't have to do anything for a relocatable link, if
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this section does not have relocs, or if this is not a |
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code section. */ |
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if (link_info->relocatable |
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|| (sec->flags & SEC_RELOC) == 0 |
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|| sec->reloc_count == 0 |
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|| (sec->flags & SEC_CODE) == 0 |
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|| 0 /* FIXME: check SHF_M32R_CAN_RELAX */) |
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return TRUE; |
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symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
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/* Get a copy of the native relocations. */ |
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internal_relocs = (_bfd_elf_link_read_relocs |
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(abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL, |
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link_info->keep_memory)); |
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if (internal_relocs == NULL) |
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goto error_return; |
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/* Walk through them looking for relaxing opportunities. */ |
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irelend = internal_relocs + sec->reloc_count; |
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for (irel = internal_relocs; irel < irelend; irel++) |
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{ |
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bfd_vma symval; |
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/* If this isn't something that can be relaxed, then ignore
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this reloc. */ |
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if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO) |
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continue; |
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/* Get the section contents if we haven't done so already. */ |
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if (contents == NULL) |
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{ |
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/* Get cached copy if it exists. */ |
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if (elf_section_data (sec)->this_hdr.contents != NULL) |
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contents = elf_section_data (sec)->this_hdr.contents; |
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else |
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{ |
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/* Go get them off disk. */ |
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if (!bfd_malloc_and_get_section (abfd, sec, &contents)) |
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goto error_return; |
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} |
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} |
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/* Read this BFD's local symbols if we haven't done so already. */ |
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if (isymbuf == NULL && symtab_hdr->sh_info != 0) |
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{ |
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isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; |
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if (isymbuf == NULL) |
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isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, |
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symtab_hdr->sh_info, 0, |
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NULL, NULL, NULL); |
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if (isymbuf == NULL) |
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goto error_return; |
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} |
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/* Get the value of the symbol referred to by the reloc. */ |
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if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) |
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{ |
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/* A local symbol. */ |
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Elf_Internal_Sym *isym; |
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asection *sym_sec; |
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isym = isymbuf + ELF32_R_SYM (irel->r_info), |
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sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); |
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symval = (isym->st_value |
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+ sym_sec->output_section->vma |
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+ sym_sec->output_offset); |
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} |
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else |
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{ |
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unsigned long indx; |
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struct elf_link_hash_entry *h; |
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/* An external symbol. */ |
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indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; |
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h = elf_sym_hashes (abfd)[indx]; |
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BFD_ASSERT (h != NULL); |
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if (h->root.type != bfd_link_hash_defined |
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&& h->root.type != bfd_link_hash_defweak) |
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{ |
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/* This appears to be a reference to an undefined
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symbol. Just ignore it--it will be caught by the |
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regular reloc processing. */ |
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continue; |
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} |
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symval = (h->root.u.def.value |
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+ h->root.u.def.section->output_section->vma |
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+ h->root.u.def.section->output_offset); |
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} |
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/* For simplicity of coding, we are going to modify the section
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contents, the section relocs, and the BFD symbol table. We |
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must tell the rest of the code not to free up this |
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information. It would be possible to instead create a table |
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of changes which have to be made, as is done in coff-mips.c; |
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that would be more work, but would require less memory when |
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the linker is run. */ |
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/* Try to change a seth/add3/jl subroutine call to bl24 or bl8.
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This sequence is generated by the compiler when compiling in |
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32 bit mode. Also look for seth/add3 -> ld24. */ |
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if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO) |
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{ |
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Elf_Internal_Rela *nrel; |
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bfd_vma pc = (sec->output_section->vma + sec->output_offset |
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+ irel->r_offset); |
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bfd_signed_vma pcrel_value = symval - pc; |
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unsigned int code,reg; |
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int addend,nop_p,bl8_p,to_delete; |
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/* The tests are ordered so that we get out as quickly as possible
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if this isn't something we can relax, taking into account that |
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we are looking for two separate possibilities (jl/ld24). */ |
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/* Do nothing if no room in the section for this to be what we're
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looking for. */ |
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if (irel->r_offset > sec->size - 8) |
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continue; |
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/* Make sure the next relocation applies to the next
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instruction and that it's the add3's reloc. */ |
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nrel = irel + 1; |
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if (nrel == irelend |
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|| irel->r_offset + 4 != nrel->r_offset |
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|| ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16) |
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continue; |
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/* See if the instructions are seth/add3. */ |
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/* FIXME: This is where macros from cgen can come in. */ |
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code = bfd_get_16 (abfd, contents + irel->r_offset + 0); |
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if ((code & 0xf0ff) != 0xd0c0) |
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continue; /* not seth rN,foo */ |
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reg = (code & 0x0f00) >> 8; |
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code = bfd_get_16 (abfd, contents + irel->r_offset + 4); |
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if (code != (0x80a0 | reg | (reg << 8))) |
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continue; /* not add3 rN,rN,foo */ |
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/* At this point we've confirmed we have seth/add3. Now check
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whether the next insn is a jl, in which case try to change this |
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to bl24 or bl8. */ |
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/* Ensure the branch target is in range.
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The bl24 instruction has a 24 bit operand which is the target |
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address right shifted by 2, giving a signed range of 26 bits. |
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Note that 4 bytes are added to the high value because the target |
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will be at least 4 bytes closer if we can relax. It'll actually |
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be 4 or 8 bytes closer, but we don't know which just yet and |
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the difference isn't significant enough to worry about. */ |
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#if !USE_REL /* put in for learning purposes */ |
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pcrel_value += irel->r_addend; |
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#else |
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addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2); |
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pcrel_value += addend; |
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#endif |
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if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4 |
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/* Do nothing if no room in the section for this to be what we're
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looking for. */ |
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&& (irel->r_offset <= sec->size - 12) |
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/* Ensure the next insn is "jl rN". */ |
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&& ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)), |
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code != (0x1ec0 | reg))) |
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{ |
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/* We can relax to bl24/bl8. */ |
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/* See if there's a nop following the jl.
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Also see if we can use a bl8 insn. */ |
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code = bfd_get_16 (abfd, contents + irel->r_offset + 10); |
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nop_p = (code & 0x7fff) == NOP_INSN; |
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bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200; |
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if (bl8_p) |
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{ |
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/* Change "seth rN,foo" to "bl8 foo || nop".
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We OR in CODE just in case it's not a nop (technically, |
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CODE currently must be a nop, but for cleanness we |
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allow it to be anything). */ |
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#if !USE_REL /* put in for learning purposes */ |
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code = 0x7e000000 | MAKE_PARALLEL (code); |
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#else |
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code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | MAKE_PARALLEL (code); |
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#endif |
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to_delete = 8; |
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} |
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else |
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{ |
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/* Change the seth rN,foo to a bl24 foo. */ |
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#if !USE_REL /* put in for learning purposes */ |
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code = 0xfe000000; |
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#else |
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code = 0xfe000000 + ((addend >> 2) & 0xffffff); |
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#endif |
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to_delete = nop_p ? 8 : 4; |
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} |
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bfd_put_32 (abfd, code, contents + irel->r_offset); |
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/* Set the new reloc type. */ |
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irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), |
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bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL); |
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/* Delete the add3 reloc by making it a null reloc. */ |
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nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), |
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R_M32R_NONE); |
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} |
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else if (addend >= 0 |
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&& symval + addend <= 0xffffff) |
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{ |
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/* We can relax to ld24. */ |
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code = 0xe0000000 | (reg << 24) | (addend & 0xffffff); |
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bfd_put_32 (abfd, code, contents + irel->r_offset); |
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to_delete = 4; |
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/* Tell the following code a nop filler isn't needed. */ |
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nop_p = 1; |
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} |
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else |
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{ |
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/* Can't do anything here. */ |
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continue; |
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} |
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/* Note that we've changed the relocs, section contents, etc. */ |
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elf_section_data (sec)->relocs = internal_relocs; |
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elf_section_data (sec)->this_hdr.contents = contents; |
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symtab_hdr->contents = (unsigned char *) isymbuf; |
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/* Delete TO_DELETE bytes of data. */ |
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if (!m32r_elf_relax_delete_bytes (abfd, sec, |
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irel->r_offset + 4, to_delete)) |
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goto error_return; |
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/* Now that the following bytes have been moved into place, see if
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we need to replace the jl with a nop. This happens when we had |
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to use a bl24 insn and the insn following the jl isn't a nop. |
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Technically, this situation can't happen (since the insn can |
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never be executed) but to be clean we do this. When the chip |
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supports parallel 16 bit insns things may change. |
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We don't need to do this in the case of relaxing to ld24, |
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and the above code sets nop_p so this isn't done. */ |
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if (! nop_p && to_delete == 4) |
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bfd_put_16 (abfd, NOP_INSN, contents + irel->r_offset + 4); |
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/* That will change things, so we should relax again.
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Note that this is not required, and it may be slow. */ |
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*again = TRUE; |
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continue; |
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} |
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/* loop to try the next reloc */ |
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} |
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if (isymbuf != NULL |
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&& symtab_hdr->contents != (unsigned char *) isymbuf) |
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{ |
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if (! link_info->keep_memory) |
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free (isymbuf); |
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else |
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{ |
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/* Cache the symbols for elf_link_input_bfd. */ |
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symtab_hdr->contents = (unsigned char *) isymbuf; |
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} |
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} |
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if (contents != NULL |
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&& elf_section_data (sec)->this_hdr.contents != contents) |
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{ |
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if (! link_info->keep_memory) |
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free (contents); |
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else |
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{ |
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/* Cache the section contents for elf_link_input_bfd. */ |
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elf_section_data (sec)->this_hdr.contents = contents; |
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} |
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} |
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if (internal_relocs != NULL |
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&& elf_section_data (sec)->relocs != internal_relocs) |
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free (internal_relocs); |
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return TRUE; |
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error_return: |
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if (isymbuf != NULL |
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&& symtab_hdr->contents != (unsigned char *) isymbuf) |
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free (isymbuf); |
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if (contents != NULL |
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&& elf_section_data (sec)->this_hdr.contents != contents) |
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free (contents); |
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if (internal_relocs != NULL |
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&& elf_section_data (sec)->relocs != internal_relocs) |
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free (internal_relocs); |
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return FALSE; |
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} |
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/* Delete some bytes from a section while relaxing. */ |
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static bfd_boolean |
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m32r_elf_relax_delete_bytes (abfd, sec, addr, count) |
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bfd *abfd; |
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asection *sec; |
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bfd_vma addr; |
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int count; |
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{ |
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Elf_Internal_Shdr *symtab_hdr; |
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int shndx; |
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|
bfd_byte *contents; |
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Elf_Internal_Rela *irel, *irelend; |
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Elf_Internal_Rela *irelalign; |
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bfd_vma toaddr; |
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Elf_Internal_Sym *isym, *isymend; |
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struct elf_link_hash_entry **sym_hashes; |
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|
struct elf_link_hash_entry **end_hashes; |
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|
unsigned int symcount; |
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|
shndx = _bfd_elf_section_from_bfd_section (abfd, sec); |
|
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|
contents = elf_section_data (sec)->this_hdr.contents; |
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|
|
/* The deletion must stop at the next ALIGN reloc for an aligment
|
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|
|
power larger than the number of bytes we are deleting. */ |
|
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|
irelalign = NULL; |
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|
|
toaddr = sec->size; |
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|
|
irel = elf_section_data (sec)->relocs; |
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|
|
irelend = irel + sec->reloc_count; |
|
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|
/* Actually delete the bytes. */ |
|
|
|
memmove (contents + addr, contents + addr + count, toaddr - addr - count); |
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|
|
sec->size -= count; |
|
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|
|
|
|
|
/* Adjust all the relocs. */ |
|
|
|
for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) |
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|
|
{ |
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|
/* Get the new reloc address. */ |
|
|
|
if ((irel->r_offset > addr |
|
|
|
&& irel->r_offset < toaddr)) |
|
|
|
irel->r_offset -= count; |
|
|
|
} |
|
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|
|
|
|
|
/* Adjust the local symbols defined in this section. */ |
|
|
|
symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
|
|
|
isym = (Elf_Internal_Sym *) symtab_hdr->contents; |
|
|
|
for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) |
|
|
|
{ |
|
|
|
if (isym->st_shndx == shndx |
|
|
|
&& isym->st_value > addr |
|
|
|
&& isym->st_value < toaddr) |
|
|
|
isym->st_value -= count; |
|
|
|
} |
|
|
|
|
|
|
|
/* Now adjust the global symbols defined in this section. */ |
|
|
|
symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) |
|
|
|
- symtab_hdr->sh_info); |
|
|
|
sym_hashes = elf_sym_hashes (abfd); |
|
|
|
end_hashes = sym_hashes + symcount; |
|
|
|
for (; sym_hashes < end_hashes; sym_hashes++) |
|
|
|
{ |
|
|
|
struct elf_link_hash_entry *sym_hash = *sym_hashes; |
|
|
|
|
|
|
|
if ((sym_hash->root.type == bfd_link_hash_defined |
|
|
|
|| sym_hash->root.type == bfd_link_hash_defweak) |
|
|
|
&& sym_hash->root.u.def.section == sec |
|
|
|
&& sym_hash->root.u.def.value > addr |
|
|
|
&& sym_hash->root.u.def.value < toaddr) |
|
|
|
{ |
|
|
|
sym_hash->root.u.def.value -= count; |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
return TRUE; |
|
|
|
} |
|
|
|
|
|
|
|
/* This is a version of bfd_generic_get_relocated_section_contents
|
|
|
|
which uses m32r_elf_relocate_section. */ |
|
|
|
|
|
|
|
static bfd_byte * |
|
|
|
m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order, |
|
|
|
data, relocatable, symbols) |
|
|
|
bfd *output_bfd; |
|
|
|
struct bfd_link_info *link_info; |
|
|
|
struct bfd_link_order *link_order; |
|
|
|
bfd_byte *data; |
|
|
|
bfd_boolean relocatable; |
|
|
|
asymbol **symbols; |
|
|
|
{ |
|
|
|
Elf_Internal_Shdr *symtab_hdr; |
|
|
|
asection *input_section = link_order->u.indirect.section; |
|
|
|
bfd *input_bfd = input_section->owner; |
|
|
|
asection **sections = NULL; |
|
|
|
Elf_Internal_Rela *internal_relocs = NULL; |
|
|
|
Elf_Internal_Sym *isymbuf = NULL; |
|
|
|
bfd_size_type amt; |
|
|
|
|
|
|
|
/* We only need to handle the case of relaxing, or of having a
|
|
|
|
particular set of section contents, specially. */ |
|
|
|
if (relocatable |
|
|
|
|| elf_section_data (input_section)->this_hdr.contents == NULL) |
|
|
|
return bfd_generic_get_relocated_section_contents (output_bfd, link_info, |
|
|
|
link_order, data, |
|
|
|
relocatable, |
|
|
|
symbols); |
|
|
|
|
|
|
|
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; |
|
|
|
|
|
|
|
memcpy (data, elf_section_data (input_section)->this_hdr.contents, |
|
|
|
input_section->size); |
|
|
|
|
|
|
|
if ((input_section->flags & SEC_RELOC) != 0 |
|
|
|
&& input_section->reloc_count > 0) |
|
|
|
{ |
|
|
|
Elf_Internal_Sym *isymp; |
|
|
|
asection **secpp; |
|
|
|
Elf32_External_Sym *esym, *esymend; |
|
|
|
|
|
|
|
internal_relocs = (_bfd_elf_link_read_relocs |
|
|
|
(input_bfd, input_section, (PTR) NULL, |
|
|
|
(Elf_Internal_Rela *) NULL, FALSE)); |
|
|
|
if (internal_relocs == NULL) |
|
|
|
goto error_return; |
|
|
|
|
|
|
|
if (symtab_hdr->sh_info != 0) |
|
|
|
{ |
|
|
|
isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; |
|
|
|
if (isymbuf == NULL) |
|
|
|
isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, |
|
|
|
symtab_hdr->sh_info, 0, |
|
|
|
NULL, NULL, NULL); |
|
|
|
if (isymbuf == NULL) |
|
|
|
goto error_return; |
|
|
|
} |
|
|
|
|
|
|
|
amt = symtab_hdr->sh_info; |
|
|
|
amt *= sizeof (asection *); |
|
|
|
sections = (asection **) bfd_malloc (amt); |
|
|
|
if (sections == NULL && symtab_hdr->sh_info > 0) |
|
|
|
goto error_return; |
|
|
|
|
|
|
|
isymend = isymbuf + symtab_hdr->sh_info; |
|
|
|
for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp) |
|
|
|
{ |
|
|
|
asection *isec; |
|
|
|
|
|
|
|
if (isym->st_shndx == SHN_UNDEF) |
|
|
|
isec = bfd_und_section_ptr; |
|
|
|
else if (isym->st_shndx == SHN_ABS) |
|
|
|
isec = bfd_abs_section_ptr; |
|
|
|
else if (isym->st_shndx == SHN_COMMON) |
|
|
|
isec = bfd_com_section_ptr; |
|
|
|
else if (isym->st_shndx == SHN_M32R_SCOMMON) |
|
|
|
isec = &m32r_elf_scom_section; |
|
|
|
else |
|
|
|
isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx); |
|
|
|
|
|
|
|
*secpp = isec; |
|
|
|
} |
|
|
|
|
|
|
|
if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd, |
|
|
|
input_section, data, internal_relocs, |
|
|
|
isymbuf, sections)) |
|
|
|
goto error_return; |
|
|
|
|
|
|
|
if (sections != NULL) |
|
|
|
free (sections); |
|
|
|
if (isymbuf != NULL |
|
|
|
&& symtab_hdr->contents != (unsigned char *) isymbuf) |
|
|
|
free (isymbuf); |
|
|
|
if (elf_section_data (input_section)->relocs != internal_relocs) |
|
|
|
free (internal_relocs); |
|
|
|
} |
|
|
|
|
|
|
|
return data; |
|
|
|
|
|
|
|
error_return: |
|
|
|
if (sections != NULL) |
|
|
|
free (sections); |
|
|
|
if (isymbuf != NULL |
|
|
|
&& symtab_hdr->contents != (unsigned char *) isymbuf) |
|
|
|
free (isymbuf); |
|
|
|
if (internal_relocs != NULL |
|
|
|
&& elf_section_data (input_section)->relocs != internal_relocs) |
|
|
|
free (internal_relocs); |
|
|
|
return NULL; |
|
|
|
} |
|
|
|
|
|
|
|
#endif /* #if 0 */ |
|
|
|
|
|
|
|
/* Set the right machine number. */ |
|
|
|
static bfd_boolean |
|
|
|
@ -4832,13 +4293,6 @@ m32r_elf_reloc_type_class (rela) |
|
|
|
#define elf_backend_fake_sections m32r_elf_fake_sections |
|
|
|
#endif |
|
|
|
|
|
|
|
#if 0 /* not yet */
|
|
|
|
/* relax support */ |
|
|
|
#define bfd_elf32_bfd_relax_section m32r_elf_relax_section |
|
|
|
#define bfd_elf32_bfd_get_relocated_section_contents \ |
|
|
|
m32r_elf_get_relocated_section_contents |
|
|
|
#endif |
|
|
|
|
|
|
|
#define elf_backend_object_p m32r_elf_object_p |
|
|
|
#define elf_backend_final_write_processing m32r_elf_final_write_processing |
|
|
|
#define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data |
|
|
|
|
Ben Elliston
21 years ago