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ubsan: opcodes/csky-opc.h:929 shift exponent 536870912 

opcodes/
	* csky-opc.h: Formatting.
	(GENERAL_REG_BANK): Correct spelling.  Update use throughout file.
	(get_register_name): Mask arch with CSKY_ARCH_MASK for shift,
	and shift 1u.
	(get_register_number): Likewise.
	* csky-dis.c (get_gr_name, get_cr_name): Don't mask mach_flag.
gas/
	* config/tc-csky.c (parse_type_ctrlreg): Don't mask mach_flag
	for csky_get_control_regno.
	(csky_get_reg_val): Likewise when calling csky_get_general_regno.
users/ARM/morello-binutils-gdb-master
Alan Modra 6 years ago
parent
0919fa3c46
commit
0be2fe677c
5 changed files with 85 additions and 76 deletions
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  1. 91
      gas/ChangeLog
  2. 8
      gas/config/tc-csky.c
  3. 28
      opcodes/ChangeLog
  4. 4
      opcodes/csky-dis.c
  5. 30
      opcodes/csky-opc.h

91
gas/ChangeLog
View File

@ -1,3 +1,9 @@
2020-09-26 Alan Modra <amodra@gmail.com>
* config/tc-csky.c (parse_type_ctrlreg): Don't mask mach_flag
for csky_get_control_regno.
(csky_get_reg_val): Likewise when calling csky_get_general_regno.
2020-09-24 Jim Wilson <jimw@sifive.com>
PR 26400
@ -62,12 +68,12 @@
(v1_work_fpu_readd): Refine.
(v2_work_addc): New function, strengthen the operands legality
check of addc.
* gas/testsuite/gas/csky/all.d : Use register number format when
* testsuite/gas/csky/all.d : Use register number format when
disassemble register name by default.
* gas/testsuite/gas/csky/cskyv2_all.d : Likewise.
* gas/testsuite/gas/csky/trust.d: Likewise.
* gas/testsuite/gas/csky/cskyv2_ck860.d : Fix.
* gas/testsuite/gas/csky/trust.s : Fix.
* testsuite/gas/csky/cskyv2_all.d : Likewise.
* testsuite/gas/csky/trust.d: Likewise.
* testsuite/gas/csky/cskyv2_ck860.d : Fix.
* testsuite/gas/csky/trust.s : Fix.
2020-09-23 Lili Cui <lili.cui@intel.com>
@ -313,7 +319,7 @@
add_line_strp and set symbol offset for DWARF2_LINE_VERSION 5.
(out_debug_line): Call out_dir_and_file_list with line_seg and
sizeof_offset.
* gas/testsuite/gas/elf/dwarf-5-file0.d: Expect indirect line
* testsuite/gas/elf/dwarf-5-file0.d: Expect indirect line
strings.
2020-09-07 Mark Wielaard <mark@klomp.org>
@ -330,7 +336,7 @@
* dwarf2dbg.c (dwarf2_directive_filename): Initialize with_md5 to
FALSE.
* gas/testsuite/gas/elf/dwarf-5-file0.s: Add a random bignum.
* testsuite/gas/elf/dwarf-5-file0.s: Add a random bignum.
2020-09-01 Mark Wielaard <mark@klomp.org>
@ -595,7 +601,7 @@
2020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com>
* gas/config/tc-csky.c (md_begin): Set attributes.
* config/tc-csky.c (md_begin): Set attributes.
(isa_flag): Change type to unsigned 64 bits.
(struct csky_cpu_info): Likewise.
(struct csky_macro_info): Likewise.
@ -660,14 +666,14 @@
2020-08-25 Alan Modra <amodra@gmail.com>
PR 26501
* gas/config/tc-tic54x.c (tic54x_undefined_symbol): Properly treat
* config/tc-tic54x.c (tic54x_undefined_symbol): Properly treat
misc_symbol_hash entries without values.
2020-08-25 Alan Modra <amodra@gmail.com>
PR 26500
* tc-tic4x.c (tic4x_inst_make): Don't die on terminating insn
with name = "".
* config/tc-tic4x.c (tic4x_inst_make): Don't die on terminating
insn with name = "".
2020-08-25 Alan Modra <amodra@gmail.com>
@ -704,14 +710,12 @@
(csky_cpus): Add item for CK860.
(md_begin): Enable DSP for CK810 and CK807 by default.
(md_apply_fix): Fix CKCORE_TLS_IE32 relocation failure.
* gas/testsuite/gas/csky/cskyv2_all.d: Change 'sync 0'
to 'sync'.
* gas/testsuite/gas/csky/cskyv2_all.s: Likewise.
* gas/testsuite/gas/csky/cskyv2_ck860.d: New.
* gas/testsuite/gas/csky/cskyv2_ck860.s: New.
* gas/testsuite/gas/csky/enhance_dsp.d: Change plsli.u16
to plsli.16.
* gas/testsuite/gas/csky/enhance_dsp.s: Likewise.
* testsuite/gas/csky/cskyv2_all.d: Change 'sync 0' to 'sync'.
* testsuite/gas/csky/cskyv2_all.s: Likewise.
* testsuite/gas/csky/cskyv2_ck860.d: New.
* testsuite/gas/csky/cskyv2_ck860.s: New.
* testsuite/gas/csky/enhance_dsp.d: Change plsli.u16 to plsli.16.
* testsuite/gas/csky/enhance_dsp.s: Likewise.
2020-08-24 Alan Modra <amodra@gmail.com>
@ -1556,7 +1560,7 @@
2020-08-04 Christian Groessler <chris@groessler.org>
* gas/testsuite/gas/z8k/inout.d: Adapt to correct encoding of
* testsuite/gas/z8k/inout.d: Adapt to correct encoding of
"sout/soutb #imm,reg"
2020-08-04 H.J. Lu <hongjiu.lu@intel.com>
@ -1579,7 +1583,7 @@
2020-08-02 Mark Wielaard <mark@klomp.org>
* gas/dwarf2dbg.c (out_dir_and_file_list): For DWARF5 emit at
* dwarf2dbg.c (out_dir_and_file_list): For DWARF5 emit at
least one directory if there is at least one file. Use dirs[1]
if dirs[0] is not set, or if there is no dirs[1] the current
working directory. Use files[1] filename, when files[0] filename
@ -1589,10 +1593,10 @@
* dwarf2dbg.c (out_debug_info): Emit unit type and abbrev offset
for DWARF5.
* gas/testsuite/gas/elf/dwarf-4-cu.d: New file.
* gas/testsuite/gas/elf/dwarf-4-cu.s: Likewise.
* gas/testsuite/gas/elf/dwarf-5-cu.d: Likewise.
* gas/testsuite/gas/elf/dwarf-5-cu.s: Likewise.
* testsuite/gas/elf/dwarf-4-cu.d: New file.
* testsuite/gas/elf/dwarf-4-cu.s: Likewise.
* testsuite/gas/elf/dwarf-5-cu.d: Likewise.
* testsuite/gas/elf/dwarf-5-cu.s: Likewise.
* testsuite/gas/elf/elf.exp: Run dwarf-4-cu and dwarf-5-cu.
2020-08-02 Mark Wielaard <mark@klomp.org>
@ -2282,7 +2286,8 @@
2020-06-29 H.J. Lu <hongjiu.lu@intel.com>
* tc-i386.c (build_vex_prefix): Support VEX base opcode length > 1.
* config/tc-i386.c (build_vex_prefix): Support VEX base opcode
length > 1.
(md_assemble): Don't process ImmExt without operands.
2020-06-29 Hans-Peter Nilsson <hp@bitrange.com>
@ -2737,8 +2742,8 @@
2020-05-27 Simon Cook <simon.cook@embecosm.com>
* config/tc-riscv.c (riscv_init_csr_hash): NULL initilize next
pointer when creating struct riscv_csr_extra.
* config/tc-riscv.c (riscv_init_csr_hash): NULL initilize next
pointer when creating struct riscv_csr_extra.
2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
@ -2921,23 +2926,23 @@
-mpriv-spec=1.11.
* testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise. There are some
version warnings for the test case.
* gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
* gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
* gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
* gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
* gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
* testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
* testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
* testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
* testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
Check whether the CSR is valid when privilege version 1.9 is choosed.
* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
* testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
Check whether the CSR is valid when privilege version 1.9.1 is choosed.
* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
* gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
Check whether the CSR is valid when privilege version 1.10 is choosed.
* gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
* gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
* testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
Check whether the CSR is valid when privilege version 1.11 is choosed.
* gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
* config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Default configure option
setting. You can set it by configure option --with-priv-spec.
(riscv_set_default_priv_spec): New function used to set the default
@ -3534,7 +3539,7 @@
* testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
* testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
testsuite/gas/i386/x86-64-jump.d.
* gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
* testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
Incorporate changes to
gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
* testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
@ -4524,7 +4529,7 @@
2020-02-01 Anthony Green <green@moxielogic.com>
* config/tc-moxie.c (md_begin): Don't force big-endian mode.
* config/tc-moxie.c (md_begin): Don't force big-endian mode.
2020-01-31 Sandra Loosemore <sandra@codesourcery.com>

8
gas/config/tc-csky.c
View File

@ -2565,8 +2565,7 @@ parse_type_ctrlreg (char** oper)
}
else
{
crx = csky_get_control_regno (mach_flag & CSKY_ARCH_MASK,
s, &s, &sel);
crx = csky_get_control_regno (mach_flag, s, &s, &sel);
if (crx < 0)
{
SET_ERROR_STRING (ERROR_CREG_ILLEGAL, s);
@ -2577,8 +2576,7 @@ parse_type_ctrlreg (char** oper)
}
else if (i == -1)
{
i = csky_get_control_regno (mach_flag & CSKY_ARCH_MASK,
s, &s, &sel);
i = csky_get_control_regno (mach_flag, s, &s, &sel);
if (i < 0)
{
SET_ERROR_STRING (ERROR_CREG_ILLEGAL, s);
@ -2595,7 +2593,7 @@ csky_get_reg_val (char *str, int *len)
{
int regno = 0;
char *s = str;
regno = csky_get_general_regno (mach_flag & CSKY_ARCH_MASK, str, &s);
regno = csky_get_general_regno (mach_flag, str, &s);
*len = (s - str);
return regno;
}

28
opcodes/ChangeLog
View File

@ -1,7 +1,16 @@
2020-09-26 Alan Modra <amodra@gmail.com>
* csky-opc.h: Formatting.
(GENERAL_REG_BANK): Correct spelling. Update use throughout file.
(get_register_name): Mask arch with CSKY_ARCH_MASK for shift,
and shift 1u.
(get_register_number): Likewise.
* csky-dis.c (get_gr_name, get_cr_name): Don't mask mach_flag.
2020-09-24 Lili Cui <lili.cui@intel.com>
PR 26654
*i386-dis.c (enum): Put MOD_VEX_0F38* together.
* i386-dis.c (enum): Put MOD_VEX_0F38* together.
2020-09-24 Andrew Burgess <andrew.burgess@embecosm.com>
@ -28,7 +37,6 @@
2020-09-17 Cooper Qu <<cooper.qu@linux.alibaba.com>>
opcodes/
* csky-dis.c (using_abi): New.
(parse_csky_dis_options): New function.
(get_gr_name): New function.
@ -36,7 +44,7 @@
(csky_output_operand): Use get_gr_name and get_cr_name to
disassemble and add handle of OPRND_TYPE_IMM5b_LS.
(print_insn_csky): Parse disassembler options.
* opcodes/csky-opc.h (OPRND_TYPE_IMM5b_LS): New enum.
* csky-opc.h (OPRND_TYPE_IMM5b_LS): New enum.
(GENARAL_REG_BANK): Define.
(REG_SUPPORT_ALL): Define.
(REG_SUPPORT_ALL): New.
@ -872,7 +880,7 @@
EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
respectively.
respectively.
(dis386_twobyte, three_byte_table, vex_table, vex_len_table,
vex_w_table, mod_table): Replace / remove respective entries.
(print_insn): Move up dp->prefix_requirement handling. Handle
@ -2696,7 +2704,7 @@
2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR 25376
* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
* arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
(neon_opcodes): Likewise.
(select_arm_features): Make sure we enable MVE bits when selecting
armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
@ -2750,13 +2758,13 @@
* i386-dis.c (print_insn): Initialize the insn info fields, and
detect jumps.
2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
* arc-opc.c (C_NE): Make it required.
2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
* opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
* opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
reserved register name.
2020-01-13 Alan Modra <amodra@gmail.com>
@ -2893,13 +2901,13 @@
* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
uzip{1,2}.
* opcodes/aarch64-dis-2.c: Re-generate.
* aarch64-dis-2.c: Re-generate.
2020-01-03 Jan Beulich <jbeulich@suse.com>
* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
FMMLA encoding.
* opcodes/aarch64-dis-2.c: Re-generate.
* aarch64-dis-2.c: Re-generate.
2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>

4
opcodes/csky-dis.c
View File

@ -287,14 +287,14 @@ parse_csky_dis_options (const char *opts_in)
static const char *
get_gr_name (int regno)
{
return csky_get_general_reg_name (mach_flag & CSKY_ABI_MASK, regno, using_abi);
return csky_get_general_reg_name (mach_flag, regno, using_abi);
}
/* Get control register name. */
static const char *
get_cr_name (unsigned int regno, int bank)
{
return csky_get_control_reg_name (mach_flag & CSKY_ABI_MASK, bank, regno, using_abi);
return csky_get_control_reg_name (mach_flag, bank, regno, using_abi);
}
static int

30
opcodes/csky-opc.h
View File

@ -653,7 +653,7 @@ const struct psrbit cskyv2_psr_bits[] =
{0, 0, NULL},
};
#define GENARAL_REG_BANK 0x80000000
#define GENERAL_REG_BANK 0x80000000
#define REG_SUPPORT_ALL 0xffffffff
/* CSKY register description. */
@ -698,7 +698,7 @@ struct csky_reg_def
static struct csky_reg_def csky_abiv1_general_regs[] =
{
#define DECLARE_REG(regno, abi_name, support) \
{GENARAL_REG_BANK, regno, "r"#regno, abi_name, support, NULL}
{GENERAL_REG_BANK, regno, "r"#regno, abi_name, support, NULL}
DECLARE_REG (0, "sp", REG_SUPPORT_ALL),
DECLARE_REG (1, NULL, REG_SUPPORT_ALL),
@ -769,7 +769,7 @@ static struct csky_reg_def csky_abiv2_general_regs[] =
#undef DECLARE_REG
#endif
#define DECLARE_REG(regno, abi_name, support) \
{GENARAL_REG_BANK, regno, "r"#regno, abi_name, support, NULL}
{GENERAL_REG_BANK, regno, "r"#regno, abi_name, support, NULL}
DECLARE_REG (0, "a0", REG_SUPPORT_ALL),
DECLARE_REG (1, "a1", REG_SUPPORT_ALL),
@ -926,7 +926,7 @@ get_register_name (struct csky_reg_def *reg_table,
{
if (reg_table[i].bank == bank
&& reg_table[i].regno == regno
&& (reg_table[i].arch_flag & (1 << arch)))
&& (reg_table[i].arch_flag & (1u << (arch & CSKY_ARCH_MASK))))
{
if (is_abi && reg_table[i].abi_name)
return reg_table[i].abi_name;
@ -957,7 +957,7 @@ get_register_number (struct csky_reg_def *reg_table,
len = strlen (reg_table[i].name);
if ((strncasecmp (reg_table[i].name, s, len) == 0)
&& !(ISDIGIT (s[len]))
&& (reg_table[i].arch_flag & (1 << arch)))
&& (reg_table[i].arch_flag & (1u << (arch & CSKY_ARCH_MASK))))
{
*end = s + len;
*bank = reg_table[i].bank;
@ -973,7 +973,7 @@ get_register_number (struct csky_reg_def *reg_table,
len = strlen (reg_table[i].abi_name);
if ((strncasecmp (reg_table[i].abi_name, s, len) == 0)
&& !(ISALNUM (s[len]))
&& (reg_table[i].arch_flag & (1 << arch)))
&& (reg_table[i].arch_flag & (1u << (arch & CSKY_ARCH_MASK))))
{
*end = s + len;
*bank = reg_table[i].bank;
@ -990,23 +990,22 @@ csky_get_general_reg_name (int arch, int regno, int is_abi)
{
struct csky_reg_def *reg_table;
if (IS_CSKY_ARCH_V1(arch))
if (IS_CSKY_ARCH_V1 (arch))
reg_table = csky_abiv1_general_regs;
else
reg_table = csky_abiv2_general_regs;
return get_register_name (reg_table, arch,
GENARAL_REG_BANK, regno, is_abi);
return get_register_name (reg_table, arch, GENERAL_REG_BANK, regno, is_abi);
}
/* Return general register's number. */
static inline int
csky_get_general_regno(int arch, char *s, char **end)
csky_get_general_regno (int arch, char *s, char **end)
{
struct csky_reg_def *reg_table;
int bank = 0;
if (IS_CSKY_ARCH_V1(arch))
if (IS_CSKY_ARCH_V1 (arch))
reg_table = csky_abiv1_general_regs;
else
reg_table = csky_abiv2_general_regs;
@ -1020,22 +1019,21 @@ csky_get_control_reg_name (int arch, int bank, int regno, int is_abi)
{
struct csky_reg_def *reg_table;
if (IS_CSKY_ARCH_V1(arch))
if (IS_CSKY_ARCH_V1 (arch))
reg_table = csky_abiv1_control_regs;
else
reg_table = csky_abiv2_control_regs;
return get_register_name (reg_table, arch, bank,
regno, is_abi);
return get_register_name (reg_table, arch, bank, regno, is_abi);
}
/* Return control register's number. */
static inline int
csky_get_control_regno(int arch, char *s, char **end, int *bank)
csky_get_control_regno (int arch, char *s, char **end, int *bank)
{
struct csky_reg_def *reg_table;
if (IS_CSKY_ARCH_V1(arch))
if (IS_CSKY_ARCH_V1 (arch))
reg_table = csky_abiv1_control_regs;
else
reg_table = csky_abiv2_control_regs;

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