2006-02-24 Paul Brook <paul@codesourcery.com>
gas/
* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
(struct asm_barrier_opt): Define.
(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
(parse_psr): Accept V7M psr names.
(parse_barrier): New function.
(enum operand_parse_code): Add OP_oBARRIER.
(parse_operands): Implement OP_oBARRIER.
(do_barrier): New function.
(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
(do_t_cpsi): Add V7M restrictions.
(do_t_mrs, do_t_msr): Validate V7M variants.
(md_assemble): Check for NULL variants.
(v7m_psrs, barrier_opt_names): New tables.
(insns): Add V7 instructions. Mark V6 instructions absent from V7M.
(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
(struct cpu_arch_ver_table): Define.
(cpu_arch_ver): New.
(aeabi_set_public_attributes): Use cpu_arch_ver. Set
Tag_CPU_arch_profile.
* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
* gas/arm/thumb32.d: Fix expected msr and mrs output.
* gas/arm/arch7.d: New test.
* gas/arm/arch7.s: New test.
* gas/arm/arch7m-bad.l: New test.
* gas/arm/arch7m-bad.d: New test.
* gas/arm/arch7m-bad.s: New test.
include/opcode/
* arm.h: Add V7 feature bits.
opcodes/
* arm-dis.c (arm_opcodes): Add V7 instructions.
(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
(print_arm_address): New function.
(print_insn_arm): Use it. Add 'P' and 'U' cases.
(psr_name): New function.
(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
21 years ago
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2006-02-24 Paul Brook <paul@codesourcery.com>
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* arm-dis.c (arm_opcodes): Add V7 instructions.
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(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
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(print_arm_address): New function.
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(print_insn_arm): Use it. Add 'P' and 'U' cases.
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(psr_name): New function.
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(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
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2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
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* ia64-opc-i.c (bXc): New.
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(mXc): Likewise.
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(OpX2TaTbYaXcC): Likewise.
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(TF). Likewise.
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(TFCM). Likewise.
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(ia64_opcodes_i): Add instructions for tf.
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* ia64-opc.h (IMMU5b): New.
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* ia64-asmtab.c: Regenerated.
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2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
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* ia64-gen.c: Update copyright years.
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* ia64-opc-b.c: Likewise.
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2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
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* ia64-gen.c (lookup_regindex): Handle ".vm".
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(print_dependency_table): Handle '\"'.
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* ia64-ic.tbl: Updated from SDM 2.2.
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* ia64-raw.tbl: Likewise.
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* ia64-waw.tbl: Likewise.
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* ia64-asmtab.c: Regenerated.
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* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
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2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
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Anil Paranjape <anilp1@kpitcummins.com>
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Shilin Shakti <shilins@kpitcummins.com>
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* xc16x-desc.h: New file
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* xc16x-desc.c: New file
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* xc16x-opc.h: New file
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* xc16x-opc.c: New file
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* xc16x-ibld.c: New file
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* xc16x-asm.c: New file
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* xc16x-dis.c: New file
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* Makefile.am: Entries for xc16x
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* Makefile.in: Regenerate
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* cofigure.in: Add xc16x target information.
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* configure: Regenerate.
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* disassemble.c: Add xc16x target information.
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2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
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moves.
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2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c ('Z'): Add a new macro.
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(dis386_twobyte): Use "movZ" for control register moves.
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2006-02-10 Nick Clifton <nickc@redhat.com>
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* iq2000-asm.c: Regenerate.
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* bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x,
bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249,
bfd_mach_mcf547x, bfd_mach_mcf548x): Remove.
(bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div,
bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac,
bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp,
bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac,
bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac,
bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac,
bfd_mach_mcf_isa_b_usp_float_emac): New.
(bfd_default_scan): Update coldfire mapping.
* bfd/bfd-in.h (bfd_m68k_mach_to_features,
bfd_m68k_features_to_mach): Declare.
* bfd/bfd-in2.h: Rebuilt.
* bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines,
adjust legacy names.
(m68k_arch_features): New.
(bfd_m68k_mach_to_features,
bfd_m68k_features_to_mach): Define.
* bfd/elf32-m68k.c (elf32_m68k_object_p): New.
(elf32_m68k_merge_private_bfd_data): Merge the CF EF flags.
(elf32_m68k_print_private_bfd_data): Print the CF EF flags.
(elf_backend_object_p): Define.
* bfd/ieee.c (ieee_write_processor): Update coldfire machines.
* bfd/libbfd.h: Rebuilt.
* gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
mcf5329_control_regs): New.
(not_current_architecture, selected_arch, selected_cpu): New.
(m68k_archs, m68k_extensions): New.
(archs): Renamed to ...
(m68k_cpus): ... here. Adjust.
(n_arches): Remove.
(md_pseudo_table): Add arch and cpu directives.
(find_cf_chip, m68k_ip): Adjust table scanning.
(no_68851, no_68881): Remove.
(md_assemble): Lazily initialize.
(select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
(md_init_after_args): Move functionality to m68k_init_arch.
(mri_chip): Adjust table scanning.
(md_parse_option): Reimplement 'm' processing to add -march & -mcpu
options with saner parsing.
(m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
m68k_init_arch): New.
(s_m68k_cpu, s_m68k_arch): New.
(md_show_usage): Adjust.
(m68k_elf_final_processing): Set CF EF flags.
* gas/config/tc-m68k.h (m68k_init_after_args): Remove.
(tc_init_after_args): Remove.
* gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
(M68k-Directives): Document .arch and .cpu directives.
* gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
* gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New.
* include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ...
(EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here.
(EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS,
EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC,
EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New.
* include/opcode/m68k.h (m68008, m68ec030, m68882): Remove.
(m68k_mask): New.
(cpu_m68k, cpu_cf): New.
(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.
* opcodes/m68k-dis.c (print_insn_m68k): Use
bfd_m68k_mach_to_features.
* binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
21 years ago
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2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
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* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
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* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
21 years ago
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2006-01-26 David Ung <davidu@mips.com>
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* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
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ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
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floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
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nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
|
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rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
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2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
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* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
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ld_d_r, pref_xd_cb): Use signed char to hold data to be
|
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disassembled.
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* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
|
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buffer overflows when disassembling instructions like
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ld (ix+123),0x23
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* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
|
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operand, if the offset is negative.
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2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
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* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
|
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unsigned char to hold data to be disassembled.
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2006-01-17 Andreas Schwab <schwab@suse.de>
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PR binutils/1486
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* disassemble.c (disassemble_init_for_target): Set
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disassembler_needs_relocs for bfd_arch_arm.
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2006-01-16 Paul Brook <paul@codesourcery.com>
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* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
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f?add?, and f?sub? instructions.
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2006-01-16 Nick Clifton <nickc@redhat.com>
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* po/zh_CN.po: New Chinese (simplified) translation.
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* configure.in (ALL_LINGUAS): Add "zh_CH".
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* configure: Regenerate.
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2006-01-05 Paul Brook <paul@codesourcery.com>
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* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
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2006-01-06 DJ Delorie <dj@redhat.com>
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* m32c-desc.c: Regenerate.
|
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* m32c-opc.c: Regenerate.
|
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* m32c-opc.h: Regenerate.
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2006-01-03 DJ Delorie <dj@redhat.com>
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* cgen-ibld.in (extract_normal): Avoid memory range errors.
|
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* m32c-ibld.c: Regenerated.
|
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For older changes see ChangeLog-2005
|
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
|
